Search results for: Floating Gate MOSFET
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 271

Search results for: Floating Gate MOSFET

241 Spin-Dependent Transport Signatures of Bound States: From Finger to Top Gates

Authors: Yun-Hsuan Yu, Chi-Shung Tang, Nzar Rauf Abdullah, Vidar Gudmundsson

Abstract:

Spin-orbit gap feature in energy dispersion of one-dimensional devices is revealed via strong spin-orbit interaction (SOI) effects under Zeeman field. We describe the utilization of a finger-gate or a top-gate to control the spin-dependent transport characteristics in the SOI-Zeeman influenced split-gate devices by means of a generalized spin-mixed propagation matrix method. For the finger-gate system, we find a bound state in continuum for incident electrons within the ultra-low energy regime. For the top-gate system, we observe more bound-state features in conductance associated with the formation of spin-associated hole-like or electron-like quasi-bound states around band thresholds, as well as hole bound states around the reverse point of the energy dispersion. We demonstrate that the spin-dependent transport behavior of a top-gate system is similar to that of a finger-gate system only if the top-gate length is less than the effective Fermi wavelength.

Keywords: Spin-orbit, Zeeman, top-gate, finger-gate, bound state.

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240 Capacitance Models of AlGaN/GaN High Electron Mobility Transistors

Authors: A. Douara, N. Kermas, B. Djellouli

Abstract:

In this study, we report calculations of gate capacitance of AlGaN/GaN HEMTs with nextnano device simulation software. We have used a physical gate capacitance model for III-V FETs that incorporates quantum capacitance and centroid capacitance in the channel. These simulations explore various device structures with different values of barrier thickness and channel thickness. A detailed understanding of the impact of gate capacitance in HEMTs will allow us to determine their role in future 10 nm physical gate length node.

Keywords: AlGaN/GaN, centroid capacitance, gate capacitance, HEMT, quantum capacitance.

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239 Analytical Subthreshold Drain Current Model Incorporating Inversion Layer Effective Mobility Model for Pocket Implanted Nano Scale n-MOSFET

Authors: Muhibul Haque Bhuyan, Quazi D. M. Khosru

Abstract:

Carrier scatterings in the inversion channel of MOSFET dominates the carrier mobility and hence drain current. This paper presents an analytical model of the subthreshold drain current incorporating the effective electron mobility model of the pocket implanted nano scale n-MOSFET. The model is developed by assuming two linear pocket profiles at the source and drain edges at the surface and by using the conventional drift-diffusion equation. Effective electron mobility model includes three scattering mechanisms, such as, Coulomb, phonon and surface roughness scatterings as well as ballistic phenomena in the pocket implanted n-MOSFET. The model is simulated for various pocket profile and device parameters as well as for various bias conditions. Simulation results show that the subthreshold drain current data matches the experimental data already published in the literature.

Keywords: Linear Pocket Profile, Pocket Implanted n-MOSFET, Subthreshold Drain Current and Effective Mobility Model.

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238 Linear Pocket Profile based Threshold Voltage Model for sub-100 nm n-MOSFET

Authors: Muhibul Haque Bhuyan, Quazi Deen Mohd Khosru

Abstract:

This paper presents a threshold voltage model of pocket implanted sub-100 nm n-MOSFETs incorporating the drain and substrate bias effects using two linear pocket profiles. Two linear equations are used to simulate the pocket profiles along the channel at the surface from the source and drain edges towards the center of the n-MOSFET. Then the effective doping concentration is derived and is used in the threshold voltage equation that is obtained by solving the Poisson-s equation in the depletion region at the surface. Simulated threshold voltages for various gate lengths fit well with the experimental data already published in the literature. The simulated result is compared with the two other pocket profiles used to derive the threshold voltage models of n-MOSFETs. The comparison shows that the linear model has a simple compact form that can be utilized to study and characterize the pocket implanted advanced ULSI devices.

Keywords: Linear pocket profile, pocket implantation, nMOSFET, threshold voltage, short channel effect (SCE), reverse short channeleffect (RSCE).

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237 A Comparison Study of Electrical Characteristics in Conventional Multiple-gate Silicon Nanowire Transistors

Authors: Fatemeh Karimi, Morteza Fathipour, Hamdam Ghanatian, Vala Fathipour

Abstract:

In this paper electrical characteristics of various kinds of multiple-gate silicon nanowire transistors (SNWT) with the channel length equal to 7 nm are compared. A fully ballistic quantum mechanical transport approach based on NEGF was employed to analyses electrical characteristics of rectangular and cylindrical silicon nanowire transistors as well as a Double gate MOS FET. A double gate, triple gate, and gate all around nano wires were studied to investigate the impact of increasing the number of gates on the control of the short channel effect which is important in nanoscale devices. Also in the case of triple gate rectangular SNWT inserting extra gates on the bottom of device can improve the application of device. The results indicate that by using gate all around structures short channel effects such as DIBL, subthreshold swing and delay reduces.

Keywords: SNWT (silicon nanowire transistor), non equilibriumGreen's function (NEGF), double gate (DG), triple gate (TG), multiple gate, cylindrical nano wire (CW), rectangular nano wire(RW), Poisson_ Schrödinger solver, drain induced barrier lowering(DIBL).

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236 Floating Offshore Wind: A Review of Installation Vessel Requirements

Authors: A. P. Crowle

Abstract:

Floating offshore wind farms may provide in the future large quantities of renewable energy. One of the challenges to their future development is the provision of installation vessels for the offshore installation of floating wind turbines. This paper examines the current fleet of vessels that can be used for inshore construction. Separate vessels are required for the ocean tow out and the offshore installation. Information will be provided on what new vessels might be required to improve the efficiency and reduce costs of installing floating wind turbines. Specialized cargo vessels are required for this initial mobilization. Anchor handling vessels are required to tow the floating wind turbine offshore and to install and connect the moorings. Subsea work vessels are required to install the dynamic cables whilst cable lay vessels are required for the export power cable. This paper reviews the existing and future installation vessel requirement for floating wind. Dedicated ports are required for vertical integration of the substructure and the tower, nacelle and blades.

Keywords: Floating wind, naval architecture, offshore installation vessels, ports for renewable energy.

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235 Performance Analysis of BPJLT with Different Gate and Spacer Materials

Authors: Porag Jyoti Ligira, Gargi Khanna

Abstract:

The paper presents a simulation study of the electrical characteristic of Bulk Planar Junctionless Transistor (BPJLT) using spacer. The BPJLT is a transistor without any PN junctions in the vertical direction. It is a gate controlled variable resistor. The characteristics of BPJLT are analyzed by varying the oxide material under the gate. It can be shown from the simulation that an ideal subthreshold slope of ~60 mV/decade can be achieved by using highk dielectric. The effects of variation of spacer length and material on the electrical characteristic of BPJLT are also investigated in the paper. The ION / IOFF ratio improvement is of the order of 107 and the OFF current reduction of 10-4 is obtained by using gate dielectric of HfO2 instead of SiO2.

Keywords: BPJLT, double gate, high-k, spacer.

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234 A Processor with Dynamically Reconfigurable Circuit for Floating-Point Arithmetic

Authors: Yukinari Minagi , Akinori Kanasugi

Abstract:

This paper describes about dynamic reconfiguration to miniaturize arithmetic circuits in general-purpose processor. Dynamic reconfiguration is a technique to realize required functions by changing hardware construction during operation. The proposed arithmetic circuit performs floating-point arithmetic which is frequently used in science and technology. The data format is floating-point based on IEEE754. The proposed circuit is designed using VHDL, and verified the correct operation by simulations and experiments.

Keywords: dynamic reconfiguration, floating-point arithmetic, double precision, FPGA

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233 Inversion Layer Effective Mobility Model for Pocket Implanted Nano Scale n-MOSFET

Authors: Muhibul Haque Bhuyan, Quazi D. M. Khosru

Abstract:

Carriers scattering in the inversion channel of n- MOSFET dominates the drain current. This paper presents an effective electron mobility model for the pocket implanted nano scale n-MOSFET. The model is developed by using two linear pocket profiles at the source and drain edges. The channel is divided into three regions at source, drain and central part of the channel region. The total number of inversion layer charges is found for these three regions by numerical integration from source to drain ends and the number of depletion layer charges is found by using the effective doping concentration including pocket doping effects. These two charges are then used to find the effective normal electric field, which is used to find the effective mobility model incorporating the three scattering mechanisms, such as, Coulomb, phonon and surface roughness scatterings as well as the ballistic phenomena for the pocket implanted nano-scale n-MOSFET. The simulation results show that the derived mobility model produces the same results as found in the literatures.

Keywords: Linear Pocket Profile, Pocket Implanted n-MOSFET, Effective Electric Field and Effective Mobility Model.

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232 Transient Analysis & Performance Estimation of Gate Inside Junctionless Transistor (GI-JLT)

Authors: Sangeeta Singh, Pankaj Kumar, P. N. Kondekar

Abstract:

In this paper, the transient device performance analysis of n-type Gate Inside JunctionLess Transistor (GI-JLT) has been evaluated. 3-D Bohm Quantum Potential (BQP) transport device simulation has been used to evaluate the delay and power dissipation performance. GI-JLT has a number of desirable device parameters such as reduced propagation delay, dynamic power dissipation, power and delay product, intrinsic gate delay and energy delay product as compared to Gate-all-around transistors GAA-JLT. In addition to this, various other device performance parameters namely, on/off current ratio, short channel effects (SCE), transconductance Generation Factor (TGF) and unity gain cut-off frequency (fT ) and subthreshold slope (SS) of the GI-JLT and GAA-JLT have been analyzed and compared. GI-JLT shows better device performance characteristics than GAA-JLT for low power and high frequency applications, because of its larger gate electrostatic control on the device operation.

Keywords: Gate-inside junctionless transistor GI-JLT, Gate-all-around junctionless transistor GAA-JLT, propagation delay, power delay product.

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231 Protection of Floating Roof Petroleum Storage Tanks against Lightning Strokes

Authors: F. M. Mohamed, A. Y. Abdelaziz

Abstract:

The subject of petroleum storage tank fires has gained a great deal of attention due to the high cost of petroleum, and the consequent disruption of petroleum production; therefore, much of the current research has focused on petroleum storage tank fires. Also, the number of petroleum tank fires is oscillating between 15 and 20 fires per year. About 33% of all tank fires are attributed to lightning. Floating roof tanks (FRT’s) are especially vulnerable to lightning. To minimize the likelihood of a fire, the API RP 545 recommends three major modifications to floating roof tanks. This paper was inspired by a stroke of lightning that ignited a fire in a crude oil storage tank belonging to an Egyptian oil company, and is aimed at providing an efficient lightning protection system to the tank under study, in order to avoid the occurrence of such phenomena in the future and also, to give valuable recommendations to be applied to floating roof tank projects.

Keywords: Crude oil, fire, floating roof tank, lightning protection system.

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230 Effect of Alginate and Surfactant on Physical Properties of Oil Entrapped Alginate Bead Formulation of Curcumin

Authors: Arpa Petchsomrit, Namfa Sermkaew, Ruedeekorn Wiwattanapatapee

Abstract:

Oil entrapped floating alginate beads of curcumin were developed and characterized. Cremophor EL, Cremophor RH and Tween 80 were utilized to improve the solubility of the drug. The oil-loaded floating gel beads prepared by emulsion gelation method contained sodium alginate, mineral oil and surfactant. The drug content and % encapsulation declined as the ratio of surfactant was increased. The release of curcumin from 1% alginate beads was significantly more than for the 2% alginate beads. The drug released from the beads containing 25% of Tween 80 was about 70% while a higher drug release was observed with the beads containing Cremophor EL or Cremohor RH (approximately 90%). The developed floating beads of curcumin powder with surfactant provided a superior drug release than those without surfactant. Floating beads based on oil entrapment containing the drug solubilized in surfactants is a new delivery system to enhance the dissolution of poorly soluble drugs.

Keywords: Alginate, curcumin, floating drug delivery, oil entrapped bead.

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229 Architectural Approaches to a Sustainable Community with Floating Housing Units Adapting to Climate Change and Sea Level Rise in Vietnam

Authors: Nguyen Thi Thu Trang

Abstract:

Climate change and sea level rise is one of the greatest challenges facing human beings in the 21st century. Because of sea level rise, several low-lying coastal areas around the globe are at risk of being completely submerged, disappearing under water. Particularly in Viet Nam, the rise in sea level is predicted to result in more frequent and even permanently inundated coastal plains. As a result, land reserving fund of coastal cities is going to be narrowed in near future, while construction ground is becoming increasingly limited due to a rapid growth in population. Faced with this reality, the solutions are being discussed not only in tradition view such as accommodation is raised or moved to higher areas, or “living with the water”, but also forwards to “living on the water”. Therefore, the concept of a sustainable floating community with floating houses based on the precious value of long term historical tradition of water dwellings in Viet Nam would be a sustainable solution for adaptation of climate change and sea level rise in the coastal areas. The sustainable floating community is comprised of sustainability in four components: architecture, environment, socio-economic and living quality. This research paper is focused on sustainability in architectural component of floating community. Through detailed architectural analysis of current floating houses and floating communities in Viet Nam, this research not only accumulates precious values of traditional architecture that need to be preserved and developed in the proposed concept, but also illustrates its weaknesses that need to address for optimal design of the future sustainable floating communities. Based on these studies the research would provide guidelines with appropriate architectural solutions for the concept of sustainable floating community with floating housing units that are adapted to climate change and sea level rise in Viet Nam.

Keywords: Climate change, floating houses, floating community, Viet Nam.

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228 Low Frequency Noise Behavior of Independent Gate Junctionless FinFET

Authors: A. Kamath, Z. X. Chen, C. J. Gu, F. Zheng, X. P. Wang, N. Singh, G-Q. Lo

Abstract:

In this paper we use low frequency noise analysis to understand and map the current conduction path in a multi gate junctionless FinFET.  The device used in this study behaves as a gated resistor and shows excellent short channel effect suppression due to its multi gate structure. Generally for a bulk conduction device like the junctionless device studied in this work, the low frequency noise can be modelled using the mobility fluctuation model; however for this device we can also see the effect of carrier fluctuations on the LFN characteristic. The noise characteristic at different gate bias and also the possible location of the traps is explained.

Keywords: LFN analysis, junctionless, Current conduction path, FinFET.

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227 A High Time Resolution Digital Pulse Width Modulator Based on Field Programmable Gate Array’s Phase Locked Loop Megafunction

Authors: Jun Wang, Tingcun Wei

Abstract:

The digital pulse width modulator (DPWM) is the crucial building block for digitally-controlled DC-DC switching converter, which converts the digital duty ratio signal into its analog counterpart to control the power MOSFET transistors on or off. With the increase of switching frequency of digitally-controlled DC-DC converter, the DPWM with higher time resolution is required. In this paper, a 15-bits DPWM with three-level hybrid structure is presented; the first level is composed of a7-bits counter and a comparator, the second one is a 5-bits delay line, and the third one is a 3-bits digital dither. The presented DPWM is designed and implemented using the PLL megafunction of FPGA (Field Programmable Gate Arrays), and the required frequency of clock signal is 128 times of switching frequency. The simulation results show that, for the switching frequency of 2 MHz, a DPWM which has the time resolution of 15 ps is achieved using a maximum clock frequency of 256MHz. The designed DPWM in this paper is especially useful for high-frequency digitally-controlled DC-DC switching converters.

Keywords: DPWM, PLL megafunction, FPGA, time resolution, digitally-controlled DC-DC switching converter.

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226 Doping Profile Measurement and Characterization by Scanning Capacitance Microscope for PocketImplanted Nano Scale n-MOSFET

Authors: Muhibul Haque Bhuyan, Farseem Mannan Mohammedy, Quazi Deen Mohd Khosru

Abstract:

This paper presents the doping profile measurement and characterization technique for the pocket implanted nano scale n-MOSFET. Scanning capacitance microscopy and atomic force microscopy have been used to image the extent of lateral dopant diffusion in MOS structures. The data are capacitance vs. voltage measurements made on a nano scale device. The technique is nondestructive when imaging uncleaved samples. Experimental data from the published literature are presented here on actual, cleaved device structures which clearly indicate the two-dimensional dopant profile in terms of a spatially varying modulated capacitance signal. Firstorder deconvolution indicates the technique has much promise for the quantitative characterization of lateral dopant profiles. The pocket profile is modeled assuming the linear pocket profiles at the source and drain edges. From the model, the effective doping concentration is found to use in modeling and simulation results of the various parameters of the pocket implanted nano scale n-MOSFET. The potential of the technique to characterize important device related phenomena on a local scale is also discussed.

Keywords: Linear Pocket Profile, Pocket Implanted n-MOSFET, Scanning Capacitance Microscope, Atomic Force Microscope.

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225 Ambipolar Effect Free Double Gate PN Diode Based Tunnel FET

Authors: Hardik Vaghela, Mamta Khosla, Balwindar Raj

Abstract:

In this paper, we present and investigate a double gate PN diode based tunnel field effect transistor (DGPNTFET). The importance of proposed structure is that the formation of different drain doping is not required and ambipolar effect in OFF state is completely removed for this structure. Validation of this structure to behave like a Tunnel Field Effect Transistor (TFET) is carried out through energy band diagrams and transfer characteristics. Simulated result shows point subthreshold slope (SS) of 19.14 mV/decade and ON to OFF current ratio (ION / IOFF) of 2.66 × 1014 (ION at VGS=1.5V, VDS=1V and IOFF at VGS=0V, VDS=1V) for gate length of 20nm and HfO2 as gate oxide at room temperature. Which indicate that the DGPNTFET is a promising candidate for nano-scale, ambipolar free switch.

Keywords: Ambipolar effect, double gate PN diode based tunnel field effect transistor, high-κ dielectric material, subthreshold slope, tunnel field effect transistor.

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224 Development and Evaluation of Gastro Retentive Floating Tablets of Ayurvedic Vati Formulation

Authors: Imran Khan Pathan, Anil Bhandari, Peeyush K. Sharma, Rakesh K. Patel, Suresh Purohit

Abstract:

Floating tablets of Marichyadi Vati were developed with an aim to prolong its gastric residence time and increase the bioavailability of drug. Rapid gastrointestinal transit could result in incomplete drug release from the drug delivery system above the absorption zone leading to diminished efficacy of the administered dose. The tablets were prepared by wet granulation technique, using HPMC E50 LV act as Matrixing agent, Carbopol as floating enhancer, microcrystalline cellulose as binder, Sodium bi carbonate as effervescent agent with other excipients. The simplex lattice design was used for selection of variables for tablets formulation. Formulation was optimized on the basis of floating time and in vitro drug release. The results showed that the floating lag time for optimized formulation was found to be 61 second with about 97.32 % of total drug release within 3 hours. The vitro release profiles of drug from the formulation could be best expressed zero order with highest linearity r2 = 0.9943. It was concluded that the gastroretentive drug delivery system can be developed for Marichyadi Vati containing Piperine to increase the residence time of the drug in the stomach and thereby increasing bioavailability.

Keywords: Piperine, Marichyadi Vati, Gastroretentive drug delivery, Floating tablet.

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223 A Tutorial on Dynamic Simulation of DC Motor and Implementation of Kalman Filter on a Floating Point DSP

Authors: Padmakumar S., Vivek Agarwal, Kallol Roy

Abstract:

With the advent of inexpensive 32 bit floating point digital signal processor-s availability in market, many computationally intensive algorithms such as Kalman filter becomes feasible to implement in real time. Dynamic simulation of a self excited DC motor using second order state variable model and implementation of Kalman Filter in a floating point DSP TMS320C6713 is presented in this paper with an objective to introduce and implement such an algorithm, for beginners. A fractional hp DC motor is simulated in both Matlab® and DSP and the results are included. A step by step approach for simulation of DC motor in Matlab® and “C" routines in CC Studio® is also given. CC studio® project file details and environmental setting requirements are addressed. This tutorial can be used with 6713 DSK, which is based on floating point DSP and CC Studio either in hardware mode or in simulation mode.

Keywords: DC motor, DSP, Dynamic simulation, Kalman Filter

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222 Seismic Retrofitting of RC Buildings with Soft Storey and Floating Columns

Authors: Vinay Agrawal, Suyash Garg, Ravindra Nagar, Vinay Chandwani

Abstract:

Open ground storey with floating columns is a typical feature in the modern multistory constructions in urban India. Such features are very much undesirable in buildings built in seismically active areas. The present study proposes a feasible solution to mitigate the effects caused due to non-uniformity of stiffness and discontinuity in load path and to simultaneously hold the functional use of the open storey particularly under the floating column, through a combination of various lateral strengthening systems. An investigation is performed on an example building with nine different analytical models to bring out the importance of recognising the presence of open ground storey and floating columns. Two separate analyses on various models of the building namely, the equivalent static analysis and the response spectrum analysis as per IS: 1893-2002 were performed. Various measures such as incorporation of Chevron bracings and shear walls, strengthening the columns in the open ground storey, and their different combinations were examined. The analysis shows that, in comparison to two short ones separated by interconnecting beams, the structural walls are most effective when placed at the periphery of the buildings and used as one long structural wall. Further, it can be shown that the force transfer from floating columns becomes less horizontal when the Chevron Bracings are placed just below them, thereby reducing the shear forces in the beams on which the floating column rests.

Keywords: Equivalent static analysis, floating column, open ground storey, response spectrum analysis, shear wall, stiffness irregularity.

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221 Analysis of Current Mirror in 32nm MOSFET and CNTFET Technologies

Authors: Mohini Polimetla, Rajat Mahapatra

Abstract:

There is need to explore emerging technologies based on carbon nanotube electronics as the MOS technology is approaching its limits. As MOS devices scale to the nano ranges, increased short channel effects and process variations considerably effect device and circuit designs. As a promising new transistor, the Carbon Nanotube Field Effect Transistor(CNTFET) avoids most of the fundamental limitations of the Traditional MOSFET devices. In this paper we present the analysis and comparision of a Carbon Nanotube FET(CNTFET) based 10(A current mirror with MOSFET for 32nm technology node. The comparision shows the superiority of the former in terms of 97% increase in output resistance,24% decrease in power dissipation and 40% decrease in minimum voltage required for constant saturation current. Furthermore the effect on performance of current mirror due to change in chirality vector of CNT has also been investigated. The circuit simulations are carried out using HSPICE model.

Keywords: Carbon Nanotube Field Effect Transistor, Chirality Vector, Current Mirror

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220 Approaches to Promote Healthy Recreation Activities for Elderly Tourists at Bang Nam Phueng Floating Market, Prapradeang District, Samutprakarn Province

Authors: Sasitorn Chetanont

Abstract:

The objectives of this study are to find out the approaches to promote healthy recreation activities for elderly tourists and develop Bang Nam Phueng Floating Market to be a health tourism attraction. The research methodology was to analyze internal and external situations according to MP-MF and the MCSTEPS principles. As for the results of this study the researcher found that the healthy recreational activities for elderly tourists could be divided in 7 groups; travelling Bang Nam Phueng Floating Market activity, homestay relaxation, arts center platform activity, healthy massage activity, paying homage to a Buddha image activity, herbal joss-stick home activity, making local desserts and food activity.

Keywords: Elderly tourists, recreational activities, Bang Nam Phueng Floating Market.

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219 The Relationship between the Architectural Style of the Area’s Residential Waterfront Communities of Bangnoi Floating Bangkhonthi Districts Samut Songkhram Province

Authors: Kunyaphat Thanakunwutthirot

Abstract:

Bangnoi Floating Market located at Bangkhonthi Districts Samut Songkhram Province is a valuable architectural market. The lifestyle of the community's relationship with the living space and the relationship between the architectural style of the area's residential waterfront communities of Bangnoi Floating Bangkhonthi Districts Samut Songkhram Province, which deserves to be preserved. Therefore, this research it helps to know the value of the architectural style of the area's residential waterfront communities of Bangnoi Floating Bangkhonthi Districts SamutSongkhram Province, which deserves to be preserved.

Keywords: Bangnoi Floating Market, floor plan of riverside community architecture, riverside architectural identity, style of riverside community architecture utility space.

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218 Digital Filter for Cochlear Implant Implemented on a Field- Programmable Gate Array

Authors: Rekha V. Dundur , M.V.Latte, S.Y. Kulkarni, M.K.Venkatesha

Abstract:

The advent of multi-million gate Field Programmable Gate Arrays (FPGAs) with hardware support for multiplication opens an opportunity to recreate a significant portion of the front end of a human cochlea using this technology. In this paper we describe the implementation of the cochlear filter and show that it is entirely suited to a single device XC3S500 FPGA implementation .The filter gave a good fit to real time data with efficiency of hardware usage.

Keywords: Cochlea, FPGA, IIR (Infinite Impulse Response), Multiplier.

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217 Comparative Study of Al2O3 and HfO2 as Gate Dielectric on AlGaN/GaN MOSHEMTs

Authors: K. Karami, S. Hassan, S. Taking, A. Ofiare, A. Dhongde, A. Al-Khalidi, E. Wasige

Abstract:

We have made a comparative study on the influence of Al2O3 and HfO2 grown using Atomic Layer Deposition (ALD) technique as dielectric in the AlGaN/GaN metal oxide semiconductor high electron mobility transistor (MOS-HEMT) structure. Five samples consisting of 20 nm and 10 nm each of A2lO3 and HfO2 respectively and a Schottky gate HEMT, were fabricated and measured. The threshold voltage shifts towards negative by 0.1 V and 1.8 V for 10 nm thick HfO2 and 10 nm thick Al2O3 gate dielectric layers, respectively. The negative shift for the 20 nm HfO2 and 20 nm Al2O3 were 1.2 V and 4.9 V, respectively. Higher gm/IDS (transconductance to drain current) ratio was also obtained in HfO2 than Al2O3. With both materials as dielectric, a significant reduction in the gate leakage current in the order of 104 was obtained compared to the sample without the dielectric material.

Keywords: AlGaN/GaN HEMTs, Al2O3, HfO2, MOSHEMTs.

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216 Very High Speed Data Driven Dynamic NAND Gate at 22nm High K Metal Gate Strained Silicon Technology Node

Authors: Shobha Sharma, Amita Dev

Abstract:

Data driven dynamic logic is the high speed dynamic circuit with low area. The clock of the dynamic circuit is removed and data drives the circuit instead of clock for precharging purpose. This data driven dynamic nand gate is given static forward substrate biasing of Vsupply/2 as well as the substrate bias is connected to the input data, resulting in dynamic substrate bias. The dynamic substrate bias gives the shortest propagation delay with a penalty on the power dissipation. Propagation delay is reduced by 77.8% compared to the normal reverse substrate bias Data driven dynamic nand. Also dynamic substrate biased D3nand’s propagation delay is reduced by 31.26% compared to data driven dynamic nand gate with static forward substrate biasing of Vdd/2. This data driven dynamic nand gate with dynamic body biasing gives us the highest speed with no area penalty and finds its applications where power penalty is acceptable. Also combination of Dynamic and static Forward body bias can be used with reduced propagation delay compared to static forward biased circuit and with comparable increase in an average power. The simulations were done on hspice simulator with 22nm High-k metal gate strained Si technology HP models of Arizona State University, USA.

Keywords: Data driven nand gate, dynamic substrate biasing, nand gate, static substrate biasing.

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215 The Behavior and Satisfaction of Tourists Affecting the Sustainable Tourism at the Amphawa Floating Market in Samut Songkhram Province

Authors: Chanpen Meenakorn

Abstract:

This research aims to study; (1) behavior of the tourists affecting the satisfaction level of tourism at the Amphawa floating market in Samut Songkhram province, (2) to study the satisfaction level of tourism at the Amphawa floating market. The research method will use quantitative research; data was collected by questionnaires distributed to the tourist who visits the Amphawa floating market for 480 samples. Data was analyzed by SPSS software to process descriptive statistic including frequency, percentage, mean, standard deviation and inferential statistic is t-test, F-test, and chi-square. The results showed that the behavior of tourists had known tourist attractions in the province comes from the mouth of relatives and friends suggested that he come here before and the reasons to visit is to want to pay homage to the various temples for the frequency to visit travel an average of 2-4 times and  the satisfaction of the tourists in the province found that the satisfaction level of tourists in the province at the significant level of the place, convenient  and services have a high level of satisfaction.

Keywords: Amphawa floating market behavior of the tourists, satisfaction level, sustainable tourism, Samut Songkhram province.

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214 Study on Connecting Method of Box Pontoons

Authors: Young-Jun You, Youn-Ju Jeong, Min-Su Park, Du-Ho Lee

Abstract:

Due to a lot of limited conditions, a large box type floating structure is inevitably constructed by connecting many pontoons. When a floating structure is made with concrete, concrete shear key with saw-teeth shape is often used to carry shear force. Match casting for the shear key and precise construction on a sea are very important for making separated two pontoons as one body but those are not easy work and may increase construction time and cost. To solve this problem, one-way shear key is studied in this paper for a connected part where there is some difference between upward and downward shear force. It has only one inclined plane and can resist shear force in one direction. Big shear force is resisted by concrete which forms an inclined plane and small shear force is resisted by steel bar. This system can reduce manufacturing cost of individual pontoon and construction time and cost for constructing a floating structure on a sea. In this paper, the feasibility study about one-way shear key system is performed by comparing with design example.

Keywords: Connection, floating container terminal, pontoon, pre-stressing, shear key.

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213 Suppressing Ambipolar Conduction Using Dual Material Gate in Tunnel-FETs Having Heavily Doped Drain

Authors: Dawit Burusie Abdi, Mamidala Jagadesh Kumar

Abstract:

In this paper, using 2D TCAD simulations, the application of a dual material gate (DMG) for suppressing ambipolar conduction in a tunnel field effect transistor (TFET) is demonstrated. Using the proposed DMG concept, the ambipolar conduction can be effectively suppressed even if the drain doping is as high as that of the source doping. Achieving this symmetrical doping, without the ambipolar conduction in TFETs, gives the advantage of realizing both n-type and p-type devices with the same doping sequences. Furthermore, the output characteristics of the DMG TFET exhibit a good saturation when compared to that of the gate-drain underlap approach. This improved behavior of the DMG TFET makes it a good candidate for inverter based logic circuits.

Keywords: Dual material gate, suppressing ambipolar current, symmetrically doped TFET, tunnel FETs, PNPN TFET.

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212 Estimation of the Park-Ang Damage Index for Floating Column Building with Infill Wall

Authors: Susanta Banerjee, Sanjaya Kumar Patro

Abstract:

Buildings with floating column are highly undesirable built in seismically active areas. Many urban multi-storey buildings today have floating column buildings which are adopted to accommodate parking at ground floor or reception lobbies in the first storey. The earthquake forces developed at different floor levels in a building need to be brought down along the height to the ground by the shortest path; any deviation or discontinuity in this load transfer path results in poor performance of the building. Floating column buildings are severely damaged during earthquake. Damage on this structure can be reduce by taking the effect of infill wall. This paper presents the effect of stiffness of infill wall to the damage occurred in floating column building when ground shakes. Modelling and analysis are carried out by non linear analysis programme IDARC-2D. Damage occurred in beams, columns, storey are studied by formulating modified Park & Ang model to evaluate damage indices. Overall structural damage indices in buildings due to shaking of ground are also obtained. Dynamic response parameters i.e. lateral floor displacement, storey drift, time period, base shear of buildings are obtained and results are compared with the ordinary moment resisting frame buildings. Formation of cracks, yield, plastic hinge, are also observed during analysis.

Keywords: Floating column, Infill Wall, Park-Ang Damage Index, Damage State.

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