@article{(Open Science Index):https://publications.waset.org/pdf/10003715,
	  title     = {Performance Analysis of BPJLT with Different Gate and Spacer Materials},
	  author    = {Porag Jyoti Ligira and  Gargi Khanna},
	  country	= {},
	  institution	= {},
	  abstract     = {The paper presents a simulation study of the electrical
characteristic of Bulk Planar Junctionless Transistor (BPJLT) using
spacer. The BPJLT is a transistor without any PN junctions in the
vertical direction. It is a gate controlled variable resistor. The
characteristics of BPJLT are analyzed by varying the oxide material
under the gate. It can be shown from the simulation that an ideal
subthreshold slope of ~60 mV/decade can be achieved by using highk
dielectric. The effects of variation of spacer length and material on
the electrical characteristic of BPJLT are also investigated in the
paper. The ION / IOFF ratio improvement is of the order of 107 and the
OFF current reduction of 10-4 is obtained by using gate dielectric of
HfO2 instead of SiO2.},
	    journal   = {International Journal of Electrical and Computer Engineering},
	  volume    = {8},
	  number    = {8},
	  year      = {2014},
	  pages     = {1385 - 1389},
	  ee        = {https://publications.waset.org/pdf/10003715},
	  url   	= {https://publications.waset.org/vol/92},
	  bibsource = {https://publications.waset.org/},
	  issn  	= {eISSN: 1307-6892},
	  publisher = {World Academy of Science, Engineering and Technology},
	  index 	= {Open Science Index 92, 2014},
	}