TY - JFULL AU - Yukinari Minagi and Akinori Kanasugi PY - 2010/9/ TI - A Processor with Dynamically Reconfigurable Circuit for Floating-Point Arithmetic T2 - International Journal of Electronics and Communication Engineering SP - 1268 EP - 1273 VL - 4 SN - 1307-6892 UR - https://publications.waset.org/pdf/13110 PU - World Academy of Science, Engineering and Technology NX - Open Science Index 44, 2010 N2 - This paper describes about dynamic reconfiguration to miniaturize arithmetic circuits in general-purpose processor. Dynamic reconfiguration is a technique to realize required functions by changing hardware construction during operation. The proposed arithmetic circuit performs floating-point arithmetic which is frequently used in science and technology. The data format is floating-point based on IEEE754. The proposed circuit is designed using VHDL, and verified the correct operation by simulations and experiments. ER -