Commenced in January 2007
Paper Count: 30855
Inversion Layer Effective Mobility Model for Pocket Implanted Nano Scale n-MOSFET
Abstract:Carriers scattering in the inversion channel of n- MOSFET dominates the drain current. This paper presents an effective electron mobility model for the pocket implanted nano scale n-MOSFET. The model is developed by using two linear pocket profiles at the source and drain edges. The channel is divided into three regions at source, drain and central part of the channel region. The total number of inversion layer charges is found for these three regions by numerical integration from source to drain ends and the number of depletion layer charges is found by using the effective doping concentration including pocket doping effects. These two charges are then used to find the effective normal electric field, which is used to find the effective mobility model incorporating the three scattering mechanisms, such as, Coulomb, phonon and surface roughness scatterings as well as the ballistic phenomena for the pocket implanted nano-scale n-MOSFET. The simulation results show that the derived mobility model produces the same results as found in the literatures.
Digital Object Identifier (DOI): doi.org/10.5281/zenodo.1079342Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1514
 S. M. Sze, "Physics of Semiconductor Devices," 2nd Edition, John Wiley and Sons, New York, ch. 8, 1981.
 M. Orlowski, C. Mazure and F. Lau, "Submicron short channel effects due to gate reoxidation induced lateral interstitial diffusion," IEEE IEDM Tech. Digest, p. 632, 1987.
 M. Nishida and H. Onodera, "An anomalous increase of threshold voltage with shortening the channel lengths for deeply boron-implanted n-channel MOSFETs," IEEE Trans. on Electron Devices, vol. 48, pp. 1101, 1981.
 K. Y. Lim and X. Zhou, "Modeling of Threshold Voltage with Nonuniform Substrate Doping," in Proc. of the IEEE International Conference on Semiconductor Electronics (ICSE 1998), Malaysia, pp. 27-31, 1998.
 B. Yu, C. H. Wann, E. D. Nowak, K. Noda and C. Hu, "Short Channel Effect improved by lateral channel engineering in deep-submicrometer MOSFETs," IEEE Transactions on Electron Devices, vol. 44, pp. 627- 633, April 1997.
 B. Yu, H. Wang, O. Millic, Q. Xiang, W. Wang, J. X. An and M. R. Lin, "50 nm gate length CMOS transistor with super-halo: Design, process and reliability," IEDM Technical Digest, pp. 653-656, 1999.
 K. M. Cao, W. Liu, X. Jin, K. Vasant, K. Green, J. Krick, T. Vrotsos and C. Hu, "Modeling of pocket implanted MOSFETs for anomalous analog behavior," IEEE IEDM Technical Digest, pp. 171-174, 1999.
 Y. S. Pang and J. R. Brews, "Models for subthreshold and above subthreshold currents in 0.1 ╬╝m pocket n-MOSFETs for low voltage applications," IEEE Transactions on Electron Devices, vol. 49, pp. 832- 839, May 2002.
 P. Klein and S. Chladek, "A New Mobility Model for Pocket Implanted Quarter Micron n-MOSFETs and Below," IEEE IEDM Technical Digest, pp. 1587-1590, 2001.
 T. Ando, A. B. Fowler and F. Stern, "Electronic properties of twodimensional systems," Rev. Mod. Phys., vol. 54, no. 2, pp. 437-472, 1982.
 S. Takagi, A. Toriumi, M. Iwase, and H. Tango, "On the University of Inversion Layer Mobility in Si MOSFET-s: Part I-Effects of Surface Impurity Concentration," IEEE Transactions on Electron Devices, vol. 41, pp. 2357-2362, 1994.
 B. Lemaitre, "An improved analytical LDD-MOSFET model for digital and analog circuit simulation for all channel length down to deepsubmicron," IEEE IEDM Technical Digest, 1991.
 R. M. D. A. Velghe, D. B. M. Klaassen and F. M. Klaassen, "Compact MOS modeling for analog circuit simulation," IEEE IEDM Technical Digest, pp. 485-488, 1993.
 Y. Cheng et. al., BSIM3v3 Manual, University of California, 1996.
 Y. P. Tsividis, "Operation and Modeling of the MOS Transistor," New York, McGraw-Hill, 1999.
 A. G. Sabnis and J. T. Clemens, "Characterization of the electron mobility in the inverted <100> Si," IEEE IEDM Technical Digest, 1979, pp. 18-21.
 S. Villa, A. L. Lacaita, L. M. Perron and R. Bez, "A Physically-Based Model of the Effective Mobility in Heavily-Doped n-MOSFETs," IEEE Transactions on Electron Devices, vol. 45, no. 1, pp. 110-115, 1998.
 M. H. Bhuyan and Q. D. M. Khosru, "Linear pocket profile based threshold voltage model for sub-100 nm n-MOSFET incorporating substrate and drain bias effects," in Proc. of the 5th International Conference on Electrical and Computer Engineering (ICECE 2008), Dhaka, December 20-22, 2008, pp. 447-451.
 M. H. Bhuyan and Q. D. M. Khosru, "Linear profile based analytical surface potential model for pocket implanted sub-100 nm n-MOSFET," Journal of Electron Devices, ISSN 1682-3427, vol. 7, pp 235-240, April 2010.
 M. H. Bhuyan and Q. D. M. Khosru, "An analytical subthreshold drain current model for pocket implanted nano scale n-MOSFET," Journal of Electron Devices, ISSN 1682-3427, vol. 8, pp 263-267, October 2010.
 S. C. Sun and J. D. Plummer, "Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfaces," IEEE Transactions on Electron Devices, vol. 27, pp. 1497-1508, August 1980.
 S. W. Lee, "Universality of mobility-gate field charactersitics of electrons in the inversion charge layer and its application in MOSFET modeling," IEEE Transactions on Computer-Aided Design, vol. 8, no. 7, pp. 724-730, 1989.
 H. Shin, G. M. Yeric, A. F. Tasch, and C. M. Maziar, "Physically-based models for effective mobility and local-field mobility of electrons in MOS inversion layers," Solid-State Electronics, vol. 34, no. 6, pp. 545-552, 1991.
 F. Gamiz, J. Lopez-Villanueva, J. Banqueri, J. Carceller and P. Cartujo, "A comparison of models for phonon scattering in silicon inversion layers," Journal of Applied Physics, vol. 77, pp. 4128-4130, 1995.
 S. M. Goodnick, D. K. Ferry, C. W. Wilmsen, Z. Liliental, D. Fathy and O. L. Krivanek, "Surface roughness at the Si(100)-SiO2 interface," Phys. Rev. B, vol. 32, pp. 8171-8196, 1985.
 N. D. Arora and G. SH. Gindenblat, "A semi-empirical model of the MOSFET inversion layer mobility for low-temperature operation," IEEE Transactions on Electron Devices, vol. 34, no. 1, pp. 89-93, 1987.
 C. Lombardi, S. Manzini, A. Saporito and M. Vanzi, "A physicallybased mobility model for numerical simulation of non planar devices," IEEE Transactions on Computer-Aided Design, vol. 7, no. 11, pp. 1164- 1170, 1988.
 S. Takagi, A. Toriumi, M. Iwase and H. Tango, "On the University of Inversion Layer Mobility in Si MOSFET-s: Part II-Effects of Surface Orientation," IEEE Transactions on Electron Devices, vol. 41, pp. 2363- 2368, 1994.
 A. A. Kastalsky and M. S. Shur, "Conductance of small semiconductor devices," Solid-State Commun., vol. 39, no. 6, p. 715, 1981.
 K. Lee and M. S. Shur, "Impedance of thin semiconductor films," J. Appl. Phys., vol. 54, no. 7, pp. 4028-4034, July 1983.
 M. Dyakonov and M. S. Shur, "Ballistic transport in high mobility semiconductor," in The Physics of Semiconductors, M. Scheffler and R. Zimmermann, Eds. Singapore: World Scientific, pp. 145-148, 1996.
 M. S. Shur, "Low ballistic mobility in submicron HEMTs," IEEE Electron Device Letters., vol. 23, pp. 511-513, 2002.
 M. S. Shur and L. F. Eastman, "Near ballistic transport in GaAs at 77 K," in Proc. 7th Biennial Cornell Conference Active Microwave Devices and Circuits, Ithaca, NY, USA, pp. 389-400, August 1979.
 M. S. Shur and L. F. Eastman, "Ballistic transport in semiconductors at low-temperatures for low power high speed logic," IEEE Transactions on Electron Devices, vol. ED-26, pp. 1677-1683, November 1979.
 L. Pfeiffer, K. W. West, H. L. Stormer, and K. W. Baldwin, "Electron mobilities exceeding 10 cm2/V.s in modulation-doped GaAs," Applied Physics Letters, vol. 55, no. 18, pp. 1888-1890, 1989.
 K. Lee, J.-S. Choi, S.-P. Sim and C.-K Kim, "Physical understanding of low field carrier mobility in Si MOSFET inversion layer," IEEE Transactions on Electron Devices, vol. 38, no. 8, pp. 1905-1911, 1991.