Commenced in January 2007
Paper Count: 30999
A Processor with Dynamically Reconfigurable Circuit for Floating-Point Arithmetic
Abstract:This paper describes about dynamic reconfiguration to miniaturize arithmetic circuits in general-purpose processor. Dynamic reconfiguration is a technique to realize required functions by changing hardware construction during operation. The proposed arithmetic circuit performs floating-point arithmetic which is frequently used in science and technology. The data format is floating-point based on IEEE754. The proposed circuit is designed using VHDL, and verified the correct operation by simulations and experiments.
Digital Object Identifier (DOI): doi.org/10.5281/zenodo.1080514Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1178
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