Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 4

Search results for: double precision

4 Wall Heat Flux Mapping in Liquid Rocket Combustion Chamber with Different Jet Impingement Angles

Authors: O. S. Pradeep, S. Vigneshwaran, K. Praveen Kumar, K. Jeyendran, V. R. Sanal Kumar

Abstract:

The influence of injector attitude on wall heat flux plays an important role in predicting the start-up transient and also determining the combustion chamber wall durability of liquid rockets. In this paper comprehensive numerical studies have been carried out on an idealized liquid rocket combustion chamber to examine the transient wall heat flux during its start-up transient at different injector attitude. Numerical simulations have been carried out with the help of a validated 2d axisymmetric, double precision, pressure-based, transient, species transport, SST k-omega model with laminar finite rate model for governing turbulent-chemistry interaction for four cases with different jet intersection angles, viz., 0o, 30o, 45o, and 60o. We concluded that the jets intersection angle is having a bearing on the time and location of the maximum wall-heat flux zone of the liquid rocket combustion chamber during the start-up transient. We also concluded that the wall heat flux mapping in liquid rocket combustion chamber during the start-up transient is a meaningful objective for the chamber wall material selection and the lucrative design optimization of the combustion chamber for improving the payload capability of the rocket.  

Keywords: Combustion Chamber, injector, liquid rocket, rocket engine wall heat flux

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3 A Processor with Dynamically Reconfigurable Circuit for Floating-Point Arithmetic

Authors: Yukinari Minagi , Akinori Kanasugi

Abstract:

This paper describes about dynamic reconfiguration to miniaturize arithmetic circuits in general-purpose processor. Dynamic reconfiguration is a technique to realize required functions by changing hardware construction during operation. The proposed arithmetic circuit performs floating-point arithmetic which is frequently used in science and technology. The data format is floating-point based on IEEE754. The proposed circuit is designed using VHDL, and verified the correct operation by simulations and experiments.

Keywords: FPGA, Dynamic Reconfiguration, double precision, floating-point arithmetic

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2 A Dynamically Reconfigurable Arithmetic Circuit for Complex Number and Double Precision Number

Authors: Haruo Shimada, Akinori Kanasugi

Abstract:

This paper proposes an architecture of dynamically reconfigurable arithmetic circuit. Dynamic reconfiguration is a technique to realize required functions by changing hardware construction during operations. The proposed circuit is based on a complex number multiply-accumulation circuit which is used frequently in the field of digital signal processing. In addition, the proposed circuit performs real number double precision arithmetic operations. The data formats are single and double precision floating point number based on IEEE754. The proposed circuit is designed using VHDL, and verified the correct operation by simulations and experiments.

Keywords: Dynamic Reconfiguration, arithmetic circuit, complex number, double precision

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1 64 bit Computer Architectures for Space Applications – A study

Authors: Niveditha Domse, Kris Kumar, K. N. Balasubramanya Murthy

Abstract:

The more recent satellite projects/programs makes extensive usage of real – time embedded systems. 16 bit processors which meet the Mil-Std-1750 standard architecture have been used in on-board systems. Most of the Space Applications have been written in ADA. From a futuristic point of view, 32 bit/ 64 bit processors are needed in the area of spacecraft computing and therefore an effort is desirable in the study and survey of 64 bit architectures for space applications. This will also result in significant technology development in terms of VLSI and software tools for ADA (as the legacy code is in ADA). There are several basic requirements for a special processor for this purpose. They include Radiation Hardened (RadHard) devices, very low power dissipation, compatibility with existing operational systems, scalable architectures for higher computational needs, reliability, higher memory and I/O bandwidth, predictability, realtime operating system and manufacturability of such processors. Further on, these may include selection of FPGA devices, selection of EDA tool chains, design flow, partitioning of the design, pin count, performance evaluation, timing analysis etc. This project deals with a brief study of 32 and 64 bit processors readily available in the market and designing/ fabricating a 64 bit RISC processor named RISC MicroProcessor with added functionalities of an extended double precision floating point unit and a 32 bit signal processing unit acting as co-processors. In this paper, we emphasize the ease and importance of using Open Core (OpenSparc T1 Verilog RTL) and Open “Source" EDA tools such as Icarus to develop FPGA based prototypes quickly. Commercial tools such as Xilinx ISE for Synthesis are also used when appropriate.

Keywords: RISC MicroProcessor, RPC – RISC Processor Core, PBX – Processor to Block Interface part of the Interconnection Network, BPX – Block to Processor Interface part of the Interconnection Network, FPU – Floating Point Unit, SPU – Signal Processing Unit, WB – Wishbone Interface, CTU – Clock and Test Unit

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