Search results for: SNWT (silicon nanowire transistor)

Authors: Hardik Vaghela, Mamta Khosla, Balwindar Raj

Abstract:

In this paper, we present and investigate a double gate PN diode based tunnel field effect transistor (DGPNTFET). The importance of proposed structure is that the formation of different drain doping is not required and ambipolar effect in OFF state is completely removed for this structure. Validation of this structure to behave like a Tunnel Field Effect Transistor (TFET) is carried out through energy band diagrams and transfer characteristics. Simulated result shows point subthreshold slope (SS) of 19.14 mV/decade and ON to OFF current ratio (I_ON / I_OFF) of 2.66 × 10¹⁴ (I_ON at V_GS=1.5V, V_DS=1V and I_OFF at V_GS=0V, V_DS=1V) for gate length of 20nm and HfO₂ as gate oxide at room temperature. Which indicate that the DGPNTFET is a promising candidate for nano-scale, ambipolar free switch.

Keywords: Ambipolar effect, double gate PN diode based tunnel field effect transistor, high-κ dielectric material, subthreshold slope, tunnel field effect transistor.

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Authors: N. I. Kargin, G. K. Safaraliev, A. S. Gusev, A. O. Sultanov, N. V. Siglovaya, S. M. Ryndya, A. A. Timofeev

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In this paper, an experimental and theoretical study of the processes of mesoporous silicon carbonization during the formation of buffer layers for the subsequent epitaxy of 3C-SiC films and related wide-band-gap semiconductors is performed. Experimental samples were obtained by the method of chemical vapor deposition and investigated by scanning electron microscopy. Analytic expressions were obtained for the effective diffusion factor and carbon atoms diffusion length in a porous system. The proposed model takes into account the processes of Knudsen diffusion, coagulation and overgrowing of pores during the formation of a silicon carbide layer.

Keywords: Silicon carbide, porous silicon, carbonization, electrochemical etching, diffusion.

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Authors: Shahrazed Medeghri, Saad Hamzaoui, Mokhtar Zerdali

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The metallurgical grade silicon (MG-Si) is obtained from the reduction of silica (SiO₂) in an induction furnace or an electric arc furnace. Impurities inherent in reduction process also depend on the quality of the raw material used. Among the applications of the silicon, it is used as a substrate for the photovoltaic conversion of solar energy and this conversion is wider as the purity of the substrate is important. Research is being done where the purpose is looking for new methods of manufacturing and purification of silicon, as well as new materials that can be used as substrates for the photovoltaic conversion of light energy. In this research, the technique of production of silicon in an induction furnace, using a high vacuum for fusion. Diatomaceous Silica (SiO2) used is 99 mass% initial purities, the carbon used is 6N of purity and the particle size of 63μm as starting materials. The final achieved purity of the material was above 50% by mass. These results demonstrate that this method is a technically reliable, and allows obtaining a better return on the amount 50% of silicon.

Keywords: Induction, amorphous silica, carbon microstructure, silicon.

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Authors: Sangeeta Singh, Pankaj Kumar, P. N. Kondekar

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In this paper, the transient device performance analysis of n-type Gate Inside JunctionLess Transistor (GI-JLT) has been evaluated. 3-D Bohm Quantum Potential (BQP) transport device simulation has been used to evaluate the delay and power dissipation performance. GI-JLT has a number of desirable device parameters such as reduced propagation delay, dynamic power dissipation, power and delay product, intrinsic gate delay and energy delay product as compared to Gate-all-around transistors GAA-JLT. In addition to this, various other device performance parameters namely, on/off current ratio, short channel effects (SCE), transconductance Generation Factor (TGF) and unity gain cut-off frequency (fT ) and subthreshold slope (SS) of the GI-JLT and GAA-JLT have been analyzed and compared. GI-JLT shows better device performance characteristics than GAA-JLT for low power and high frequency applications, because of its larger gate electrostatic control on the device operation.

Keywords: Gate-inside junctionless transistor GI-JLT, Gate-all-around junctionless transistor GAA-JLT, propagation delay, power delay product.

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Authors: Jae-Hong Kwon, Myung-Ho Chung, Tae-Yeon Oh, Hyeon-Seok Bae, Byeong-Kwon Ju

Abstract:

End-substitution of quarterthiophene and sexithiophene with hexyl groups leads to highly soluble conjugated oligomers,DZ-dihexylquarterthiophene (DH-4T) and DZ-dihexylsexithiophene (DH-6T). We have characterized these oligomers for optical and electrical properties. We fabricated an organic thin film transistor (OTFT) using the above two air-stable p-type organic semiconductor materials. We obtained a stable characteristic curve. The field effect mobility, Pwas calculated to be 3.2910-4 cm2/Vs for DH-6T based OTFT; while the DH-4T based OTFT had 1.8810-5 cm2/Vs.KeywordsOrganic thin film transistor, DZ-dihexylquarterthiophene, DZ-dihexylsexithiophene.

Keywords: Organic thin film transistor, DZ-dihexylquarterthiophene, DZ-dihexylsexithiophene.

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Authors: Li Long, Thomas Ortlepp

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The transport properties of carriers in polycrystalline silicon film affect the performance of polycrystalline silicon-based devices. They depend strongly on the grain structure, grain boundary trap properties and doping concentration, which in turn are determined by the film deposition and processing conditions. Based on the properties of charge carriers, phonons, grain boundaries and their interactions, the thermoelectric properties of polycrystalline silicon are analyzed with the relaxation time approximation of the Boltzmann transport equation. With this approach, thermal conductivity, electrical conductivity and Seebeck coefficient as a function of grain size, trap properties and doping concentration can be determined. Experiment on heavily doped polycrystalline silicon is carried out and measurement results are compared with the model.

Keywords: Conductivity, polycrystalline silicon, relaxation time approximation, Seebeck coefficient, thermoelectric property.

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Authors: Beibei Han, Yong-Jin Yoon, Muhammad Hamidullah, Angel Tsu-Hui Lin, Woo-Tae Park

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This paper presents the design of a ring-shaped tri-axial fore sensor that can be incorporated into the tip of a guidewire for use in minimally invasive surgery (MIS). The designed sensor comprises a ring-shaped structure located at the center of four cantilever beams. The ringdesign allows surgical tools to be easily passed through which largely simplified the integration process. Silicon nanowires (SiNWs) are used aspiezoresistive sensing elementsembeddedon the four cantilevers of the sensor to detect the resistance change caused by the applied load.An integration scheme with new designed guidewire tip structure having two coils at the distal end is presented. Finite element modeling has been employed in the sensor design to find the maximum stress location in order to put the SiNWs at the high stress regions to obtain maximum output. A maximum applicable force of 5 mN is found from modeling. The interaction mechanism between the designed sensor and a steel wire has been modeled by FEM. A linear relationship between the applied load on the steel wire and the induced stress on the SiNWs were observed.

Keywords: Triaxial MEMS force sensor, Ring shape, Silicon Nanowire, Minimally invasive surgery.

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Authors: Qing Fang, Lianxi Jia, JunFeng Song, Xiaoguang Tu, Mingbin Yu, Andy Eu-jin Lim, Guo Qiang Lo

Abstract:

The first pn-type carrier-induced silicon Bragg-grating filter is demonstrated. The extinction-ratio modulations are 11.5 dB and 10 dB with reverse and forward biases, respectively. 8-Gpbs data rate is achieved with a reverse bias.

Keywords: Silicon photonics, Waveguide grating, Carrier-induced, Extinction-ratio modulation.

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Authors: Isao Tomita

Abstract:

The principle of all-silicon Raman lasers for an output wavelength of 1.3 μm is presented, which employs quasi-phase-matched structures and resonators to enhance the output power. 1.3-μm laser beams for GE-PONs in FTTH systems generated from a silicon device are very important because such a silicon device can be monolithically integrated with the silicon planar lightwave circuits (Si PLCs) used in the GE-PONs. This reduces the device fabrication processes and time and also optical losses at the junctions between optical waveguides of the Si PLCs and Si laser devices when compared with 1.3-μm III-V semiconductor lasers set on the Si PLCs employed at present. We show that the quasi-phase-matched Si Raman laser with resonators can produce about 174 times larger laser power at 1.3 μm (at maximum) than that without resonators for a Si waveguide of Raman gain 20 cm/GW and optical loss 1.2 dB/cm, pumped at power 10 mW, where the length of the waveguide is 3 mm and its cross-section is (1.5 μm)2.

Keywords: All-silicon raman laser, FTTH, GE-PON, quasi-phase-matched structure, resonator.

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Authors: Qing Fang, Lianxi Jia, Junfeng Song, Chao Li, Xianshu Luo, Mingbin Yu, Guoqiang Lo

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In this paper, we demonstrated a 1 × 4 silicon photonic cascaded arrayed waveguide grating, which is fabricated on a SOI wafer with a 220 nm top Si layer and a 2µm buried oxide layer. The measured on-chip transmission loss of this cascaded arrayed waveguide grating is ~ 5.6 dB, including the fiber-to-waveguide coupling loss. The adjacent crosstalk is 33.2 dB. Compared to the normal single silicon photonic arrayed waveguide grating with a crosstalk of ~ 12.5 dB, the crosstalk of this device has been dramatically increased.

Keywords: Silicon photonic, arrayed waveguide grating, high-crosstalk, cascaded structure.

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Authors: V.Fathipour, M. A. Malakootian, S. Fathipour, M. Fathipour

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In this paper we propose a novel RF LDMOS structure which employs a thin strained silicon layer at the top of the channel and the N-Drift region. The strain is induced by a relaxed Si0.8 Ge0.2 layer which is on top of a compositionally graded SiGe buffer. We explain the underlying physics of the device and compare the proposed device with a conventional LDMOS in terms of energy band diagram and carrier concentration. Numerical simulations of the proposed strained silicon laterally diffused MOS using a 2 dimensional device simulator indicate improvements in saturation and linear transconductance, current drivability, cut off frequency and on resistance. These improvements are however accompanied with a suppression in the break down voltage.

Keywords: High Frequency MOSFET, Design of RF LDMOS, Strained-Silicon, LDMOS.

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Authors: Arash Azizi Mazreah, Mohammad Reza Sahebi, Mohammad T. Manzuri Shalmani

Abstract:

To help overcome limits to the density of conventional SRAMs and leakage current of SRAM cell in nanoscaled CMOS technology, we have developed a four-transistor SRAM cell. The newly developed CMOS four-transistor SRAM cell uses one word-line and one bit-line during read/write operation. This cell retains its data with leakage current and positive feedback without refresh cycle. The new cell size is 19% smaller than a conventional six-transistor cell using same design rules. Also the leakage current of new cell is 60% smaller than a conventional sixtransistor SRAM cell. Simulation result in 65nm CMOS technology shows new cell has correct operation during read/write operation and idle mode.

Keywords: SRAM Cell, leakage current, cell area.

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Authors: Wei Sun, Ruilin Zheng, Xuyuan Chen

Abstract:

Micro power sources are required to be used in autonomous microelectromechanical system (MEMS). In this paper,  we designed and fabricated a three dimensional (3D) MEMS supercapacitor, which is consisting of conformal silicon  dioxide/titanium/polypyrrole (PPy) layers on silicon substrate. At first, ''through-structure'' was fabricated on the silicon substrate by high-aspect-ratio deep reactive ion etching (DRIE) method, which enlarges the available surface area significantly. Then the SiO2/Ti/PPy layers grew sequentially on the ³through-structure´. Finally, the supercapacitor was investigated by electrochemical methods.

Keywords: MEMS, Supercapacitor, DRIE, 3D.

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Authors: Q. Wei, D. G. Hwang, Z. Mohy-Udin, D. H. Shin, J. H. Park, M. Y. Kang, J. H. Cho

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This study presents design of a carbon silicon electrode for iontophorsis treatment towards alopecia. The alopecia is a medical description means loss of hair from the body. For solving this problem, the drug need to be delivered into the scalp, therefore, the iontophoresis was chosen to use in this treatment. However, almost common electrodes of iontophoresis device are made with metal material, the electrodes could give patients hurt when they using it, and it is hard to avoid the hair for attaching the hair. For this reason, an electrode is made with silicon material to decrease the hurt from the electrodes, and the carbon material is mixed in it for increasing conductance. The several cones with stainless material on the electrode make the electrode is able to void hair to attach the affected part. According to the results of a vivo-experiment, the carbon silicon electrode showed a good performance and in treatment comfortably.

Keywords: Carbon silicon, drug delivery system, iontophoresis

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Authors: V. Swarnalatha, A. V. Narasimha Rao, P. Pal

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The present research reports the investigation of fast etching of silicon for the fabrication of microelectromechanical systems (MEMS) structures using silicon wet bulk micromachining. Low concentration tetramethyl-ammonium hydroxide (TMAH) and hydroxylamine (NH₂OH) are used as main etchant and additive, respectively. The concentration of NH₂OH is varied to optimize the composition to achieve best etching characteristics such as high etch rate, significantly high undercutting at convex corner for the fast release of the microstructures from the substrate, and improved etched surface morphology. These etching characteristics are studied on Si{100} and Si{110} wafers as they are most widely used in the fabrication of MEMS structures as wells diode, transistors and integrated circuits.

Keywords: KOH, MEMS, micromachining, silicon, TMAH, wet anisotropic etching.

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Authors: Su Jeong Lee, Tae Il Lee, Jung Han Kim, Chul-Hong Kim, Gee Sung Chae, Jae-Min Myoung

Abstract:

The contact resistance between source/drain electrodes and semiconductor layer is an important parameter affecting electron transporting performance in the thin film transistor (TFT). In this work, we introduced a transparent and the solution prossable single-walled carbon nanotube (SWCNT)/Al-doped ZnO nano particle (AZO NP) bilayer electrodes showing low contact resistance with indium-oxide (In2O3) sol gel thin film. By inserting low work function AZO NPs into the interface between the SWCNTs and the In2O3 which has a high energy barrier, we could obtain an electrical Ohmic contact between them. Finally, with the SWCNT-AZO NP bilayer electrodes, we successfully fabricated a TFT showing a field effect mobility of 5.38 cm2/V·s at 250°C.

Keywords: Single-walled carbon nanotube (SWCNT), Al-doped ZnO (AZO) nanoparticle, contact resistance, Thin-film transistor (TFT).

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Authors: J. H. Choi, S. J. Kim, M. S. Jung, S. J. Kim, S. J. Joo, S. C. Kim

Abstract:

There are a many of needs for the development of SiC-based hydrogen sensor for harsh environment applications. We fabricated and investigated Pd/Ta2O5/SiC-based hydrogen sensors with MOS capacitor structure for high temperature process monitoring and leak detection applications in such automotive, chemical and petroleum industries as well as direct monitoring of combustion processes. In this work, we used silicon carbide (SiC) as a substrate to replace silicon which operating temperatures are limited to below 200°C. Tantalum oxide was investigated as dielectric layer which has high permeability for hydrogen gas and high dielectric permittivity, compared with silicon dioxide or silicon nitride. Then, electrical response properties, such as I-V curve and dependence of capacitance on hydrogen concentrations were analyzed in the temperature ranges of room temperature to 500°C for performance evaluation of the sensor.

Keywords: High temperature, hydrogen sensor, SiC, Ta2O5 dielectric layer.

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Authors: Abbas Ghanbari-Malidareh

Abstract:

Silicon is a beneficial element for plant growth. It helps plants to overcome multiple stresses, alleviates metal toxicity and improves nutrient imbalance. Field experiment was conducted as split-split plot arranged in a randomized complete block design with four replications. Irrigation system include continues flooding and deficit as main plots and nitrogen rates N0, N46, N92, and N138 kg/ha as sub plots and silicon rates Si0 & Si500 kg/ha as sub-subplots. Results indicate that grain yield had not significant difference between irrigation systems. Flooding irrigation had higher biological yield than deficit irrigation whereas, no significant difference in grain and straw yield. Nitrogen application increased grain, biological and straw yield. Silicon application increased grain, biological and straw yield but, decreased harvest index. Flooding irrigation had higher number of total tillers / hill than deficit irrigation, but deficit irrigation had higher number of fertile tillers / hill than flooding irrigation. Silicon increased number of filled spikelet and decreased blank spikelet. With high nitrogen application decreased 1000-grain weight. It can be concluded that if the nitrogen application was high and water supplied was available we could have silicon application until increase grain yield.

Keywords: Grain yield, Irrigation, Nitrogen, Rice, Silicon.

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Authors: Stepan Petrosyan, Ashkhen Yesayan, Suren Nersesyan

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We have developed an analytic model for the radial pn-junction in a nanowire (NW) core-shell structure utilizing as a new building block in different semiconductor devices. The potential distribution through the p-n-junction is calculated and the analytical expressions are derived to compute the depletion region widths. We show that the widths of space charge layers, surrounding the core, are the functions of core radius, which is the manifestation of so called classical size effect. The relationship between the depletion layer width and the built-in potential in the asymptotes of infinitely large core radius transforms to square-root dependence specific for conventional planar p-n-junctions. The explicit equation is derived to compute the capacitance of radial p-n-junction. The current-voltage behavior is also carefully determined taking into account the “short base" effects.

Keywords: Snanowire, p-n- junction, barrier capacitance, high injection.

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Authors: Mohini Polimetla, Rajat Mahapatra

Abstract:

There is need to explore emerging technologies based on carbon nanotube electronics as the MOS technology is approaching its limits. As MOS devices scale to the nano ranges, increased short channel effects and process variations considerably effect device and circuit designs. As a promising new transistor, the Carbon Nanotube Field Effect Transistor(CNTFET) avoids most of the fundamental limitations of the Traditional MOSFET devices. In this paper we present the analysis and comparision of a Carbon Nanotube FET(CNTFET) based 10(A current mirror with MOSFET for 32nm technology node. The comparision shows the superiority of the former in terms of 97% increase in output resistance,24% decrease in power dissipation and 40% decrease in minimum voltage required for constant saturation current. Furthermore the effect on performance of current mirror due to change in chirality vector of CNT has also been investigated. The circuit simulations are carried out using HSPICE model.

Keywords: Carbon Nanotube Field Effect Transistor, Chirality Vector, Current Mirror

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Authors: Woei-Shyan Lee, Shuo-Ling Chang

Abstract:

The nanoindentation behaviour and phase transformation of annealed single-crystal silicon wafers are examined. The silicon specimens are annealed at temperatures of 250, 350 and 450ºC, respectively, for 15 minutes and are then indented to maximum loads of 30, 50 and 70 mN. The phase changes induced in the indented specimens are observed using transmission electron microscopy (TEM) and micro-Raman scattering spectroscopy (RSS). For all annealing temperatures, an elbow feature is observed in the unloading curve following indentation to a maximum load of 30 mN. Under higher loads of 50 mN and 70 mN, respectively, the elbow feature is replaced by a pop-out event. The elbow feature reveals a complete amorphous phase transformation within the indented zone, whereas the pop-out event indicates the formation of Si XII and Si III phases. The experimental results show that the formation of these crystalline silicon phases increases with an increasing annealing temperature and indentation load. The hardness and Young’s modulus both decrease as the annealing temperature and indentation load are increased.

Keywords: Nanoindentation, silicon, phase transformation, amorphous, annealing.

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Authors: Nur Syarafina Binti Othman, Tsubasa Jindo, Makato Yamada, Miho Tsuyama, Hitoshi Nakano

Abstract:

A novel method to produce a fast high voltage solid states switch using Insulated Gate Bipolar Transistors (IGBTs) is presented for discharge-pumped gas lasers. The IGBTs are connected in series to achieve a high voltage rating. An avalanche transistor is used as the gate driver. The fast pulse generated by the avalanche transistor quickly charges the large input capacitance of the IGBT, resulting in a switch out of a fast high-voltage pulse. The switching characteristic of fast-high voltage solid state switch has been estimated in the multi-stage series-connected IGBT with the applied voltage of several tens of kV. Electrical circuit diagram and the mythology of fast-high voltage solid state switch as well as experimental results obtained are presented.

Keywords: High voltage, IGBT, Solid states switch.

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Authors: P. Nadimi, D. D. Caviglia, E. Di Zitti

Abstract:

We propose an all optical flip-flop circuit composedof two Silicon-on-insulator microring resonators coupled to straightwaveguides by exploiting the optical bistability behavior due to thenonlinear Kerr effect. We used the transfer matrix analysis toinvestigate continuous wave propagation through microrings, as wellwe considered the nonlinear switching characteristics of an opticaldevice using a double-coupler silicon ring resonator in presence ofthe Kerr nonlinearity, thus obtaining the bistability behavior of theoutput port, the drop port and also inside the silicon microringresonator. It is shown that the bistability behavior depends on thecontrol of the input wavelength.KeywordsAll optical flip-flops, Kerr effect, microringresonator, optical bistability.

Keywords: All optical flip-flops, Kerr effect, microring resonator, optical bistability.

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Authors: Janet Amiri, Shekoofeh Entesari, Kourosh Delavar, Mahshid Saadatmand, Nasrin Aghamohammad Rafie

Abstract:

The beneficial effects of Si are mainly associated with its high deposition in plant tissue and enhancing their strength and rigidity. We investigated the role of Si against cadmium stress in (Echium C) in house green condition. When the seventh leaves was be appeared, plants were pretreated with five levels of Si: 0, 0.2, 0.5, 0.7and 1.5 mM Si (as sodium trisilicate, Na2(SiO2)3) and after that plants were treated with two levels of Cd (30 and 90 mM). The effects of Silicon and Cd were investigated on some physiological and biochemical parameters such as: lipid peroxidation (malondialdehyde (MDA) and other aldehydes, antocyanin and flavonoid content. Our results showed that Cd significantly increased MDA, other aldehydes, antocyanin and flavonoids content in Echium and silicon offset the negative effect and increased tolerance of Echium against Cd stress. From this results we concluded that Si increase membrane integrity and antioxidative ability in this plant against cd stress.

Keywords: Silicon, Cadmium, Echium, MDA, antocyanin, flavonoid

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Authors: Jyoti Narayan, S. Choudhary

Abstract:

Nanowire arrays of copper with uniform diameters have been synthesized by potentiostatic electrochemical metal deposition (EMD) of copper sulphate and potassium chloride solution within the nano-channels of porous Indium-Tin Oxide (ITO), also known as Tin doped Indium Oxide templates. The nanowires developed were fairly continuous with diameters ranging from 110-140 nm along the entire length. Single as well as poly-crystalline copper wires have been prepared by application of appropriate potential during the EMD process. Scanning electron microscopy (SEM), high resolution transmission electron microscopy (HRTEM), small angle electron diffraction (SAED) and atomic force microscopy (AFM) were used to characterize the synthesized nano wires at room temperature. The electrochemical response of synthesized products was evaluated by cyclic voltammetry while surface energy analysis was carried out using a Goniometer.

Keywords: Electro-deposition, Metallic nano-wires, Nanomaterials, Template synthesis

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Authors: Alexey P. Antropov, Alexander V. Ragutkin, Nicolay A. Yashtulov

Abstract:

The original controlled technology for power active nanocomposite membrane-electrode assembly engineering on the basis of porous silicon is presented. The functional nanocomposites were studied by electron microscopy and cyclic voltammetry methods. The application possibility of the obtained nanocomposites as high performance renewable energy sources for micro-power electronic devices is demonstrated.

Keywords: Cyclic voltammetry, electron microscopy, nanotechnology, platinum-palladium nanocomposites, porous silicon, power activity, renewable energy sources.

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Authors: M. Bagci, H. Imrek, Omari M. Khalfan

Abstract:

Materials added to the matrix help improving operating properties of a composite. This experimental study has targeted to investigate this aim where Silicon Oxide particles were added to glass fibre and epoxy resin at an amount of 15% to the main material to obtain a sort of new composite material. Erosive wear behavior of epoxy-resin dipped composite materials reinforced with glass fibre and Silicon Oxide under three different impingement angles (30°, 60° and 90°), three different impact velocities (23, 34 and 53 m/s), two different angular Aluminum abrasive particle sizes (approximately 200 and 400 μm) and the fibre orientation of 45° (45/-45) were investigated. In the test results, erosion rates were obtained as functions of impingement angles, impact velocities, particle sizes and fibre orientation. Moreover, materials with addition of Silicon Oxide filler material exhibited lower wear as compared to neat materials with no added filler material. In addition, SEM views showing worn out surfaces of the test specimens were scrutinized.

Keywords: Erosive wear, fibre orientation, GF/EP, silicon oxide.

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Authors: W. Z. Wang, S. Todd, S. B. Dolmanan, K. B. Lee, L. Yuan, H. F. Sun, S. L. Selvaraj, M.Krishnakumar, G. Q. Lo, S. Tripathy

Abstract:

The crystalline quality of the AlGaN/GaN high electron mobility transistor (HEMT) structure grown on a 200 mm silicon substrate has been investigated using UV-visible micro- Raman scattering and photoluminescence (PL). The visible Raman scattering probes the whole nitride stack with the Si substrate and shows the presence of a small component of residual in-plane stress in the thick GaN buffer resulting from a wafer bowing, while the UV micro-Raman indicates a tensile interfacial stress induced at the top GaN/AlGaN/AlN layers. PL shows a good crystal quality GaN channel where the yellow band intensity is very low compared to that of the near-band-edge transition. The uniformity of this sample is shown by measurements from several points across the epiwafer.

Keywords: Raman, photo luminescence, AlGaN/GaN, HEMT.

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Authors: Arash Azizi Mazreah, Mohammad T. Manzuri Shalmani, Hamid Barati, Ali Barati

Abstract:

This paper presents a novel CMOS four-transistor SRAM cell for very high density and low power embedded SRAM applications as well as for stand-alone SRAM applications. This cell retains its data with leakage current and positive feedback without refresh cycle. The new cell size is 20% smaller than a conventional six-transistor cell using same design rules. Also proposed cell uses two word-lines and one pair bit-line. Read operation perform from one side of cell, and write operation perform from another side of cell, and swing voltage reduced on word-lines thus dynamic power during read/write operation reduced. The fabrication process is fully compatible with high-performance CMOS logic technologies, because there is no need to integrate a poly-Si resistor or a TFT load. HSPICE simulation in standard 0.25μm CMOS technology confirms all results obtained from this paper.

Keywords: Positive feedback, leakage current, read operation, write operation, dynamic energy consumption.

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Authors: Jessie Yiying Quah, Vivian Netto, Jack Sheng Kee, Eric Mouchel La Fosse, Mi Kyoung Park

Abstract:

We present a dextran modified silicon microring resonator sensor for high density antibody immobilization. An array of sensors consisting of three sensor rings and a reference ring was fabricated and its surface sensitivity and the limit of detection were obtained using polyelectrolyte multilayers. The mass sensitivity and the limit of detection of the fabricated sensor ring are 0.35 nm/ng mm-2 and 42.8 pg/mm2 in air, respectively. Dextran modified sensor surface was successfully prepared by covalent grafting of oxidized dextran on 3-aminopropyltriethoxysilane (APTES) modified silicon sensor surface. The antibody immobilization on hydrogel dextran matrix improves 40% compared to traditional antibody immobilization method via APTES and glutaraldehyde linkage.

Keywords: Antibody immobilization, Dextran, Immunosensor, Label-free detection, Silicon micro-ring resonator

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