Analysis of a Novel Strained Silicon RF LDMOS
Authors: V.Fathipour, M. A. Malakootian, S. Fathipour, M. Fathipour
Abstract:
In this paper we propose a novel RF LDMOS structure which employs a thin strained silicon layer at the top of the channel and the N-Drift region. The strain is induced by a relaxed Si0.8 Ge0.2 layer which is on top of a compositionally graded SiGe buffer. We explain the underlying physics of the device and compare the proposed device with a conventional LDMOS in terms of energy band diagram and carrier concentration. Numerical simulations of the proposed strained silicon laterally diffused MOS using a 2 dimensional device simulator indicate improvements in saturation and linear transconductance, current drivability, cut off frequency and on resistance. These improvements are however accompanied with a suppression in the break down voltage.
Keywords: High Frequency MOSFET, Design of RF LDMOS, Strained-Silicon, LDMOS.
Digital Object Identifier (DOI): doi.org/10.5281/zenodo.1331733
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[1] Y. K. Cho, T. M. Roh and J. Kim, "A New Strained -Si Channel Power MOSFET for High perfor,ance Applications," ETRI Journal , vol. 28, no. 2, pp. 253-256, April 2006.
[2] D. Ueda, H. Takagi, and G. Kano, "An ultra-low on-resistance power MOSFET fabricated by using a fully self-aligned process," IEEE Trans. Electron Devices, vol. ED-34, no. 4, pp. 926-930, Apr. 1987.
[3] R. P. Zingg, "On the specific on-resistance of high-voltage and power devices," IEEE Trans. Electron Devices, vol. 51, no. 3, pp. 492-499, Mar. 2004.
[4] P. Li, Y. Su, M. You, and X. Li, "Novel power MOS devices with SiGe/Si heterojunctions," in Proc. ISPSD, Toulouse, France, May 22- 25, 2000, pp. 109-112.
[5] C. Hu, M. H. Chi, and V. M. Patel, "Optimum design of power MOSFETs," IEEE Trans. Electron Devices, vol. ED-31, no. 12, pp. 1693-1700, Dec. 1984.
[6] F.M. Rotella at al., "Modeling, Analysis and design of RF LDMOS Devices Using Harmonic-Balance Device Simulation," IEEE Transactions on microwave theory and techniques, Vol.48, No.6, June 2000.
[7] D. Vasileska, G. Formicone and D. Ferry, "Doping dependence of the mobility enhancement in surface-channel strained-Si layers," Nanotechnology 10 (1999) 147-152. Printed in the UK.
[8] J. B. Rold'any, F. G'amiz, J. A. L'opez-Villanueva and J. E. Carceller, "Understanding the improved performance of strained Si/Si1−xGex channel MOSFETs," Semicond. Sci. Technol. 12 (1997) 1603-1608. Printed in the UK.
[9] J. Welser, J. L. Hoyt and J.F. Gibbons, "Electron mobility enhancement in strained Si n-type metal-oxide semiconductor field-effect transistors," IEEE Electron Device Lett. 15 100, 1994.
[10] F. G'amiz, J.B. Rold'an, J.A. L'opez-Villanueva and P. Cartujo, "Coulomb scattering in strained-silicon inversion layers on Si1−xGex substrates," Appl. Phys. Lett. 69 797, 1996.
[11] J.B. Rold'an, F. G'amiz, J.A. L'opez-Villanueva and J.E. Carceller, "A Monte Carlo study on the electron-transport properties of highperformance strained Si on relaxed Si1−xGex channel MOSFETs," J. Appl. Phys. 80 5121-8, 1996.
[12] C. S. Kim, S. D. Kim, M. Y. Park, and H. K. Yu, "Trenched sinker LDMOSFET(TS-LDMOS) Structure for High Power Amplifier Application above2GHz," ETRI Journal, vol. 25, no. 3, June 2003.
[13] C. K. Maitiy, L. K. Bera and S. Chattopadhyay "Strained-Si heterostructure field effect transistors," Semicond. Sci. Technol. 13, 1225-1246, 1998.
[14] H. Nayfeh, J. L. Hoyt and D. A. Antoniadis, "A Physically Based Analytical Model for the Threshold Voltage of Strained -Si n- MOSFETs," IEEE Transactions on electron Devices, vol. 51, no. 12, Dec. 2004
[15] N. S. Waldron, A. J. Pitera, M. L. Lee, E. A. Fitzgerald, and J. A. del Alamo, "Positive temperature coefficient of impact ionization in strained-Si," IEEE Trans. Electron Devices, vol. 52, no. 7, pp. 1627- 1633, Jul. 2005
[16] T. Irisawa, T. Numata, N. Sugiyama, and S. Takagi, "Physical origin of increase in substrate current and impact ionization efficiency in strained Si n- and p-MOSFETs," in Proc. ICSI-4, May 2005, pp. 102-103.