Search results for: gate capacitance

Authors: Alloysius C. Ogodo, Ositadinma C. Ugbogu, Uzochukwu G. Ekeleme

Abstract:

Food poisoning and infection by bacteria are of public health significance to both developing and developed countries. Samples of ogi (akamu) prepared from white and yellow variety of maize sold in Uturu and Okigwe were analyzed together with the laboratory prepared ogi for bacterial quality using the standard microbiological methods. The analyses showed that both white and yellow variety had total bacterial counts (cfu/g) of 4.0 ×107 and 3.9 x 107 for the laboratory prepared ogi while the commercial ogi had 5.2 x 107 and 4.9 x107, 4.9 x107 and 4.5 x107, 5.4 x107 and 5.0 x107 for Eke-Okigwe, Up-gate and Nkwo-Achara market respectively. The Staphylococcal counts ranged from 2.0 x 102 to 5.0 x102 and 1.0 x 102 to 4.0 x102 for the white and yellow variety from the different markets while Staphylococcal growth was not recorded on the laboratory prepared ogi. The laboratory prepared ogi had no Coliform growth while the commercially prepared ogi had counts of 0.5 x103 to 1.6 x 103 for white variety and 0.3 x 103 to 1.1 x103 for yellow variety respectively. The Lactic acid bacterial count of 3.5x106 and 3.0x106 was recorded for the laboratory ogi while the commercially prepared ogi ranged from 3.2x106 to 4.2x106 (white variety) and 3.0 x106 to 3.9 x106 (yellow). The presence of bacteria isolates from the commercial and laboratory fermented ogi showed that Lactobacillus sp, Leuconostoc sp and Citrobacter sp were present in all the samples, Micrococcus sp and Klebsiella sp were isolated from Eke- Okigwe and ABSU-up-gate markets varieties respectively, E. coli and Staphylococcus sp were present in Eke-Okigwe and Nkwo- Achara markets while Salmonella sp were isolated from the three markets. Hence, there are chances of contracting food borne diseases from commercially prepared ogi. Therefore, there is the need for sanitary measures in the production of fermented cereals so as to minimize the rate of food borne pathogens during processing and storage.

Keywords: Bacterial quality, fermentation, maize, Ogi.

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Authors: V. Hernandez-Perez, M. Abdulkadir, B. J. Azzopardi

Abstract:

In this work, new experimental data for slugging frequency in inclined gas-liquid flow are reported, and a new correlation is proposed. Scale experiments were carried out using a mixture of air and water in a 6 m long pipe. Two different pipe diameters were used, namely, 38 and 67 mm. The data were taken with capacitance type sensors at a data acquisition frequency of 200 Hz over an interval of 60 seconds. For the range of flow conditions studied, the liquid superficial velocity is observed to influence the frequency strongly. A comparison of the present data with correlations available in the literature reveals a lack of agreement. A new correlation for slug frequency has been proposed for the inclined flow, which represents the main contribution of this work.

Keywords: slug frequency, inclined flow

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Authors: Zubair Ahmad, M. H. Sayyad, M. Yaseen, M. Ali

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In this work, an organic compound 5,10,15,20- Tetrakis(3,5-di-tertbutylphenyl)porphyrinatocopper(II) (TDTBPPCu) is studied as an active material for thin film electronic devices. To investigate the electrical properties of TDTBPPCu, junction of TDTBPPCu with heavily doped n-Si and Al is fabricated. TDTBPPCu film was sandwiched between Al and n-Si electrodes. Various electrical parameters of TDTBPPCu are determined. The current-voltage characteristics of the junction are nonlinear, asymmetric and show rectification behavior, which gives the clue of formation of depletion region. This behavior indicates the potential of TDTBPPCu for electronics applications. The current-voltage and capacitance-voltage techniques are used to find the different electronic parameters.

Keywords: P-type, organic semiconductor, Electricalcharacteristics

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Authors: Azza M. Anis, M. M. Abutaleb, Hani F. Ragai, M. I. Eladawy

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This paper presents the characterization and design of a capacitive pressure sensor with LC-based 0.35 µm CMOS readout circuit. SPICE is employed to evaluate the characteristics of the readout circuit and COMSOL multiphysics structural analysis is used to simulate the behavior of the pressure sensor. The readout circuit converts the capacitance variation of the pressure sensor into the frequency output. Simulation results show that the proposed pressure sensor has output frequency from 2.50 to 2.28 GHz in a pressure range from 0.1 to 2 MPa almost linearly. The sensitivity of the frequency shift with respect to the applied pressure load is 0.11 GHz/MPa.

Keywords: CMOS LC-based oscillator, micro pressure sensor, silicon carbide

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Authors: Y. J. Huang, J. D. Yu, B. W. Hong, C. H. Tai, T. C. Kuo

Abstract:

In this paper, a multi-agent robot system is presented. The system consists of four robots. The developed robots are able to automatically enter and patrol a harmful environment, such as the building infected with virus or the factory with leaking hazardous gas. Further, every robot is able to perform obstacle avoidance and search for the victims. Several operation modes are designed: remote control, obstacle avoidance, automatic searching, and so on.

Keywords: autonomous robot, field programmable gate array, obstacle avoidance, ultrasonic sensor, wireless communication.

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Authors: Yngvar Berg, Omid Mirmotahari

Abstract:

In this paper we ultra low-voltage and high speed CMOS domino logic. For supply voltages below 500mV the delay for a ultra low-voltage NAND2 gate is aproximately 10% of a complementary CMOS inverter. Furthermore, the delay variations due to mismatch is much less than for conventional CMOS. Differential domino gates for AND/NAND and OR/NOR operation are presented.

Keywords: Low-voltage, high-speed, NAND, NOR, CMOS.

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Authors: Krzysztof Wawryn, Robert Suszyński, Bogdan Strzeszewski

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This paper presents two prototypes of low power low voltage current mode 9 bit pipelined a/d converters. The first and the second converters are configured of 1.5 bit and 2.5 bit stages, respectively. The a/d converter structures are composed of current mode building blocks and final comparator block which converts the analog current signal into digital voltage signal. All building blocks have been designed in CMOS AMS 0.35μm technology, then simulated to verify proposed concept. The performances of both converters are compared to performances of known current mode and voltage mode switched capacitance converter structures. Low power consumption and small chip area are advantages of the proposed converters.

Keywords: Pipelined converter, a/d converter, low power, lowvoltage, current mode.

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Authors: D. Zabala, N. Sánchez, J. Pinto

Abstract:

A transient heat transfer mathematical model for the prediction of temperature distribution in the car body during primer baking has been developed by considering the thermal radiation and convection in the furnace chamber and transient heat conduction governing equations in the car framework. The car cockpit is considered like a structure with six flat plates, four vertical plates representing the car doors and the rear and front panels. The other two flat plates are the car roof and floor. The transient heat conduction in each flat plate is modeled by the lumped capacitance method. Comparison with the experimental data shows that the heat transfer model works well for the prediction of thermal behavior of the car body in the curing furnace, with deviations below 5%.

Keywords: Transient heat transfer, car body, lumpedcapacitance, primer baking.

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Authors: Wenmin Qu

Abstract:

A capacitance level sensor with a segmented film electrode and a thin-film volume flow sensor with an innovative by-pass sleeve is presented as industrial products for the application in a harsh environment. The working principle of such sensors is well known; however, the traditional sensors show some limitations for certain industrial measurements. The two sensors presented in this paper overcome this limitation and enlarge the application spectrum. The problem is analyzed, and the solution is given. The emphasis of the paper is on developing the problem-solving concepts and the realization of the corresponding measuring circuits. These should give advice and encouragement, how we can still develop electronic measuring products in an almost saturated market.

Keywords: By-pass sleeve, charge transfer circuit, fixed ΔT circuit, harsh environment, industrial application, segmented electrode.

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Authors: Vicente F. P. Aleixo, Augusto C. F. Saraiva, Jordan Del Nero

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The production of devices in nanoscale with specific molecular rectifying function is one of the most significant goals in state-of-art technology. In this work we show by ab initio quantum mechanics calculations coupled with non-equilibrium Green function, the design of an organic two-terminal device. These molecular structures have molecular source and drain with several bridge length (from five up to 11 double bonds). Our results are consistent with significant features as a molecular rectifier and can be raised up as: (a) it can be used as bi-directional symmetrical rectifier; (b) two devices integrated in one (FET with one operational region, and Thyristor thiristor); (c) Inherent stability due small intrinsic capacitance under forward/reverse bias. We utilize a scheme for the transport mechanism based on previous properties of ¤Ç bonds type that can be successfully utilized to construct organic nanodevices.

Keywords: ab initio, Carotenoid, Charge Transfer, Nanodevice

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Authors: Andrew Randles, Ilker Ocak, Cheam Daw Don, Navab Singh, Alex Gu

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Nine Degrees of Freedom (9 DOF) systems are already in development in many areas. In this paper, an integrated pressure sensor is proposed that will make use of an already existing monolithic 9 DOF inertial MEMS platform. Capacitive pressure sensors can suffer from limited sensitivity for a given size of membrane. This novel pressure sensor design increases the sensitivity by over 5 times compared to a traditional array of square diaphragms while still fitting within a 2 mm x 2 mm chip and maintaining a fixed static capacitance. The improved design uses one large diaphragm supported by pillars with fixed electrodes placed above the areas of maximum deflection. The design optimization increases the sensitivity from 0.22 fF/kPa to 1.16 fF/kPa. Temperature sensitivity was also examined through simulation.

Keywords: Capacitive pressure sensor, 9 DOF, 10 DOF, sensor, capacitive, inertial measurement unit, IMU, inertial navigation system, INS.

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Authors: J. H. Choi, S. J. Kim, M. S. Jung, S. J. Kim, S. J. Joo, S. C. Kim

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There are a many of needs for the development of SiC-based hydrogen sensor for harsh environment applications. We fabricated and investigated Pd/Ta2O5/SiC-based hydrogen sensors with MOS capacitor structure for high temperature process monitoring and leak detection applications in such automotive, chemical and petroleum industries as well as direct monitoring of combustion processes. In this work, we used silicon carbide (SiC) as a substrate to replace silicon which operating temperatures are limited to below 200°C. Tantalum oxide was investigated as dielectric layer which has high permeability for hydrogen gas and high dielectric permittivity, compared with silicon dioxide or silicon nitride. Then, electrical response properties, such as I-V curve and dependence of capacitance on hydrogen concentrations were analyzed in the temperature ranges of room temperature to 500°C for performance evaluation of the sensor.

Keywords: High temperature, hydrogen sensor, SiC, Ta2O5 dielectric layer.

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Authors: Susmita Sahoo, Madhumanti Datta, Rajib Kar

Abstract:

The resistive-inductive-capacitive behavior of long interconnects which are driven by CMOS gates are presented in this paper. The analysis is based on the ¤Ç-model of a RLC load and is developed for submicron devices. Accurate and analytical expressions for the output load voltage, the propagation delay and the short circuit power dissipation have been proposed after solving a system of differential equations which accurately describe the behavior of the circuit. The effect of coupling capacitance between input and output and the short circuit current on these performance parameters are also incorporated in the proposed model. The estimated proposed delay and short circuit power dissipation are in very good agreement with the SPICE simulation with average relative error less than 6%.

Keywords: Delay, Inverter, Short Circuit Power, ¤Ç-Model, RLCInterconnect, VLSI

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Authors: A. K. Sharma, N. P. Patidar, G. Agnihotri, D. K. Palwalia

Abstract:

This paper presents the performance state analysis of Self-Excited Induction Generator (SEIG) using Artificial Bee Colony (ABC) optimization technique. The total admittance of the induction machine is minimized to calculate the frequency and magnetizing reactance corresponding to any rotor speed, load impedance and excitation capacitance. The performance of SEIG is calculated using the optimized parameter found. The results obtained by ABC algorithm are compared with results from numerical method. The results obtained coincide with the numerical method results. This technique proves to be efficient in solving nonlinear constrained optimization problems and analyzing the performance of SEIG.

Keywords: Artificial bee colony, Steady state analysis, Selfexcited induction generator, Nonlinear constrained optimization.

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Authors: Jaouadi Ikram, Machhout Mohsen

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The development of a quantum key distribution (QKD) system on a field-programmable gate array (FPGA) platform is the subject of this paper. A quantum cryptographic protocol is designed based on the properties of quantum information and the characteristics of FPGAs. The proposed protocol performs key extraction, reconciliation, error correction, and privacy amplification tasks to generate a perfectly secret final key. We modeled the presence of the spy in our system with a strategy to reveal some of the exchanged information without being noticed. Using an FPGA card with a 100 MHz clock frequency, we have demonstrated the evolution of the error rate as well as the amounts of mutual information (between the two interlocutors and that of the spy) passing from one step to another in the key generation process.

Keywords: QKD, BB84, protocol, cryptography, FPGA, key, security, communication.

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Authors: Li Yuan, Weizhu Wang, Kean Boon Lee, Haifeng Sun, Susai Lawrence Selvaraj, Shane Todd, Guo-Qiang Lo

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In this work, the physical based device model of AlGaN/GaN high electron mobility transistors (HEMTs) has been established and the corresponding device operation behavior has been investigated also by using Sentaurus TCAD from Synopsys. Advanced AlGaN/GaN hetero-structures with GaN cap layer and AlN spacer have been considered and the GaN cap layer and AlN spacer are found taking important roles on the gate leakage blocking and off-state breakdown voltage enhancement.

Keywords: AlGaN/GaN, HEMT, Physical mechanism, TCAD simulation

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Authors: Kar Foo Chong, Pradeep K. Gopalakrishnan, T. Hui Teo

Abstract:

There are multiple ways to implement a decimator filter. This paper addresses usage of CIC (cascaded-integrator-comb) filter and HB (half band) filter as the decimator filter to reduce the frequency sample rate by factor of 64 and detail of the implementation step to realize this design in hardware. Low power design approach for CIC filter and half band filter will be discussed. The filter design is implemented through MATLAB system modeling, ASIC (application specific integrated circuit) design flow and verified using a FPGA (field programmable gate array) board and MATLAB analysis.

Keywords: CIC filter, decimation filter, half-band filter, lowpower.

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Authors: Tim Byrnes

Abstract:

Quantum computation using qubits made of two component Bose-Einstein condensates (BECs) is analyzed. We construct a general framework for quantum algorithms to be executed using the collective states of the BECs. The use of BECs allows for an increase of energy scales via bosonic enhancement, resulting in two qubit gate operations that can be performed at a time reduced by a factor of N, where N is the number of bosons per qubit. We illustrate the scheme by an application to Deutsch-s and Grover-s algorithms, and discuss possible experimental implementations. Decoherence effects are analyzed under both general conditions and for the experimental implementation proposed.

Keywords: Quantum, computing, information, Bose-Einstein condensates, macroscopic.

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Authors: P. Jelodarian , E. Farshidi

Abstract:

In this paper, a new approach for design of a fully differential second order current mode continuous-time sigma-delta modulator is presented. For circuit implementation, square root domain (SRD) translinear loop based on floating-gate MOS transistors that operate in saturation region is employed. The modulator features, low supply voltage, low power consumption (8mW) and high dynamic range (55dB). Simulation results confirm that this design is suitable for data converters.

Keywords: Sigma-delta, current-mode, translinear loop, geometric mean, squarer/divider.

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Authors: M. Kovac

Abstract:

This article describes design of the 8-bit asynchronous microcontroller simulation model in VHDL. The model is created in ISE Foundation design tool and simulated in Modelsim tool. This model is a simple application example of asynchronous systems designed in synchronous design tools. The design process of creating asynchronous system with 4-phase bundled-data protocol and with matching delays is described in the article. The model is described in gate-level abstraction. The simulation waveform of the functional construction is the result of this article. Described construction covers only the simulation model. The next step would be creating synthesizable model to FPGA.

Keywords: Asynchronous, Microcontroller, VHDL, FPGA.

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Authors: Seung-Mok Han, Woo-Jin Nam, Seongsoo Lee

Abstract:

This paper proposes and implements an core transform architecture, which is one of the major processes in HEVC video compression standard. The proposed core transform architecture is implemented with only adders and shifters instead of area-consuming multipliers. Shifters in the proposed core transform architecture are implemented in wires and multiplexers, which significantly reduces chip area. Also, it can process from 4×4 to 16×16 blocks with common hardware by reusing processing elements. Designed core transform architecture in 0.13um technology can process a 16×16 block with 2-D transform in 130 cycles, and its gate count is 101,015 gates.

Keywords: HEVC, Core transform, Low area, Shift-and-add, PE reuse

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Authors: Yong-Seo Koo, Jin-Woo Jung, Byung-Seok Lee, Dong-Su Kim, Yil-Suk Yang

Abstract:

In this paper, a novel LVTSCR-based device for electrostatic discharge (ESD) protection of integrated circuits (ICs) is designed, fabricated and characterized. The proposed device is similar to the conventional LVTSCR but it has an embedded PMOSFET in the anode n-well to enhance the turn on speed, the clamping capability and the robustness. This is possible because the embedded PMOSFET provides the sub-path of ESD discharge current. The TLP, HBM and MM testing are carried out to verify the ESD performance of the proposed devices, which are fabricated in 0.35um (Bipolar-CMOS-DMOS) BCDMOS process. The device has the robustness of 70mA/um that is higher about 60mA/um than the LVTSCR, approximately.

Keywords: ESD Protection, grounded gate NMOS (GGNMOS), low trigger voltage SCR (LVTSCR)

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Authors: Jose A. Pomilio, Olavo Bet, Mateus P. Vieira

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The power converter that feeds high-frequency, highvoltage transformers must be carefully designed due to parasitic components, mainly the secondary winding capacitance and the leakage inductance, that introduces resonances in relatively lowfrequency range, next to the switching frequency. This paper considers applications in which the load (resistive) has an unpredictable behavior, changing from open to short-circuit condition faster than the output voltage control loop could react. In this context, to avoid overvoltage and over current situations, that could damage the converter, the transformer or the load, it is necessary to find an operation point that assure the desired output voltage in spite of the load condition. This can done adjusting the frequency response of the transformer adding an external inductance, together with selecting the switching frequency to get stable output voltage independently of the load.

Keywords: High-voltage transformer, Resonant converter, Softcommutation.

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Authors: Nasir Mehmood, Jens Ogniewski, Vinodh Ravinath

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This paper describes the design of a real-time audiorange digital oscilloscope and its implementation in 90nm CMOS FPGA platform. The design consists of sample and hold circuits, A/D conversion, audio and video processing, on-chip RAM, clock generation and control logic. The design of internal blocks and modules in 90nm devices in an FPGA is elaborated. Also the key features and their implementation algorithms are presented. Finally, the timing waveforms and simulation results are put forward.

Keywords: CMOS, VLSI, Oscilloscope, Field Programmable Gate Array (FPGA), VHDL, Video Graphics Array (VGA)

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Authors: S. Meikandasivam, Rajesh Kumar Nema, Shailendra Kumar Jain

Abstract:

A basic conceptual study of TCSC device on Simulink is a teaching aid and helps in understanding the rudiments of the topic. This paper thus stems out from basics of TCSC device and analyzes the impedance characteristics and associated single & multi resonance conditions. The Impedance characteristics curve is drawn for different values of inductance in MATLAB using M-files. The study is also helpful in estimating the appropriate inductance and capacitance values which have influence on multi resonance point in TCSC device. The capacitor voltage, line current, thyristor current and capacitor current waveforms are discussed briefly as simulation results. Simulink model of TCSC device is given and corresponding waveforms are analyzed. The subsidiary topics e.g. power oscillation damping, SSR mitigation and transient stability is also brought out.

Keywords: TCSC device, Impedance characteristics, Resonance point, Simulink model

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Authors: Ketan Naik, P. H. Bhathawala

Abstract:

The purpose of this work is to develop a mathematical model of Human Cardiovascular System using lumped parameter method. The model is divided in three parts: Systemic Circulation, Pulmonary Circulation and the Heart. The established mathematical model has been simulated by MATLAB software. The innovation of this study is in describing the system based on the vessel diameters and simulating mathematical equations with active electrical elements. Terminology of human physical body and required physical data like vessel’s radius, thickness etc., which are required to calculate circuit parameters like resistance, inductance and capacitance, are proceeds from well-known medical books. The developed model is useful to understand the anatomic of human cardiovascular system and related syndromes. The model is deal with vessel’s pressure and blood flow at certain time.

Keywords: Cardiovascular system, lumped parameter method, mathematical modeling, simulation.

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Authors: S. Kassou, R. El Mrabet, A. Belaaraj, P. Guionneau, N. Hadi, T. Lamcharfi

Abstract:

The organic–inorganic hybrid perovskite-like [C₆H₅C₂H₄NH₃]₂ZnCl₄ (PEA-ZnCl₄) was synthesized by saturated solutions method. X-ray powder diffraction, Raman spectroscopy, UV-visible transmittance, and capacitance meter measurements have been used to characterize the structure, the functional groups, the optical parameters, and the dielectric constants of the material. The material has a layered structure. The optical transmittance (T %) was recorded and applied to deduce the absorption coefficient (α) and optical band gap (Eg). The hybrid shows an insulator character with a direct band gap about 4.46 eV, and presents high dielectric constants up to a frequency of about 10⁵ Hz, which suggests a ferroelectric behavior. The reported optical and dielectric properties can help to understand the fundamental properties of perovskite materials and also to be used for optimizing or designing new devices.

Keywords: Dielectric constants, optical band gap (Eg), optical parameters, Raman spectroscopy, self-assembly organic inorganic hybrid.

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Authors: Y. Bentoutou

Abstract:

Memory Errors Detection and Correction aim to secure the transaction of data between the central processing unit of a satellite onboard computer and its local memory. In this paper, the application of a double-bit error detection and correction method is described and implemented in Field Programmable Gate Array (FPGA) technology. The performance of the proposed EDAC method is measured and compared with two different EDAC devices, using the same FPGA technology. Statistical analysis of single-event upset (SEU) and multiple-bit upset (MBU) activity in commercial memories onboard the first Algerian microsatellite Alsat-1 is given.

Keywords: Error Detection and Correction, On-board computer, small satellite missions.

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Authors: M. Mashayekhi, H. H. Ardakani, A. Omidian

Abstract:

Among various testing methodologies, Built-in Self- Test (BIST) is recognized as a low cost, effective paradigm. Also, full adders are one of the basic building blocks of most arithmetic circuits in all processing units. In this paper, an optimized testable 2- bit full adder as a test building block is proposed. Then, a BIST procedure is introduced to scale up the building block and to generate a self testable n-bit full adders. The target design can achieve 100% fault coverage using insignificant amount of hardware redundancy. Moreover, Overall test time is reduced by utilizing polymorphic gates and also by testing full adder building blocks in parallel.

Keywords: BIST, Full Adder, Polymorphic Gate

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Authors: Min-ju Kwon, Chae-won Kim, Jeong-yun Seo, Hee-guk Chae, Yong-seo Koo

Abstract:

In this paper, we presented the LDO (low-dropout) regulator which enhanced the PSRR by applying the constant current source generation technique through the BGR (Band Gap Reference) to form the noise sensing circuit. The current source through the BGR has a constant current value even if the applied voltage varies. Then, the noise sensing circuit, which is composed of the current source through the BGR, operated between the error amplifier and the pass transistor gate of the LDO regulator. As a result, the LDO regulator has a PSRR of -68.2 dB at 1k Hz, -45.85 dB at 1 MHz and -45 dB at 10 MHz. the other performance of the proposed LDO was maintained at the same level of the conventional LDO regulator.

Keywords: LDO regulator, noise sensing circuit, current reference, pass transistor.

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