@article{(Open Science Index):https://publications.waset.org/pdf/15409,
	  title     = {Low Power Approach for Decimation Filter Hardware Realization},
	  author    = {Kar Foo Chong and  Pradeep K. Gopalakrishnan and  T. Hui Teo},
	  country	= {},
	  institution	= {},
	  abstract     = {There are multiple ways to implement a decimator
filter. This paper addresses usage of CIC (cascaded-integrator-comb)
filter and HB (half band) filter as the decimator filter to reduce the
frequency sample rate by factor of 64 and detail of the
implementation step to realize this design in hardware. Low power
design approach for CIC filter and half band filter will be discussed.
The filter design is implemented through MATLAB system
modeling, ASIC (application specific integrated circuit) design flow
and verified using a FPGA (field programmable gate array) board
and MATLAB analysis.},
	    journal   = {International Journal of Electronics and Communication Engineering},
	  volume    = {2},
	  number    = {6},
	  year      = {2008},
	  pages     = {1151 - 1154},
	  ee        = {https://publications.waset.org/pdf/15409},
	  url   	= {https://publications.waset.org/vol/18},
	  bibsource = {https://publications.waset.org/},
	  issn  	= {eISSN: 1307-6892},
	  publisher = {World Academy of Science, Engineering and Technology},
	  index 	= {Open Science Index 18, 2008},
	}