%0 Journal Article %A M. Mashayekhi and H. H. Ardakani and A. Omidian %D 2010 %J International Journal of Electrical and Computer Engineering %B World Academy of Science, Engineering and Technology %I Open Science Index 37, 2010 %T A New Efficient Scalable BIST Full Adder using Polymorphic Gates %U https://publications.waset.org/pdf/13904 %V 37 %X Among various testing methodologies, Built-in Self- Test (BIST) is recognized as a low cost, effective paradigm. Also, full adders are one of the basic building blocks of most arithmetic circuits in all processing units. In this paper, an optimized testable 2- bit full adder as a test building block is proposed. Then, a BIST procedure is introduced to scale up the building block and to generate a self testable n-bit full adders. The target design can achieve 100% fault coverage using insignificant amount of hardware redundancy. Moreover, Overall test time is reduced by utilizing polymorphic gates and also by testing full adder building blocks in parallel. %P 210 - 213