Low Power Low Voltage Current Mode Pipelined A/D Converters
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Low Power Low Voltage Current Mode Pipelined A/D Converters

Authors: Krzysztof Wawryn, Robert Suszyński, Bogdan Strzeszewski


This paper presents two prototypes of low power low voltage current mode 9 bit pipelined a/d converters. The first and the second converters are configured of 1.5 bit and 2.5 bit stages, respectively. The a/d converter structures are composed of current mode building blocks and final comparator block which converts the analog current signal into digital voltage signal. All building blocks have been designed in CMOS AMS 0.35μm technology, then simulated to verify proposed concept. The performances of both converters are compared to performances of known current mode and voltage mode switched capacitance converter structures. Low power consumption and small chip area are advantages of the proposed converters.

Keywords: Pipelined converter, a/d converter, low power, lowvoltage, current mode.

Digital Object Identifier (DOI): doi.org/10.5281/zenodo.1077571

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[1] O. A. Horna, "A 150 Mbps A/D and D/A Conversion System", Comsat Technical Review, vol. 2, No. 1, pp. 52-57, 1972.
[2] R.A. Ju, D.H. Lee and S.D. Yu, High-Speed low Power CMOS Pipelined Analog-to Digital Converter, IEICE Trans. Fundamentals, vol. E82-A, No. 6, 1999.
[3] C. S. G. Conroy, D. W. Cline and P. R. Gray. "An 8-b 85 MS/s parallel pipeline converter in 1-╬╝m CMOS", IEEE J. of Solid-State Circuits, vol.28., no. 4, 1993.
[4] K. Wawryn, R. Suszyński and B. Strzeszewski, "Low power current mode pipelined A/D converter ", in proc. 52nd IEEE International Midwest Symposium on Circuit and Systems, Cancun, Mexico, 2009.
[5] K. Wawryn, R. Suszyński and B. Strzeszewski, "Low Power Current Mode Pipelined A/D Converter with 2.5-bit/stage and Digital Correction", in proc. 12th International Symposium on Integrated Circuits (ISIC-09), Singapore, 2009.
[6] B. E. Jonsson, H. Tenhunen, "A 3V wideband CMOS switched-current A/D-converter suitable for time-interleaved operation", Kluwer Academic Publishers, vol. 23, pp. 127-139, 2000.
[7] J. Li, F. Maloberti, "Pipeline of successive approximation converters with optimum power merit factor", Analog Integrated Circuits and Signal Processing, vol. 45, pp. 211-217, 2005.