Low Power Approach for Decimation Filter Hardware Realization

Authors: Kar Foo Chong, Pradeep K. Gopalakrishnan, T. Hui Teo

Abstract:

There are multiple ways to implement a decimator filter. This paper addresses usage of CIC (cascaded-integrator-comb) filter and HB (half band) filter as the decimator filter to reduce the frequency sample rate by factor of 64 and detail of the implementation step to realize this design in hardware. Low power design approach for CIC filter and half band filter will be discussed. The filter design is implemented through MATLAB system modeling, ASIC (application specific integrated circuit) design flow and verified using a FPGA (field programmable gate array) board and MATLAB analysis.

Keywords: CIC filter, decimation filter, half-band filter, lowpower.

Digital Object Identifier (DOI): doi.org/10.5281/zenodo.1084984

References:

[1] S. R. Norsworthy, R. Schreier, and G. C. Themes, Delta-Sigma Data Converters: Theory, Design, and Simulation, IEEE Press, 1997.
[2] E. B. Hogenauer, "An economical class of digital filters for decimation and interpoloaton," IEEE Transactions on Acoustics, Speech and Signal Processing, vol. ASSP-29, no. 2, pp. 155-162, 1981.
[3] Y. C. Lim, and B. R. Parker, "FIR filter design over a discrete powersof- two coefficients space," IEEE Transaction on Acoustics, Speech and Signal Processing, vol. ASSP-31 pp. 583-591, 1983.