WASET
	%0 Journal Article
	%A Yong-Seo Koo and  Jin-Woo Jung and  Byung-Seok Lee and  Dong-Su Kim and  Yil-Suk Yang
	%D 2011
	%J International Journal of Electronics and Communication Engineering
	%B World Academy of Science, Engineering and Technology
	%I Open Science Index 50, 2011
	%T Design of Novel SCR-based ESD Protection Device for I/O Clamp in BCD Process
	%U https://publications.waset.org/pdf/7827
	%V 50
	%X In this paper, a novel LVTSCR-based device for
electrostatic discharge (ESD) protection of integrated circuits (ICs) is
designed, fabricated and characterized. The proposed device is similar
to the conventional LVTSCR but it has an embedded PMOSFET in the
anode n-well to enhance the turn on speed, the clamping capability and
the robustness. This is possible because the embedded PMOSFET
provides the sub-path of ESD discharge current. The TLP, HBM and
MM testing are carried out to verify the ESD performance of the
proposed devices, which are fabricated in 0.35um
(Bipolar-CMOS-DMOS) BCDMOS process. The device has the
robustness of 70mA/um that is higher about 60mA/um than the
LVTSCR, approximately.
	%P 203 - 206