WASET
	@article{(Open Science Index):https://publications.waset.org/pdf/852,
	  title     = {High Speed and Ultra Low-voltage CMOS NAND and NOR Domino Gates},
	  author    = {Yngvar Berg and  Omid Mirmotahari},
	  country	= {},
	  institution	= {},
	  abstract     = {In this paper we ultra low-voltage and high speed CMOS domino logic. For supply voltages below 500mV the delay for a ultra low-voltage NAND2 gate is aproximately 10% of a complementary CMOS inverter. Furthermore, the delay variations due to mismatch is much less than for conventional CMOS. Differential domino gates for AND/NAND and OR/NOR operation are presented.
},
	    journal   = {International Journal of Electronics and Communication Engineering},
	  volume    = {6},
	  number    = {8},
	  year      = {2012},
	  pages     = {760 - 763},
	  ee        = {https://publications.waset.org/pdf/852},
	  url   	= {https://publications.waset.org/vol/68},
	  bibsource = {https://publications.waset.org/},
	  issn  	= {eISSN: 1307-6892},
	  publisher = {World Academy of Science, Engineering and Technology},
	  index 	= {Open Science Index 68, 2012},
	}