Search results for: third harmonic resistive leakage current

Authors: Waluyo, Ngapuli I. Sinisuka, Suwarno, Maman A. Djauhari

Abstract:

This paper presents the experimental results of comparison between leakage currents and discharge currents. The leakage currents were obtained on polluted porcelain insulator. Whereas, the discharge currents were obtained on lightly artificial polluted porcelain specimen. The conducted measurements were leakage current or discharge current and applied voltage. The insulator or specimen was in a hermetically sealed chamber, and the current waveforms were analyzed using FFT. The result indicated that the leakage current (LC) on low RH condition the fifth harmonic would be visible, and followed by the seventh harmonic. The insulator had capacitive property. Otherwise, on 99% relative humidity, the fifth harmonic would also be visible, and the phase angle reached up to 12.2 degree. Whereas, on discharge current, the third harmonic would be visible, and followed by fifth harmonic. The third harmonic would increase as pressure reduced. On this condition, the specimen had a non-linear characteristics

Keywords: leakage current, discharge current, third harmonic, fifth harmonic, porcelain.

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Authors: Waluyo, Parouli M. Pakpahan, Suwarno, Maman A. Djauhari

Abstract:

This paper presents the experimental results of leakage current waveforms which appears on porcelain insulator surface due to existence of artificial pollutants. The tests have been done using the chemical compounds of NaCl, Na2SiO3, H2SO4, CaO, Na2SO4, KCl, Al2SO4, MgSO4, FeCl3, and TiO2. The insulator surface was coated with those compounds and dried. Then, it was tested in the chamber where the high voltage was applied. Using correspondence analysis, the result indicated that the fundamental harmonic of leakage current was very close to the applied voltage and third harmonic leakage current was close to the yielded leakage current amplitude. The first harmonic power was correlated to first harmonic amplitude of leakage current, and third harmonic power was close to third harmonic one. The chemical compounds of H2SO4 and Na2SiO3 affected to the power factor of around 70%. Both are the most conductive, due to the power factor drastically increase among the chemical compounds.

Keywords: Chemical compound, harmonic, porcelain insulator, leakage current.

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Authors: Anil S. Khopkar, Kartik S. Pandya

Abstract:

Lightning overvoltage phenomenon in power systems cannot be avoided; however, it can be controlled to certain extent. To prevent system failure, power system equipment must be protected against overvoltage. Metal Oxide Surge Arrestors (MOSA) are connected in the system to provide protection against overvoltages. Under normal working conditions, MOSA function as, insulators, offering a conductive path during overvoltage events. MOSA consists of zinc oxide elements (ZnO Blocks) which has non-linear V-I characteristics. The ZnO blocks are connected in series and fitted in ceramic or polymer housing. Over time, these components degrade due to continuous operation. The degradation of zinc oxide elements increases the leakage current flowing through the surge arrestors. This increased leakage current results in elevated temperatures within the surge arrester, further decreasing the resistance of the zinc oxide elements. Consequently, the leakage current increases, leading to higher temperatures within the MOSA. This cycle creates thermal runaway conditions for the MOSA. Once a surge arrester reaches the thermal runaway condition, it cannot return to normal working conditions. This condition is a primary cause of premature failure of surge arrestors. Given that MOSA constitutes a core protective device for electrical power systems against transients, it contributes significantly to the reliable operation of power system networks. Therefore, periodic condition monitoring of surge arrestors is essential. Both online and offline condition monitoring techniques are available for surge arrestors. Offline condition monitoring techniques are not as popular because they require the removal of surge arrestors from the system, which requires system shutdown. Therefore, online condition monitoring techniques are more commonly used. This paper presents an evaluation technique for the surge arrester condition based on leakage current analysis. The maximum amplitudes of total leakage current (IT), fundamental resistive leakage current (IR), and third harmonic resistive leakage current (I3rd) are analyzed as indicators for surge arrester condition monitoring.

Keywords: Metal Oxide Surge Arrester, MOSA, Over voltage, total leakage current, resistive leakage current, third harmonic resistive leakage current, capacitive leakage current.

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Authors: Sikder Mohammad Faruk, Mir Mofajjal Hossain, Muhibul Haque Bhuyan

Abstract:

In this investigative research paper, we have presented the simulation results of a three-phase rectifier circuit to improve the input side current using the passive filters, such as capacitors and inductors at the output and input terminals of the rectifier circuit respectively. All simulation works were performed in a personal computer using the PSPICE simulator software, which is a virtual circuit design and simulation software package. The output voltages and currents were measured across a resistive load of 1 k. We observed that the output voltage levels, input current wave shapes, harmonic contents through the harmonic spectrum, and total harmonic distortion improved due to the use of such filters.

Keywords: input current wave, three-phase rectifier, passive filter, PSPICE Simulation

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Authors: Z. Fang, H.Y. Yu, W.J. Liu, N. Singh, G.Q. Lo

Abstract:

High performance Resistive Random Access Memory (RRAM) based on HfOx has been prepared and its temperature instability has been investigated in this work. With increasing temperature, it is found that: leakage current at high resistance state increases, which can be explained by the higher density of traps inside dielectrics (related to trap-assistant tunneling), leading to a smaller On/Off ratio; set and reset voltages decrease, which may be attributed to the higher oxygen ion mobility, in addition to the reduced potential barrier to create / recover oxygen ions (or oxygen vacancies); temperature impact on the RRAM retention degradation is more serious than electrical bias.

Keywords: RRAM, resistive switching, temperature instability.

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Authors: Morné Roman, Robert van Zyl, Nishanth Parus, Nishal Mahatho

Abstract:

Leakage current monitoring for high voltage transmission line insulators is of interest as a performance indicator. Presently, to the best of our knowledge, there is no commercially available, clamp-on type, non-intrusive device for measuring leakage current on energised high voltage direct current (HVDC) transmission line insulators. The South African power utility, Eskom, is investigating the development of such a hand-held sensor for two important applications; first, for continuous real-time condition monitoring of HVDC line insulators and, second, for use by live line workers to determine if it is safe to work on energised insulators. In this paper, a DC leakage current sensor based on magnetic field sensing techniques is developed. The magnetic field sensor used in the prototype can also detect alternating current up to 5 MHz. The DC leakage current prototype detects the magnetic field associated with the current flowing on the surface of the insulator. Preliminary HVDC leakage current measurements are performed on glass insulators. The results show that the prototype can accurately measure leakage current in the specified current range of 1-200 mA. The influence of external fields from the HVDC line itself on the leakage current measurements is mitigated through a differential magnetometer sensing technique. Thus, the developed sensor can perform measurements on in-service HVDC insulators. The research contributes to the body of knowledge by providing a sensor to measure leakage current on energised HVDC insulators non-intrusively. This sensor can also be used by live line workers to inform them whether or not it is safe to perform maintenance on energized insulators.

Keywords: Direct current, insulator, leakage current, live line, magnetic field, sensor, transmission lines.

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Authors: Farid Moshgelani, Dhamin Al-Khalili, Côme Rozon

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In this paper, FinFET devices are analyzed with emphasis on sub-threshold leakage current control. This is achieved through proper biasing of the back gate, and through the use of asymmetric work functions for the four terminal FinFET devices. We are also examining different configurations of multiplexers and XOR gates using transistors of symmetric and asymmetric work functions. Based on extensive characterization data for MUX circuits, our proposed configuration using symmetric devices lead to leakage current and delay improvements of 65% and 47% respectively compared to results in the literature. For XOR gates, a 90% improvement in the average leakage current is achieved by using asymmetric devices. All simulations are based on a 25nm FinFET technology using the University of Florida UFDG model.

Keywords: FinFET, logic functions, asymmetric workfunction devices, back gate biasing, sub-threshold leakage current.

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Authors: Waluyo, Ngapuli I. Sinisuka, Suwarno, Maman A. Djauhari

Abstract:

This paper presents the experimental results of discharge current phenomena on various humidity, temperature, pressure and pollutant conditions of epoxy resin specimen. The leakage distance of specimen was 3 cm, that it was supplied by high voltage. The polluted condition was given with NaCl artificial pollutant. The conducted measurements were discharge current and applied voltage. The specimen was put in a hermetically sealed chamber, and the current waveforms were analyzed with FFT. The result indicated that on discharge condition, the fifth harmonics still had dominant, rather than third one. The third harmonics tent to be appeared on low pressure heavily polluted condition, and followed by high humidity heavily polluted condition. On the heavily polluted specimen, the peaks discharge current points would be high and more frequent. Nevertheless, the specimen still had capacitive property. Besides that, usually discharge current points were more frequent. The influence of low pressure was still dominant to be easier to discharge. The non-linear property would be appear explicitly on low pressure and heavily polluted condition.

Keywords: discharge current, third harmonic, fifth harmonic, epoxy resin, non-linear.

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Authors: P.K. Sharma, B. Bhargava, S. Akashe

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Power dissipation due to leakage current in the digital circuits is a biggest factor which is considered specially while designing nanoscale circuits. This paper is exploring the ideas of reducing leakage current in static CMOS circuits by stacking the transistors in increasing numbers. Clearly it means that the stacking of OFF transistors in large numbers result a significant reduction in power dissipation. Increase in source voltage of NMOS transistor minimizes the leakage current. Thus stacking technique makes circuit with minimum power dissipation losses due to leakage current. Also some of digital circuits such as full adder, D flip flop and 6T SRAM have been simulated in this paper, with the application of reduction technique on ‘cadence virtuoso tool’ using specter at 45nm technology with supply voltage 0.7V.

Keywords: Stack, 6T SRAM cell, low power, threshold voltage

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Authors: Vijay Kumar Sharma, Manisha Pattanaik, Balwinder Raj

Abstract:

Minimizations of power dissipation, chip area with higher circuit performance are the necessary and key parameters in deep submicron regime. The leakage current increases sharply in deep submicron regime and directly affected the power dissipation of the logic circuits. In deep submicron region the power dissipation as well as high performance is the crucial concern since increasing importance of portable systems. Number of leakage reduction techniques employed to reduce the leakage current in deep submicron region but they have some trade-off to control the leakage current. ONOFIC approach gives an excellent agreement between power dissipation and propagation delay for designing the efficient CMOS logic circuits. In this article ONOFIC approach is compared with LECTOR technique and output results show that ONOFIC approach significantly reduces the power dissipation and enhance the speed of the logic circuits. The lower power delay product is the big outcome of this approach and makes it an influential leakage reduction technique.

Keywords: Deep submicron, Leakage Current, LECTOR, ONOFIC, Power Delay Product

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Authors: Md. Noman Habib Khan, S. Khan, T. S. Gunawan, R. I. Boby

Abstract:

The photovoltaic (PV) panel with no galvanic isolation system is well known technique in the world which is effective and delivers power with enhanced efficiency. The PV generation presented here is for stand-alone system installed in remote areas when as the resulting power gets connected to electronic load installation instead of being tied to the grid. Though very small, even then transformer-less topology is shown to be with leakage in pico-ampere range. By using PWM technique PWM, leakage current in different situations is shown. The results shown in this paper show how the pico-ampere current is reduced to femto-ampere through use of inductors and capacitors of suitable values of inductor and capacitors with the load.

Keywords: Photovoltaic (PV) panel, Duty cycle, Pulse Duration Modulation (PDM), Leakage current.

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Authors: Ashwani K. Rana, Narottam Chand, Vinod Kapoor

Abstract:

In this paper, gate leakage current has been mitigated by the use of novel nanoscale MOSFET with Source/Drain-to-Gate Non-overlapped and high-k spacer structure for the first time. A compact analytical model has been developed to study the gate leakage behaviour of proposed MOSFET structure. The result obtained has found good agreement with the Sentaurus Simulation. Fringing gate electric field through the dielectric spacer induces inversion layer in the non-overlap region to act as extended S/D region. It is found that optimal Source/Drain-to-Gate Non-overlapped and high-k spacer structure has reduced the gate leakage current to great extent as compared to those of an overlapped structure. Further, the proposed structure had improved off current, subthreshold slope and DIBL characteristic. It is concluded that this structure solves the problem of high leakage current without introducing the extra series resistance.

Keywords: Gate tunneling current, analytical model, spacer dielectrics, DIBL, subthreshold slope.

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Authors: H. Fathabadi

Abstract:

In this paper, we consider a designed and implemented phase-cutting dimmer. In fact, the dimmer is closed loop and a microcontroller calculates and then regulates the firing delay angles of each channel. Depending on the firing angle, the harmonic distortion in the input current will not comply with international standards, such as IEC 61000-3-2 (class C equipments). For solving this problem, eight harmonic compensators have been added to the dimmer. So, the proposed dimmer has a little harmonic distortion in the input current whereas conventional phase-cutting dimmers are not so. Sensitivity and removed THD of the proposed dimmer will be presented.

Keywords: Dimmer, compensator, harmonic, dimming.

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Authors: Arash Azizi Mazreah, Mohammad Reza Sahebi, Mohammad T. Manzuri Shalmani

Abstract:

To help overcome limits to the density of conventional SRAMs and leakage current of SRAM cell in nanoscaled CMOS technology, we have developed a four-transistor SRAM cell. The newly developed CMOS four-transistor SRAM cell uses one word-line and one bit-line during read/write operation. This cell retains its data with leakage current and positive feedback without refresh cycle. The new cell size is 19% smaller than a conventional six-transistor cell using same design rules. Also the leakage current of new cell is 60% smaller than a conventional sixtransistor SRAM cell. Simulation result in 65nm CMOS technology shows new cell has correct operation during read/write operation and idle mode.

Keywords: SRAM Cell, leakage current, cell area.

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Authors: Daniel Zammit, Cyril Spiteri Staines, Maurice Apap

Abstract:

This paper presents a study on Proportional Resonant (PR) current control with additional PR harmonic compensators for Grid Connected Photovoltaic (PV) Inverters. Both simulation and experimental results will be presented. Testing was carried out on a 3kW Grid-Connected PV Inverter which was designed and constructed for this research.

Keywords: Inverters, Proportional-Resonant Controllers, Harmonic Compensation, Photovoltaic.

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Authors: M.A.A. Younis, N. A. Rahim, S. Mekhilef

Abstract:

This paper presents the design and analysis of a parallel connected inverter configuration of. The configuration consists of parallel connected three-phase dc/ac inverter. Series resistors added to the inverter output to maintain same current in each inverter of the two parallel inverters, and to reduce the circulating current in the parallel inverters to the minimum. High frequency third harmonic injection PWM (THIPWM) employed to reduce the total harmonic distortion and to make maximum use of the voltage source. DSP was used to generate the THIPWM and the control algorithm for the converter. Selected experimental results have been shown to validate the proposed system.

Keywords: Three-phase inverter, Third harmonic injection PWM, inverters parallel connection.

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Authors: Dody Ismoyo, Mohammad Awan, Norashikin Yahya

Abstract:

The presence of harmonic in power system is a major concerned to power engineers for many years. With the increasing usage of nonlinear loads in power systems, the harmonic pollution becomes more serious. One of the widely used computation algorithm for harmonic analysis is fast Fourier transform (FFT). In this paper, a harmonic analyzer using FFT was implemented on TMS320C6713 DSK. The supply voltage of 240 V 59 Hz is stepped down to 5V using a voltage divider in order to match the power rating of the DSK input. The output from the DSK was displayed on oscilloscope and Code Composer Studio™ software. This work has demonstrated the possibility of analyzing the 240V power supply harmonic content using the DSK board.

Keywords: Harmonic Analysis, DSP.

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Authors: T. Messikh, S. Mekhilef, N. A. Rahim

Abstract:

This paper presents an effective technique for harmonic current mitigation using an adaptive notch filter (ANF) to estimate current harmonics. The proposed filter consists of multiple units of ANF connected in parallel structure; each unit is governed by two ordinary differential equations. The frequency estimation is carried out based on the output of these units. The simulation and experimental results show the ability of the proposed tracking scheme to accurately estimate harmonics. The proposed filter was implemented digitally in TMS320F2808 and used in the control of hybrid active power filter (HAPF). The theoretical expectations are verified and demonstrated experimentally.

Keywords: Adaptive notch filter, Active power filter, harmonic filtering, Time varying frequency.

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Authors: K. G. Firouzjah, A. Sheikholeslami

Abstract:

The perfect operation of common Active Filters is depended on accuracy of identification system distortion. Also, using a suitable method in current injection and reactive power compensation, leads to increased filter performance. Due to this fact, this paper presents a method based on predictive current control theory in shunt active filter applications. The harmonics of the load current is identified by using o–d–q reference frame on load current and eliminating the DC part of d–q components. Then, the rest of these components deliver to predictive current controller as a Threephase reference current by using Park inverse transformation. System is modeled in discreet time domain. The proposed method has been tested using MATLAB model for a nonlinear load (with Total Harmonic Distortion=20%). The simulation results indicate that the proposed filter leads to flowing a sinusoidal current (THD=0.15%) through the source. In addition, the results show that the filter tracks the reference current accurately.

Keywords: Active filter, predictive current control, low pass filter, harmonic omitting, o–d–q reference frame.

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Authors: Ahmed A. Helal, Nahla E. Zakzouk, Yasser G. Desouky

Abstract:

This paper presents a fuzzy logic controlled shunt active power filter used to compensate for harmonic distortion in three-phase four-wire systems. The shunt active filter employs a simple method for the calculation of the reference compensation current based of Fast Fourier Transform. This presented filter is able to operate in both balanced and unbalanced load conditions. A fuzzy logic based current controller strategy is used to regulate the filter current and hence ensure harmonic free supply current. The validity of the presented approach in harmonic mitigation is verified via simulation results of the proposed test system under different loading conditions.

Keywords: Active power filters, Fuzzy logic controller, Power quality

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Authors: S. Abdollahi Pour, M. Saneei

Abstract:

This paper propose a new circuit design which monitor total leakage current during standby mode and generates the optimal reverse body bias voltage, by using the adaptive body bias (ABB) technique to compensate die-to-die parameter variations. Design details of power monitor are examined using simulation framework in 65nm and 32nm BTPM model CMOS process. Experimental results show the overhead of proposed circuit in terms of its power consumption is about 10 μW for 32nm technology and about 12 μW for 65nm technology at the same power supply voltage as the core power supply. Moreover the results show that our proposed circuit design is not far sensitive to the temperature variations and also process variations. Besides, uses the simple blocks which offer good sensitivity, high speed, the continuously feedback loop.

Keywords: leakage current, leakage power monitor, body biasing, low power

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Authors: Hakan Bostancı, Metin Öztürk

Abstract:

In this paper, a necessary and sufficient coefficient are given for functions in a class of complex valued meromorphic harmonic univalent functions of the form f = h + g using Salagean operator. Furthermore, distortion theorems, extreme points, convolution condition and convex combinations for this family of meromorphic harmonic functions are obtained.

Keywords: Harmonic mappings, Meromorphic functions, Salagean operator.

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Authors: Zahzouh Zoubir, Bouzaouit Azzeddine, Gahgah Mounir

Abstract:

The use of more and more electronic power switches with a nonlinear behavior generates non-sinusoidal currents in distribution networks, which causes damage to domestic and industrial equipment. The multi-level shunt power active filter is subsequently shown to be an adequate solution to the problem raised. Nevertheless, the difficulty of adjusting the active filter DC supply voltage requires another technology to ensure it. In this article, a photovoltaic generator is associated with the DC bus power terminals of the active filter. The proposed system consists of a field of solar panels, three multi-level voltage inverters connected to the power grid and a non-linear load consisting of a six-diode rectifier bridge supplying a resistive-inductive load. Current control techniques of active and reactive power are used to compensate for both harmonic currents and reactive power as well as to inject active solar power into the distribution network. An algorithm of the search method of the maximum power point of type Perturb and observe is applied. Simulation results of the system proposed under the MATLAB/Simulink environment shows that the performance of control commands that reassure the solar power injection in the network, harmonic current compensation and power factor correction.

Keywords: MPPT, active power filter, PV array, perturb and observe algorithm, PWM-control.

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Authors: Shanmuka Naga Raju

Abstract:

This paper  presents PV system without considering transformer connected to electric grid. This is considered more economic compared to present PV system. The problem that occurs when transformer is not considered appears with a leakage current near capacitor connected to ground. Bipolar Pulse Width Modulation (BPWM) technique along with filter L-C-L configuration in the circuit is modeled to shrink the leakage current in the circuit. The DC/AC inverter is modeled using H-bridge Insulated Gate Bipolar Transistor (IGBT) module which is controlled using proposed Bipolar PWM control technique. To extract maximum power, Maximum Power Point Technique (MPPT) controller is used in this model. Voltage and current regulators are used to determine the reference voltage for the inverter from active and reactive current where reactive current is set to zero. The PLL is modeled to synchronize the measurements. The model is designed with MATLAB Simulation blocks and compared with the methods available in literature survey to show its effectiveness.

Keywords: Photovoltaic, PV, pulse width modulation, PWM, perturb and observe, phase locked loop.

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Authors: Zhengsheng Wang, Jing Qi, Chuntao Liu, Yuanjun Li

Abstract:

The harmonic Arnoldi method can be used to find interior eigenpairs of large matrices. However, it has been shown that this method may converge erratically and even may fail to do so. In this paper, we present a new method for computing interior eigenpairs of large nonsymmetric matrices, which is called weighted harmonic Arnoldi method. The implementation of the method has been tested by numerical examples, the results show that the method converges fast and works with high accuracy.

Keywords: Harmonic Arnoldi method, weighted harmonic Arnoldi method, eigenpair, interior eigenproblem, non symmetric matrix.

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Authors: Rana Abdul Jabbar Khan, Muhammad Akmal

Abstract:

Personal computers draw non-sinusoidal current with odd harmonics more significantly. Power Quality of distribution networks is severely affected due to the flow of these generated harmonics during the operation of electronic loads. In this paper, mathematical modeling of odd harmonics in current like 3rd, 5th, 7th and 9th influencing the power quality has been presented. Live signals have been captured with the help of power quality analyzer for analysis purpose. The interesting feature is that Total Harmonic Distortion (THD) in current decreases with the increase of nonlinear loads has been verified theoretically. The results obtained using mathematical expressions have been compared with the practical results and exciting results have been found.

Keywords: Harmonic Distortion, Mathematical Modeling, Power Quality.

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Authors: Z. Fang, X. P. Wang, G. Q. Lo, D. L. Kwong

Abstract:

In this work, we demonstrated vertical RRAM device fabricated at the sidewall of contact hole structures for possible future 3-D stacking integrations. The fabricated devices exhibit polarity dependent bipolar resistive switching with small operation voltage of less than 1V for both set and reset process. A good retention of memory window ~50 times is maintained after 1000s voltage bias.

Keywords: Bipolar switching, non volatile memory, resistive random access memory, 3-D stacking.

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Authors: T. Patrice Nna Nna, S. Ndjakomo Essiane, S. Pérabi Ngoffé, F. Amigue Fissou

Abstract:

This paper deals with the harmonic decontamination of current in an electrical grid by an active shunt filter in order to improve power quality. The contribution of this paper is mainly based on the proposal of a control strategy for an active filter based on Duty Cycle Modulation (DCM). First, three-monophase method is applied for the identification of disturbing currents. A Simulink model of this method is given for one phase of the grid. Secondly, two orders were designed: the first one is the Hysteresis Control and the second one is the DCM Control. Finally, a comparative study of the two controls was performed. The results obtained show a significant improvement in the rate of harmonic distortion for both controls. The harmonic distortion for the Hysteresis control is limited by the non-controllability of the switching frequencies of the inverter's switches and reduces the harmonic distortion rate (THD) to 3.12% as opposed to the DCM control which limits the THD to 2.82% which makes it better.

Keywords: Harmonic pollution, shunt active filter, hysteresis, Duty Cycle Modulation.

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Authors: K. Khlifi, A. Haddouk, M. Hlaili, H. Mechergui

Abstract:

The present paper provides a detailed analysis of prior methods and approaches for non-linear load identification in residential buildings. The main goal of this analysis is to decipher the distorted signals and to estimate the harmonics influence on power systems. We have performed an analytical study of non-linear loads behavior in the residential environment. Simulations have been performed in order to evaluate the distorted rate of the current and follow his behavior. To complete this work, an instrumental platform has been realized to carry out practical tests on single-phase non-linear loads which illustrate the current consumption of some domestic appliances supplied with single-phase sinusoidal voltage. These non-linear loads have been processed and tracked in order to limit their influence on the power grid and to reduce the Joule effect losses. As a result, the study has allowed to identify responsible circuits of harmonic pollution.

Keywords: Distortion rate, harmonic analysis, harmonic pollution, non-linear load, power factor.

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Authors: Zina Saheb, Ezz El-Masry

Abstract:

As the Silicon oxide scaled down in MOSFET technology to few nanometers, gate Direct Tunneling (DT) in Floating gate (FGMOSFET) devices has become a major concern for analog designers. FGMOSFET has been used in many low-voltage and low-power applications, however, there is no accurate model that account for DT gate leakage in nano-scale. This paper studied and analyzed different simulation models for FGMOSFET using TSMC 90-nm technology. The simulation results for FGMOSFET cascade current mirror shows the impact of DT on circuit performance in terms of current and voltage without the need for fabrication. This works shows the significance of using an accurate model for FGMOSFET in nan-scale technologies.

Keywords: CMOS transistor, direct-tunneling current, floatinggate, gate-leakage current, simulation model.

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