%0 Journal Article
	%A Hasmayadi Abdul Majid and  Rohana Musa
	%D 2013
	%J International Journal of Electronics and Communication Engineering
	%B World Academy of Science, Engineering and Technology
	%I Open Science Index 82, 2013
	%T Design and Implementation of a 10-bit SAR ADC
	%U https://publications.waset.org/pdf/17103
	%V 82
	%X This paper presents the development of a 38.5 kS/s 10-bit low power SAR ADC which is realized in MIMOS’s 0.35 µm CMOS process. The design uses a resistive DAC, a dynamic comparator with pre-amplifier and SAR digital logic to create 10 effective bits while consuming less than 7.8 mW with a 3.3 V power supply.

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