Search results for: electrical circuit homotopy
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 1297

Search results for: electrical circuit homotopy

547 A Novel Low Power, High Speed 14 Transistor CMOS Full Adder Cell with 50% Improvement in Threshold Loss Problem

Authors: T. Vigneswaran, B. Mukundhan, P. Subbarami Reddy

Abstract:

Full adders are important components in applications such as digital signal processors (DSP) architectures and microprocessors. In addition to its main task, which is adding two numbers, it participates in many other useful operations such as subtraction, multiplication, division,, address calculation,..etc. In most of these systems the adder lies in the critical path that determines the overall speed of the system. So enhancing the performance of the 1-bit full adder cell (the building block of the adder) is a significant goal.Demands for the low power VLSI have been pushing the development of aggressive design methodologies to reduce the power consumption drastically. To meet the growing demand, we propose a new low power adder cell by sacrificing the MOS Transistor count that reduces the serious threshold loss problem, considerably increases the speed and decreases the power when compared to the static energy recovery full (SERF) adder. So a new improved 14T CMOS l-bit full adder cell is presented in this paper. Results show 50% improvement in threshold loss problem, 45% improvement in speed and considerable power consumption over the SERF adder and other different types of adders with comparable performance.

Keywords: Arithmetic circuit, full adder, multiplier, low power, very Large-scale integration (VLSI).

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546 Low Jitter ADPLL based Clock Generator for High Speed SoC Applications

Authors: Moorthi S., Meganathan D., Janarthanan D., Praveen Kumar P., J. Raja paul perinbam

Abstract:

An efficient architecture for low jitter All Digital Phase Locked Loop (ADPLL) suitable for high speed SoC applications is presented in this paper. The ADPLL is designed using standard cells and described by Hardware Description Language (HDL). The ADPLL implemented in a 90 nm CMOS process can operate from 10 to 200 MHz and achieve worst case frequency acquisition in 14 reference clock cycles. The simulation result shows that PLL has cycle to cycle jitter of 164 ps and period jitter of 100 ps at 100MHz. Since the digitally controlled oscillator (DCO) can achieve both high resolution and wide frequency range, it can meet the demands of system-level integration. The proposed ADPLL can easily be ported to different processes in a short time. Thus, it can reduce the design time and design complexity of the ADPLL, making it very suitable for System-on-Chip (SoC) applications.

Keywords: All Digital Phase Locked Loop (ADPLL), Systemon-Chip (SoC), Phase Locked Loop (PLL), Very High speedIntegrated Circuit (VHSIC) Hardware Description Language(VHDL), Digitally Controlled Oscillator (DCO), Phase frequencydetector (PFD) and Voltage Controlled Oscillator (VCO).

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545 Switching Behaviors of TiN/HfOx/Pt Based RRAM

Authors: B. B. Weng, Z. Fang, Z. X. Chen, X. P. Wang, G. Q. Lo, D. L. Kwong

Abstract:

Resistive Random Access Memory (RRAM) had received great amount of attention from various research efforts in recent years, owing to its promising performance as a next generation memory device. In this paper, samples based on TiN/HfOx/Pt stack were prepared and its electrical switching behaviors were characterized and discussed in brief.

Keywords: HfOx, resistive switching, RRAM.

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544 Effect of Leaks in Solid Oxide Electrolysis Cells Tested for Durability under Co-Electrolysis Conditions

Authors: Megha Rao, Søren H. Jensen, Xiufu Sun, Anke Hagen, Mogens B. Mogensen

Abstract:

Solid oxide electrolysis cells have an immense potential in converting CO2 and H2O into syngas during co-electrolysis operation. The produced syngas can be further converted into hydrocarbons. This kind of technology is called power-to-gas or power-to-liquid. To produce hydrocarbons via this route, durability of the cells is still a challenge, which needs to be further investigated in order to improve the cells. In this work, various nickel-yttria stabilized zirconia (Ni-YSZ) fuel electrode supported or YSZ electrolyte supported cells, cerium gadolinium oxide (CGO) barrier layer, and an oxygen electrode are investigated for durability under co-electrolysis conditions in both galvanostatic and potentiostatic conditions. While changing the gas on the oxygen electrode, keeping the fuel electrode gas composition constant, a change in the gas concentration arc was observed by impedance spectroscopy. Measurements of open circuit potential revealed the presence of leaks in the setup. It is speculated that the change in concentration impedance may be related to the leaks. Furthermore, the cells were also tested under pressurized conditions to find an inter-play between the leak rate and the pressure. A mathematical modeling together with electrochemical and microscopy analysis is presented.

Keywords: Co-electrolysis, solid oxide electrolysis cells, leaks, durability, gas concentration.

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543 Groundwater Potential Zone Identification in Unconsolidated Aquifer Using Geophysical Techniques around Tarbela Ghazi, District Haripur, Pakistan

Authors: Syed Muzyan Shahzad, Liu Jianxin, Asim Shahzad, Muhammad Sharjeel Raza, Sun Ya, Fanidi Meryem

Abstract:

Electrical resistivity investigation was conducted in vicinity of Tarbela Ghazi, in order to study the subsurface layer with a view of determining the depth to the aquifer and thickness of groundwater potential zones. Vertical Electrical Sounding (VES) using Schlumberger array was carried out at 16 VES stations. Well logging data at four tube wells have been used to mark the super saturated zones with great discharge rate. The present paper shows a geoelectrical identification of the lithology and an estimate of the relationship between the resistivity and Dar Zarrouk parameters (transverse unit resistance and longitudinal unit conductance). The VES results revealed both homogeneous and heterogeneous nature of the subsurface strata. Aquifer is unconfined to confine in nature, and at few locations though perched aquifer has been identified, groundwater potential zones are developed in unconsolidated deposits layers and more than seven geo-electric layers are observed at some VES locations. Saturated zones thickness ranges from 5 m to 150 m, whereas at few area aquifer is beyond 150 m thick. The average anisotropy, transvers resistance and longitudinal conductance values are 0.86 %, 35750.9821 Ω.m2, 0.729 Siemens, respectively. The transverse unit resistance values fluctuate all over the aquifer system, whereas below at particular depth high values are observed, that significantly associated with the high transmissivity zones. The groundwater quality in all analyzed samples is below permissible limit according to World Health Standard (WHO).

Keywords: Geoelectric layers, Dar Zarrouk parameters, Aquifer, Electro-stratigraphic.

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542 Bipolar Square Wave Pulses for Liquid Food Sterilization using Cascaded H-Bridge Multilevel Inverter

Authors: Hanifah Jambari, Naziha A. Azli, M. Afendi M. Piah

Abstract:

This paper presents the generation of bipolar square wave pulses with characteristics that are suitable for liquid food sterilization using a Cascaded H-bridge Multilevel Inverter (CHMI). Bipolar square waves pulses have been reported as stable for a longer time during the sterilization process with minimum heat emission and increased efficiency. The CHMI allows the system to produce bipolar square wave pulses and yielding high output voltage without using a transformer while fulfilling the pulse requirements for effective liquid food sterilization. This in turn can reduce power consumption and cost of the overall liquid food sterilization system. The simulation results have shown that pulses with peak output voltage of 2.4 kV, pulse width of between 1 2s and 1 ms at frequencies of 50 Hz and 100 Hz can be generated by a 7-level CHMI. Results from the experimental set-up based on a 5-level CHMI has indicated the potential of the proposed circuit in producing bipolar square wave output pulses with peak values that depends on the DC source level supplied to the CHMI modules, pulse width of between 12.5 2s and 1 ms at frequencies of 50 Hz and 100 Hz.

Keywords: pulsed electric field, multilevel inverter, bipolarsquare wave, food sterilization

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541 Transient Enhanced LDO Voltage Regulator with Improved Feed Forward Path Compensation

Authors: Suresh Alapati, Sreehari Rao Patri, K. S. R. Krishna Prasad

Abstract:

Anultra-low power capacitor less low-dropout voltage regulator with improved transient response using gain enhanced feed forward path compensation is presented in this paper. It is based on a cascade of a voltage amplifier and a transconductor stage in the feed forward path with regular error amplifier to form a composite gainenhanced feed forward stage. It broadens the gain bandwidth and thus improves the transient response without substantial increase in power consumption. The proposed LDO, designed for a maximum output current of 100 mA in UMC 180 nm, requires a quiescent current of 69 )A. An undershot of 153.79mV for a load current changes from 0mA to 100mA and an overshoot of 196.24mV for current change of 100mA to 0mA. The settling time is approximately 1.1 )s for the output voltage undershooting case. The load regulation is of 2.77 )V/mA at load current of 100mA. Reference voltage is generated by using an accurate band gap reference circuit of 0.8V.The costly features of SOC such as total chip area and power consumption is drastically reduced by the use of only a total compensation capacitance of 6pF while consuming power consumption of 0.096 mW.

Keywords: Capacitor-less LDO, frequency compensation, Transient response, latch, self-biased differential amplifier.

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540 Aerodynamic Design of Three-Dimensional Bellmouth for Low-Speed Open-Circuit Wind Tunnel

Authors: Harshavardhan Reddy, Balaji Subramanian

Abstract:

A systematic parametric study to find the optimum Bellmouth profile by relating geometric and performance parameters to satisfy a set of specifications is reported. A careful aerodynamic design of Bellmouth intake is critical to properly direct the flow with minimal losses and maximal flow uniformity into the honeycomb located inside the settling chamber of an indraft wind tunnel, thus improving the efficiency of the entire unit. Design charts for elliptically profiled Bellmouth's with two different contraction ratios (9 and 18) and three different test section speeds (25 m/s, 50 m/s, and 75 m/s) were presented. A significant performance improvement - especially in the coefficient of discharge and in the flow angularity and boundary layer thickness at the honeycomb inlet - was observed when an entry corner radius (r/D = 0.08) was added to the Bellmouth profile. The nonuniformity at the honeycomb inlet drops by about three times (~1% to 0.3%) when moving from square to regular octagonal cross-section. An octagonal cross-sectioned Bellmouth intake with L/d = 0.55, D/d = 1.625, and r/D = 0.08 met all the four target performance specifications and is proposed as the best choice for a low-speed wind tunnel.

Keywords: Bellmouth intake, low-speed wind tunnel, coefficient of discharge, nonuniformity, flow angularity, boundary layer thickness, CFD, aerodynamics.

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539 Firing Angle Range Control For Minimising Harmonics in TCR Employed in SVC-s

Authors: D. R. Patil, U. Gudaru

Abstract:

Most electrical distribution systems are incurring large losses as the loads are wide spread, inadequate reactive power compensation facilities and their improper control. A typical static VAR compensator consists of capacitor bank in binary sequential steps operated in conjunction with a thyristor controlled reactor of the smallest step size. This SVC facilitates stepless control of reactive power closely matching with load requirements so as to maintain power factor nearer to unity. This type of SVC-s requiring a appropriately controlled TCR. This paper deals with an air cored reactor suitable for distribution transformer of 3phase, 50Hz, Dy11, 11KV/433V, 125 KVA capacity. Air cored reactors are designed, built, tested and operated in conjunction with capacitor bank in five binary sequential steps. It is established how the delta connected TCR minimizes the harmonic components and the operating range for various electrical quantities as a function of firing angle is investigated. In particular firing angle v/s line & phase currents, D.C. components, THD-s, active and reactive powers, odd and even triplen harmonics, dominant characteristic harmonics are all investigated and range of firing angle is fixed for satisfactory operation. The harmonic spectra for phase and line quantities at specified firing angles are given. In case the TCR is operated within the bound specified in this paper established through simulation studies are yielding the best possible operating condition particularly free from all dominant harmonics.

Keywords: Binary Sequential switched capacitor bank, TCR, Nontriplen harmonics, step less Q control, Active and Reactivepower, Simulink

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538 A High-Speed and Low-Energy Ternary Content Addressable Memory Design Using Feedback in Match-Line Sense Amplifier

Authors: Syed Iftekhar Ali, M. S. Islam

Abstract:

In this paper we present an energy efficient match-line (ML) sensing scheme for high-speed ternary content-addressable memory (TCAM). The proposed scheme isolates the sensing unit of the sense amplifier from the large and variable ML capacitance. It employs feedback in the sense amplifier to successfully detect a match while keeping the ML voltage swing low. This reduced voltage swing results in large energy saving. Simulation performed using 130nm 1.2V CMOS logic shows at least 30% total energy saving in our scheme compared to popular current race (CR) scheme for similar search speed. In terms of speed, dynamic energy, peak power consumption and transistor count our scheme also shows better performance than mismatch-dependant (MD) power allocation technique which also employs feedback in the sense amplifier. Additionally, the implementation of our scheme is simpler than CR or MD scheme because of absence of analog control voltage and programmable delay circuit as have been used in those schemes.

Keywords: content-addressable memory, energy consumption, feedback, peak power, sensing scheme, sense amplifier, ternary.

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537 Survey of Key Management Algorithms in WiMAX

Authors: R. Chithra, B. Kalavathi, J. Christy Lavanya

Abstract:

WiMAX is a telecommunications technology and it is specified by the Institute of Electrical and Electronics Engineers Inc., as the IEEE 802.16 standard. The goal of this technology is to provide a wireless data over long distances in a variety of ways. IEEE 802.16 is a recent standard for mobile communication. In this paper, we provide an overview of various key management algorithms to provide security for WiMAX.

Keywords: Broadcast, Rekeying, Scalability, Secrecy, Unicast, WiMAX.

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536 Using Game Engines in Lightning Shielding: The Application of the Rolling Spheres Method on Virtual As-Built Power Substations

Authors: Yuri A. Gruber, Matheus Rosendo, Ulisses G. A. Casemiro, Klaus de Geus, Rafael T. Bee

Abstract:

Lightning strikes can cause severe negative impacts to the electrical sector causing direct damage to equipment as well as shutdowns, especially when occurring in power substations. In order to mitigate this problem, a meticulous planning of the power substation protection system is of vital importance. A critical part of this is the distribution of shielding wires through the substation, which creates a 3D imaginary protection mesh similar to a circus tarpaulin. Equipment enclosed in the volume defined by that 3D mesh is considered protected against lightning strikes. The use of traditional methods of longitudinal cutting analysis based on 2D CAD tools makes the process laborious and the results obtained may not guarantee satisfactory protection of electrical equipment. This work describes the application of a Game Engine to the problem of lightning protection of power substations providing the visualization of the 3D protection mesh, the amount of protected components and the highlight of equipment which remain unprotected. In addition, aspects regarding the implementation and the advantages of approaching the problem using Unreal® Engine 4 are described. In order to validate results, a comparison with traditional 2D methods is applied to the same case study to which the proposed technique has been applied. Finally, a comparative study involving different levels of protection using the technique developed in this work is presented, showing that modern game engines can be a powerful accessory for simulations in several areas of engineering.

Keywords: Game engine, rolling spheres method, substation protection, UE4, Unreal® Engine 4.

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535 Recovery of Metals from Electronic Waste by Physical and Chemical Recycling Processes

Authors: Muammer Kaya

Abstract:

The main purpose of this article is to provide a comprehensive review of various physical and chemical processes for electronic waste (e-waste) recycling, their advantages and shortfalls towards achieving a cleaner process of waste utilization, with especial attention towards extraction of metallic values. Current status and future perspectives of waste printed circuit boards (PCBs) recycling are described. E-waste characterization, dismantling/ disassembly methods, liberation and classification processes, composition determination techniques are covered. Manual selective dismantling and metal-nonmetal liberation at – 150 µm at two step crushing are found to be the best. After size reduction, mainly physical separation/concentration processes employing gravity, electrostatic, magnetic separators, froth floatation etc., which are commonly used in mineral processing, have been critically reviewed here for separation of metals and non-metals, along with useful utilizations of the non-metallic materials. The recovery of metals from e-waste material after physical separation through pyrometallurgical, hydrometallurgical or biohydrometallurgical routes is also discussed along with purification and refining and some suitable flowsheets are also given. It seems that hydrometallurgical route will be a key player in the base and precious metals recoveries from e-waste. E-waste recycling will be a very important sector in the near future from economic and environmental perspectives.

Keywords: E-waste, WEEE, PCB, recycling, metal recovery, hydrometallurgy, pyrometallurgy, biohydrometallurgy.

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534 A Three-Dimensional TLM Simulation Method for Thermal Effect in PV-Solar Cells

Authors: R. Hocine, A. Boudjemai, A. Amrani, K. Belkacemi

Abstract:

Temperature rising is a negative factor in almost all systems. It could cause by self heating or ambient temperature. In solar photovoltaic cells this temperature rising affects on the behavior of cells. The ability of a PV module to withstand the effects of periodic hot-spot heating that occurs when cells are operated under reverse biased conditions is closely related to the properties of the cell semi-conductor material.

In addition, the thermal effect also influences the estimation of the maximum power point (MPP) and electrical parameters for the PV modules, such as maximum output power, maximum conversion efficiency, internal efficiency, reliability, and lifetime. The cells junction temperature is a critical parameter that significantly affects the electrical characteristics of PV modules. For practical applications of PV modules, it is very important to accurately estimate the junction temperature of PV modules and analyze the thermal characteristics of the PV modules. Once the temperature variation is taken into account, we can then acquire a more accurate MPP for the PV modules, and the maximum utilization efficiency of the PV modules can also be further achieved.

In this paper, the three-Dimensional Transmission Line Matrix (3D-TLM) method was used to map the surface temperature distribution of solar cells while in the reverse bias mode. It was observed that some cells exhibited an inhomogeneity of the surface temperature resulting in localized heating (hot-spot). This hot-spot heating causes irreversible destruction of the solar cell structure. Hot spots can have a deleterious impact on the total solar modules if individual solar cells are heated. So, the results show clearly that the solar cells are capable of self-generating considerable amounts of heat that should be dissipated very quickly to increase PV module's lifetime.

Keywords: Thermal effect, Conduction, Heat dissipation, Thermal conductivity, Solar cell, PV module, Nodes, 3D-TLM.

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533 Automatic Adjustment of Thresholds via Closed-Loop Feedback Mechanism for Solder Paste Inspection

Authors: Chia-Chen Wei, Pack Hsieh, Jeffrey Chen

Abstract:

Surface Mount Technology (SMT) is widely used in the area of the electronic assembly in which the electronic components are mounted to the surface of the printed circuit board (PCB). Most of the defects in the SMT process are mainly related to the quality of solder paste printing. These defects lead to considerable manufacturing costs in the electronics assembly industry. Therefore, the solder paste inspection (SPI) machine for controlling and monitoring the amount of solder paste printing has become an important part of the production process. So far, the setting of the SPI threshold is based on statistical analysis and experts’ experiences to determine the appropriate threshold settings. Because the production data are not normal distribution and there are various variations in the production processes, defects related to solder paste printing still occur. In order to solve this problem, this paper proposes an online machine learning algorithm, called the automatic threshold adjustment (ATA) algorithm, and closed-loop architecture in the SMT process to determine the best threshold settings. Simulation experiments prove that our proposed threshold settings improve the accuracy from 99.85% to 100%.

Keywords: Big data analytics, Industry 4.0, SPI threshold setting, surface mount technology.

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532 Robust & Energy Efficient Universal Gates for High Performance Computer Networks at 22nm Process Technology

Authors: M. Geetha Priya, K. Baskaran, S. Srinivasan

Abstract:

Digital systems are said to be constructed using basic logic gates. These gates are the NOR, NAND, AND, OR, EXOR & EXNOR gates. This paper presents a robust three transistors (3T) based NAND and NOR gates with precise output logic levels, yet maintaining equivalent performance than the existing logic structures. This new set of 3T logic gates are based on CMOS inverter and Pass Transistor Logic (PTL). The new universal logic gates are characterized by better speed and lower power dissipation which can be straightforwardly fabricated as memory ICs for high performance computer networks. The simulation tests were performed using standard BPTM 22nm process technology using SYNOPSYS HSPICE. The 3T NAND gate is evaluated using C17 benchmark circuit and 3T NOR is gate evaluated using a D-Latch. According to HSPICE simulation in 22 nm CMOS BPTM process technology under given conditions and at room temperature, the proposed 3T gates shows an improvement of 88% less power consumption on an average over conventional CMOS logic gates. The devices designed with 3T gates will make longer battery life by ensuring extremely low power consumption.

Keywords: Low power, CMOS, pass-transistor, flash memory, logic gates.

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531 Electrical Characterization and Reliability Analysis of HfO2-TiO2-Al MOSCAPs

Authors: Shibesh Dutta, Sivaramakrishnan R., Sundar Gopalan, Balakrishnan Shankar

Abstract:

MOSCAPs of various combinations of Hafnium oxide and Titanium oxide of varying thickness with Aluminum as gate electrode have been fabricated and electrically characterized. The effects of voltage stress on the I-V characteristics for prolonged time durations have been studied and compared. Results showed hard breakdown and negligible degradation of reliability under stress.

Keywords: breakdown, MOSCAP, voltage stress.

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530 A Novel Digital Implementation of AC Voltage Controller for Speed Control of Induction Motor

Authors: Ali M. Eltamaly, A. I. Alolah, R. Hamouda, M. Y. Abdulghany

Abstract:

In this paper a novel, simple and reliable digital firing scheme has been implemented for speed control of three-phase induction motor using ac voltage controller. The system consists of three-phase supply connected to the three-phase induction motor via three triacs and its control circuit. The ac voltage controller has three modes of operation depending on the shape of supply current. The performance of the induction motor differs in each mode where the speed is directly proportional with firing angle in two modes and inversely in the third one. So, the control system has to detect the current mode of operation to choose the correct firing angle of triacs. Three sensors are used to feed the line currents to control system to detect the mode of operation. The control strategy is implemented using a low cost Xilinx Spartan-3E field programmable gate array (FPGA) device. Three PI-controllers are designed on FPGA to control the system in the three-modes. Simulation of the system is carried out using PSIM computer program. The simulation results show stable operation for different loading conditions especially in mode 2/3. The simulation results have been compared with the experimental results from laboratory prototype.

Keywords: FPGA, Induction motor, PSIM, triac, Voltage controller.

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529 Production of Size-Selected Tin Nanoclusters for Device Applications

Authors: Ahmad I. Ayesh

Abstract:

This work reports on the fabrication of tin nanoclusters by sputtering and inert-gas condensation inside an ultra-high vacuum compatible system. This technique allows to fine tune the size and yield of nanoclusters by controlling the nanocluster source parameters. The produced nanoclusters are deposited on SiO2/Si substrate with pre-formed electrical electrodes to produce a nanocluster device. Those devices can be potentially used for gas sensor applications.

Keywords: Tin, nanoclusters, inert-gas condensation.

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528 Feasibility Study on the Use of HEMS for Thermal Comfort and Energy Saving in Japanese Residential Buildings

Authors: K. C. Rajan, H. B. Rijal, Kazui Yoshida, Masanori Shukuya

Abstract:

The electricity consumption in the Japanese household sector has increased with higher rate than that of other sectors. This may be because of aging and information oriented society that requires more electrical appliances to make the life better and easier, under this circumstances, energy saving is one of the essential necessity in Japanese society. To understand the way of energy use and demand response of the residential occupants, it is important to understand the structure of energy used. Home Energy Management System (HEMS) may be used for understanding the pattern and the structure of energy used. HEMS is a visualization system of the energy usage by connecting the electrical equipment in the home and thereby automatically control the energy use in each device, so that the energy saving is achieved. Therefore, the HEMS can provide with the easiest way to understand the structure of energy use. The HEMS has entered the mainstream of the Japanese market. The objective of this study is to understand the pattern of energy saving and cost saving in different regions including Japan during HEMS use. To observe thermal comfort level of HEMS managed residential buildings in Japan, the field survey was made and altogether, 1534 votes from 37 occupants related to thermal comfort, occupants’ behaviors and clothing insulation were collected and analyzed. According to the result obtained, approximately 17.9% energy saving and 8.9% cost saving is possible if HEMS is applied effectively. We found the thermal sensation and overall comfort level of the occupants is high in the studied buildings. The occupants residing in those HEMS buildings are satisfied with the thermal environment and they have accepted it. Our study concluded that the significant reduction in Japanese residential energy use can be achieved by the proper utilization of the HEMS. Better thermal comfort is also possible with the use of HEMS if energy use is managed in a rationally effective manner.

Keywords: Energy reduction, thermal comfort, HEMS market, thermal environment.

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527 Application of Voltammetry to Study Corrosion of Steel Buried in Unsaturated Soil in the Presence of Cathodic Protection

Authors: Mandlenkosi George Robert Mahlobo, Peter Apata Olubambi, Philippe Refait

Abstract:

The aim of this study was to use voltammetry as a method to understand the behavior of steel in unsaturated soil in the presence of cathodic protection (CP). Three carbon steel coupons were buried in artificial soil wetted at 65-70% of saturation for 37 days. All three coupons were left at open circuit potential (OCP) for the first seven days in the unsaturated soil before CP which was only applied on two of the three coupons at the protection potential -0.8 V vs. Cu/CuSO4 for the remaining 30 days of the experiment. Voltammetry was performed weekly on the coupon without CP while electrochemical impedance spectroscopy (EIS) was performed daily to monitor and correct the applied CP potential from ohmic drop. Voltammetry was finally performed the last day on the coupons under CP. All the voltammograms were modeled with mathematical equations in order to compute the electrochemical parameters and subsequently deduce the corrosion rate of the steel coupons. For the coupon without CP, the corrosion rate was determined at 300 µm/y. For the coupons under CP, the residual corrosion rate under CP was estimated at 12 µm/y while the corrosion rate of the coupons, after interruption of CP, was estimated at 25 µm/y. This showed that CP was efficient due to two effects: a direct effect, from the decreased potential, and an induced effect, associated with the increased interfacial pH that promoted the formation of a protective layer on the steel surface.

Keywords: Carbon steel, cathodic protection, voltammetry, unsaturated soil, Raman spectroscopy.

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526 DFIG-Based Wind Turbine with Shunt Active Power Filter Controlled by Double Nonlinear Predictive Controller

Authors: Abderrahmane El Kachani, El Mahjoub Chakir, Anass Ait Laachir, Abdelhamid Niaaniaa, Jamal Zerouaoui, Tarik Jarou

Abstract:

This paper presents a wind turbine based on the doubly fed induction generator (DFIG) connected to the utility grid through a shunt active power filter (SAPF). The whole system is controlled by a double nonlinear predictive controller (DNPC). A Taylor series expansion is used to predict the outputs of the system. The control law is calculated by optimization of the cost function. The first nonlinear predictive controller (NPC) is designed to ensure the high performance tracking of the rotor speed and regulate the rotor current of the DFIG, while the second one is designed to control the SAPF in order to compensate the harmonic produces by the three-phase diode bridge supplied by a passive circuit (rd, Ld). As a result, we obtain sinusoidal waveforms of the stator voltage and stator current. The proposed nonlinear predictive controllers (NPCs) are validated via simulation on a 1.5 MW DFIG-based wind turbine connected to an SAPF. The results obtained appear to be satisfactory and promising.

Keywords: Wind power, doubly fed induction generator, shunt active power filter, double nonlinear predictive controller.

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525 A High-Speed Multiplication Algorithm Using Modified Partial Product Reduction Tree

Authors: P. Asadee

Abstract:

Multiplication algorithms have considerable effect on processors performance. A new high-speed, low-power multiplication algorithm has been presented using modified Dadda tree structure. Three important modifications have been implemented in inner product generation step, inner product reduction step and final addition step. Optimized algorithms have to be used into basic computation components, such as multiplication algorithms. In this paper, we proposed a new algorithm to reduce power, delay, and transistor count of a multiplication algorithm implemented using low power modified counter. This work presents a novel design for Dadda multiplication algorithms. The proposed multiplication algorithm includes structured parts, which have important effect on inner product reduction tree. In this paper, a 1.3V, 64-bit carry hybrid adder is presented for fast, low voltage applications. The new 64-bit adder uses a new circuit to implement the proposed carry hybrid adder. The new adder using 80 nm CMOS technology has been implemented on 700 MHz clock frequency. The proposed multiplication algorithm has achieved 14 percent improvement in transistor count, 13 percent reduction in delay and 12 percent modification in power consumption in compared with conventional designs.

Keywords: adder, CMOS, counter, Dadda tree, encoder.

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524 Implementation of an Improved Secure System Detection for E-passport by using EPC RFID Tags

Authors: A. Baith Mohamed, Ayman Abdel-Hamid, Kareem Youssri Mohamed

Abstract:

Current proposals for E-passport or ID-Card is similar to a regular passport with the addition of tiny contactless integrated circuit (computer chip) inserted in the back cover, which will act as a secure storage device of the same data visually displayed on the photo page of the passport. In addition, it will include a digital photograph that will enable biometric comparison, through the use of facial recognition technology at international borders. Moreover, the e-passport will have a new interface, incorporating additional antifraud and security features. However, its problems are reliability, security and privacy. Privacy is a serious issue since there is no encryption between the readers and the E-passport. However, security issues such as authentication, data protection and control techniques cannot be embedded in one process. In this paper, design and prototype implementation of an improved E-passport reader is presented. The passport holder is authenticated online by using GSM network. The GSM network is the main interface between identification center and the e-passport reader. The communication data is protected between server and e-passport reader by using AES to encrypt data for protection will transferring through GSM network. Performance measurements indicate a 19% improvement in encryption cycles versus previously reported results.

Keywords: RFID "Radio Frequency Identification", EPC"Electronic Product Code", ICAO "International Civil Aviation Organization", IFF "Identify Friend or Foe"

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523 A Comprehensive CFD Model for Sugar-Cane Bagasse Heterogeneous Combustion in a Grate Boiler System

Authors: Daniel J. O. Ferreira, Juan H. Sosa-Arnao, Bruno C. Moreira, Leonardo P. Rangel, Song W. Park

Abstract:

The comprehensive CFD models have been used to represent and study the heterogeneous combustion of biomass. In the present work, the operation of a global flue gas circuit in the sugarcane bagasse combustion, from wind boxes below primary air grate supply, passing by bagasse insertion in swirl burners and boiler furnace, to boiler bank outlet is simulated. It uses five different meshes representing each part of this system located in sequence: wind boxes and grate, boiler furnace, swirl burners, superheaters and boiler bank. The model considers turbulence using standard k-ε, combustion using EDM, radiation heat transfer using DTM with 16 ray directions and bagasse particle tracking represented by Schiller- Naumann model. The results showed good agreement with expected behavior found in literature and equipment design. The more detailed results view in separated parts of flue gas system allows observing some flow behaviors that cannot be represented by usual simplifications like bagasse supply under homogeneous axial and rotational vectors and others that can be represented using new considerations like the representation of 26 thousand grate orifices by 144 rectangular inlets.

Keywords: Comprehensive CFD model, sugar-cane bagasse combustion, sugar-cane bagasse grate boiler.

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522 Preparation and Cutting Performance of Boron-Doped Diamond Coating on Cemented Carbide Cutting Tools with High Cobalt Content

Authors: Zhaozhi Liu, Feng Xu, Junhua Xu, Xiaolong Tang, Ying Liu, Dunwen Zuo

Abstract:

Chemical vapor deposition (CVD) diamond coated cutting tool has excellent cutting performance, it is the most ideal tool for the processing of nonferrous metals and alloys, composites, nonmetallic materials and other difficult-to-machine materials efficiently and accurately. Depositing CVD diamond coating on the cemented carbide with high cobalt content can improve its toughness and strength, therefore, it is very important to research on the preparation technology and cutting properties of CVD diamond coated cemented carbide cutting tool with high cobalt content. The preparation technology of boron-doped diamond (BDD) coating has been studied and the coated drills were prepared. BDD coating were deposited on the drills by using the optimized parameters and the SEM results show that there are no cracks or collapses in the coating. Cutting tests with the prepared drills against the silumin and aluminum base printed circuit board (PCB) have been studied. The results show that the wear amount of the coated drill is small and the machined surface has a better precision. The coating does not come off during the test, which shows good adhesion and cutting performance of the drill.

Keywords: Cemented carbide with high cobalt content, CVD boron-doped diamond, cutting test, drill.

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521 Improvement of the Reliability of the Industrial Electric Networks

Authors: M. Bouguerra, I. Habi

Abstract:

The continuity in the electric supply of the electric installations is becoming one of the main requirements of the electric supply network (generation, transmission, and distribution of the electric energy). The achievement of this requirement depends from one side on the structure of the electric network and on the other side on the avaibility of the reserve source provided to maintain the supply in case of failure of the principal one. The avaibility of supply does not only depends on the reliability parameters of the both sources (principal and reserve) but it also depends on the reliability of the circuit breaker which plays the role of interlocking the reserve source in case of failure of the principal one. In addition, the principal source being under operation, its control can be ideal and sure, however, for the reserve source being in stop, a preventive maintenances which proceed on time intervals (periodicity) and for well defined lengths of time are envisaged, so that this source will always available in case of the principal source failure. The choice of the periodicity of preventive maintenance of the source of reserve influences directly the reliability of the electric feeder system In this work and on the basis of the semi- markovian's processes, the influence of the time of interlocking the reserve source upon the reliability of an industrial electric network is studied and is given the optimal time of interlocking the reserve source in case of failure the principal one, also the influence of the periodicity of the preventive maintenance of the source of reserve is studied and is given the optimal periodicity.

Keywords: Semi-Markovians processes, reliability, optimization, industrial electric network.

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520 LINUX Cluster Possibilities in 3-D PHOTO Quality Imaging and Animation

Authors: Arjun Jain, Himanshu Agrawal, Nalini Vasudevan

Abstract:

In this paper we present the PC cluster built at R.V. College of Engineering (with great help from the Department of Computer Science and Electrical Engineering). The structure of the cluster is described and the performance is evaluated by rendering of complex 3D Persistence of Vision (POV) images by the Ray-Tracing algorithm. Here, we propose an unexampled method to render such images, distributedly on a low cost scalable.

Keywords: PC cluster, parallel computations, ray tracing, persistence of vision, rendering.

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519 A Survey of Various Algorithms for Vlsi Physical Design

Authors: Rajine Swetha R, B. Shekar Babu, Sumithra Devi K.A

Abstract:

Electronic Systems are the core of everyday lives. They form an integral part in financial networks, mass transit, telephone systems, power plants and personal computers. Electronic systems are increasingly based on complex VLSI (Very Large Scale Integration) integrated circuits. Initial electronic design automation is concerned with the design and production of VLSI systems. The next important step in creating a VLSI circuit is Physical Design. The input to the physical design is a logical representation of the system under design. The output of this step is the layout of a physical package that optimally or near optimally realizes the logical representation. Physical design problems are combinatorial in nature and of large problem sizes. Darwin observed that, as variations are introduced into a population with each new generation, the less-fit individuals tend to extinct in the competition of basic necessities. This survival of fittest principle leads to evolution in species. The objective of the Genetic Algorithms (GA) is to find an optimal solution to a problem .Since GA-s are heuristic procedures that can function as optimizers, they are not guaranteed to find the optimum, but are able to find acceptable solutions for a wide range of problems. This survey paper aims at a study on Efficient Algorithms for VLSI Physical design and observes the common traits of the superior contributions.

Keywords: Genetic Algorithms, Physical Design, VLSI.

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518 Modular Harmonic Cancellation in a Multiplier High Voltage Direct Current Generator

Authors: Ahmad Zahran, Ahmed Herzallah, Ahmad Ahmad, Mahran Quraan

Abstract:

Generation of high DC voltages is necessary for testing the insulation material of high voltage AC transmission lines with long lengths. The harmonic and ripple contents of the output DC voltage supplied by high voltage DC circuits require the use of costly capacitors to smooth the output voltage after rectification. This paper proposes a new modular multiplier high voltage DC generator with embedded Cockcroft-Walton circuits that achieve a negligible harmonic and ripple contents of the output DC voltage without the need for costly filters to produce a nearly constant output voltage. In this new topology, Cockcroft-Walton modules are connected in series to produce a high DC output voltage. The modules are supplied by low input AC voltage sources that have the same magnitude and frequency and shifted from each other by a certain angle to eliminate the harmonics from the output voltage. The small ripple factor is provided by the smoothing column capacitors and the phase shifted input voltages of the cascaded modules. The constituent harmonics within each module are determined using Fourier analysis. The viability of the proposed DC generator for testing purposes and the effectiveness of the cascaded connection are confirmed by numerical simulations using MATLAB/Simulink.

Keywords: Cockcroft-Walton circuit, Harmonics, Ripple factor, HVDC generator.

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