WASET
    T. Vigneswaran and  B. Mukundhan and  P. Subbarami Reddy,  A Novel Low Power, High Speed 14 Transistor CMOS Full Adder Cell with 50% Improvement in Threshold Loss Problem.   journal   = {International Journal of Electronics and Communication Engineering}, [online]. World Academy of Science, Engineering and Technology.
    January 2008, vol. 13(1). 138 - 142
    [viewed 11 May 2024]. Available from: https://publications.waset.org/pdf/10516.