Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 31100
A High-Speed and Low-Energy Ternary Content Addressable Memory Design Using Feedback in Match-Line Sense Amplifier

Authors: Syed Iftekhar Ali, M. S. Islam


In this paper we present an energy efficient match-line (ML) sensing scheme for high-speed ternary content-addressable memory (TCAM). The proposed scheme isolates the sensing unit of the sense amplifier from the large and variable ML capacitance. It employs feedback in the sense amplifier to successfully detect a match while keeping the ML voltage swing low. This reduced voltage swing results in large energy saving. Simulation performed using 130nm 1.2V CMOS logic shows at least 30% total energy saving in our scheme compared to popular current race (CR) scheme for similar search speed. In terms of speed, dynamic energy, peak power consumption and transistor count our scheme also shows better performance than mismatch-dependant (MD) power allocation technique which also employs feedback in the sense amplifier. Additionally, the implementation of our scheme is simpler than CR or MD scheme because of absence of analog control voltage and programmable delay circuit as have been used in those schemes.

Keywords: Energy Consumption, Feedback, Ternary, content-addressable memory, peak power, sensing scheme, sense amplifier

Digital Object Identifier (DOI):

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1517


[1] M. Faezipour and M. Nourani, "Wire-speed TCAM-based architectures for multimatch packet classification", IEEE Trans. Computers, vol. 58, no. 1, pp. 5-17, Jan 2009.
[2] K. Pagiamtzis and A. Sheikholeslami, "Content-addressable memory (CAM) circuits and architectures: a tutorial and survey," IEEE J. Solid- State Circuits, vol. 41, no. 3, pp. 712-727, March 2006.
[3] H. Kadota, J. Miyake, Y. Nishimichi, H. Kudoh, and K. Kagawa, "An 8-kbit content-addressable and reentrant memory," IEEE J. Solid-State Circuits, vol. 20, no. 5, pp. 951-957, Oct 1985.
[4] C. A. Zukowski and S.-Y. Wang, "Use of selective precharge for low power content-addressable memories," in Proc. IEEE Int. Symp. Circuits Syst. (ISCAS), vol. 3, 1997, pp. 1788-1791.
[5] K. Pagiamtzis and A. Sheikholeslami, "A low-power contentaddressable memory (CAM) using pipelined hierarchical search scheme," IEEE J. Solid-State Circuits, vol. 39, no. 9, pp. 1512-1519, Sept 2004.
[6] C.-S. Lin, J.-C. Chang, and B.-D. Liu, "A low-power precomputationbased fully parallel content-addressable memory," IEEE J. Solid-State Circuits, vol. 38, no. 4, pp. 654-662, Apr 2003.
[7] M. Motomura, J. Toyoura, K. Hirata, H. Ooka, H. Yamada, and T. Enomoto, "A 1.2-million transistor, 33-MHz, 20-b dictionary search processor (DISP) ULSI with a 160-kb CAM," IEEE J. Solid-State Circuits, vol. 25, no. 5, pp. 1158-1165, Oct 1990.
[8] S. Hanzawa, T. Sakata, K. Kajigaya, R. Takemura, and T. Kawahara , "A large-scale and low-power CAM architecture featuring a one-hotspot block code for IP-address lookup in a network router," IEEE J. Solid-State Circuits, vol. 40, no. 4, pp. 853-861, Apr 2005.
[9] G. Kasai, Y. Takarabe, K. Furumi, and M. Yoneda, "200 MHz/200 MSPS 3.2 W at 1.5 V Vdd, 9.4 Mbits ternary CAM with new charge injection match detect circuits and bank selection scheme," in Proc. IEEE Custom Integrated Circuits Conf. (CICC), 2003, pp. 387-390.
[10] M. M. Khellah and M. Elmasry, "Use of charge sharing to reduce energy consumption in wide fan-in gates," in Proc. IEEE Int. Symp. Circuits Syst. (ISCAS), vol. 2, 1998, pp. 9-12.
[11] S. Baeg, "Low-power ternary content-addressable memory design using a segmented match line," IEEE Trans. Circuits Syst., vol. 55, no. 6, pp. 1485-1494, July 2008.
[12] N. Mohan and M. Sachdev, "Low-capacitance and charge-shared match lines for low-energy high-performance TCAMs," IEEE J. Solid-State Circuits, vol. 42, no. 9, pp. 2054-1519, Sept 2007.
[13] I. Arsovski, T. Chandler, and A. Sheikholeslami, "A ternary contentaddressable memory (TCAM) based on 4T static storage and including a current-race sensing scheme," IEEE J. Solid-State Circuits, vol. 38, no. 1, pp. 155-158, Jan 2003.
[14] I. Arsovski and A. Sheikholeslami, "A mismatch-dependent power allocation technique for match-line sensing in content-addressable memories," IEEE J. Solid-State Circuits, vol. 38, no. 11, pp. 1958-1966, Nov 2003.
[15] (2010) Predictive Technology Model (PTM).
[Online]. Available: