Search results for: Short circuit current
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 3527

Search results for: Short circuit current

3407 Design and Implementation of 4 Bit Multiplier Using Fault Tolerant Hybrid Full Adder

Authors: C. Kalamani, V. Abishek Karthick, S. Anitha, K. Kavin Kumar

Abstract:

The fault tolerant system plays a crucial role in the critical applications which are being used in the present scenario. A fault may change the functionality of circuits. Aim of this paper is to design multiplier using fault tolerant hybrid full adder. Fault tolerant hybrid full adder is designed to check and repair any fault in the circuit using self-checking circuit and the self-repairing circuit. Further, the use of conventional logic circuits may result in more area, delay as well as power consumption. In order to reduce these parameters of the circuit, GDI (Gate Diffusion Input) techniques with less number of transistors are used compared to conventional full adder circuit. This reduces the area, delay and power consumption. The proposed method solves the major problems occurring in the most crucial and critical applications.

Keywords: Gate diffusion input, hybrid full adder, self-checking, fault tolerant.

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3406 Fault Classification of Double Circuit Transmission Line Using Artificial Neural Network

Authors: Anamika Jain, A. S. Thoke, R. N. Patel

Abstract:

This paper addresses the problems encountered by conventional distance relays when protecting double-circuit transmission lines. The problems arise principally as a result of the mutual coupling between the two circuits under different fault conditions; this mutual coupling is highly nonlinear in nature. An adaptive protection scheme is proposed for such lines based on application of artificial neural network (ANN). ANN has the ability to classify the nonlinear relationship between measured signals by identifying different patterns of the associated signals. One of the key points of the present work is that only current signals measured at local end have been used to detect and classify the faults in the double circuit transmission line with double end infeed. The adaptive protection scheme is tested under a specific fault type, but varying fault location, fault resistance, fault inception angle and with remote end infeed. An improved performance is experienced once the neural network is trained adequately, which performs precisely when faced with different system parameters and conditions. The entire test results clearly show that the fault is detected and classified within a quarter cycle; thus the proposed adaptive protection technique is well suited for double circuit transmission line fault detection & classification. Results of performance studies show that the proposed neural network-based module can improve the performance of conventional fault selection algorithms.

Keywords: Double circuit transmission line, Fault detection and classification, High impedance fault and Artificial Neural Network.

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3405 Bifurcation and Chaos of the Memristor Circuit

Authors: Wang Zhulin, Min Fuhong, Peng Guangya, Wang Yaoda, Cao Yi

Abstract:

In this paper, a magnetron memristor model based on hyperbolic sine function is presented and the correctness proved by studying the trajectory of its voltage and current phase, and then a memristor chaotic system with the memristor model is presented. The phase trajectories and the bifurcation diagrams and Lyapunov exponent spectrum of the magnetron memristor system are plotted by numerical simulation, and the chaotic evolution with changing the parameters of the system is also given. The paper includes numerical simulations and mathematical model, which confirming that the system, has a wealth of dynamic behavior.

Keywords: Memristor, chaotic circuit, dynamical behavior, chaotic system.

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3404 Constructing a Two-Tier Test about Source Current to Diagnose Pre-Service Elementary School Teacher’ Misconceptions

Authors: Abdeljalil Métioui

Abstract:

We discuss the alternative conceptions of students analysing the behaviour of electrical circuits. The present paper aims at, on one hand, studying the misconceptions of 80 elementary pre-service teachers from Quebec in Canada, in relation to the current source in DC circuits. To do this, they completed a two-choice questionnaire (true or false) with justification. Data analysis identifies many conceptual difficulties. For example, their majority considered a battery as a source of constant current: When a circuit composed of battery and resistors is modified, the current supplied by the battery remains unchanged. On the other hand, considering the alternatives conceptions identified we develop a two-tier test about source current. The aim of this two-tier test is to help teachers to diagnose rapidly their students’ misconceptions in order to consider in their teaching.   

Keywords: Two-tier diagnostic test, current source, pre-service teachers, alternative conceptions after teaching, qualitative study.

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3403 A New Method Presentation for Fault Location in Power Transformers

Authors: Hossein Mohammadpour, Rahman Dashti

Abstract:

Power transformers are among the most important and expensive equipments in the electric power systems. Consequently the transformer protection is an essential part of the system protection. This paper presents a new method for locating transformer winding faults such as turn-to-turn, turn-to-core, turn-totransformer body, turn-to-earth, and high voltage winding to low voltage winding. In this study the current and voltage signals of input and output terminals of the transformer are measured, which the Fourier transform of measured signals and harmonic analysis determine the fault's location.

Keywords: turn-to-turn faults, short circuit, Fourier transform, harmonic analysis.

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3402 Fault and Theft Recognition Using Toro Dial Sensor in Programmable Current Relay for Feeder Security

Authors: R. Kamalakannan, N. Ravi Kumar

Abstract:

Feeder protection is important in transmission and distribution side because if any fault occurs in any feeder or transformer, man power is needed to identify the problem and it will take more time. In the existing system, directional overcurrent elements with load further secured by a load encroachment function can be used to provide necessary security and sensitivity for faults on remote points in a circuit. It is validated only in renewable plant collector circuit protection applications over a wide range of operating conditions. In this method, the directional overcurrent feeder protection is developed by using monitoring of feeder section through internet. In this web based monitoring, the fault and power theft are identified by using Toro dial sensor and its information is received by SCADA (Supervisory Control and Data Acquisition) and controlled by ARM microcontroller. This web based monitoring is also used to monitor the feeder management, directional current detection, demand side management, overload fault. This monitoring system is capable of monitoring the distribution feeder over a large area depending upon the cost. It is also used to reduce the power theft, time and man power. The simulation is done by MATLAB software.

Keywords: Current sensor, distribution feeder protection, directional overcurrent, power theft, protective relay.

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3401 Reducing Test Vectors Count Using Fault Based Optimization Schemes in VLSI Testing

Authors: Vinod Kumar Khera, R. K. Sharma, A. K. Gupta

Abstract:

Power dissipation increases exponentially during test mode as compared to normal operation of the circuit. In extreme cases, test power is more than twice the power consumed during normal operation mode. Test vector generation scheme is key component in deciding the power hungriness of a circuit during testing. Test vector count and consequent leakage current are functions of test vector generation scheme. Fault based test vector count optimization has been presented in this work. It helps in reducing test vector count and the leakage current. In the presented scheme, test vectors have been reduced by extracting essential child vectors. The scheme has been tested experimentally using stuck at fault models and results ensure the reduction in test vector count.

Keywords: Low power VLSI testing, independent fault, essential faults, test vector reduction.

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3400 Enhancement of Performance Utilizing Low Complexity Switched Beam Antenna

Authors: P. Chaipanya, R. Keawchai, W. Sombatsanongkhun, S. Jantaramporn

Abstract:

To manage the demand of wireless communication that has been dramatically increased, switched beam antenna in smart antenna system is focused. Implementation of switched beam antennas at mobile terminals such as notebook or mobile handset is a preferable choice to increase the performance of the wireless communication systems. This paper proposes the low complexity switched beam antenna using single element of antenna which is suitable to implement at mobile terminal. Main beam direction is switched by changing the positions of short circuit on the radiating patch. There are four cases of switching that provide four different directions of main beam. Moreover, the performance in terms of Signal to Interference Ratio when utilizing the proposed antenna is compared with the one using omni-directional antenna to confirm the performance improvable.

Keywords: Switched beam, shorted circuit, single element, signal to interference ratio.

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3399 Analyzing Current Transformers Saturation Characteristics for Different Connected Burden Using LabVIEW Data Acquisition Tool

Authors: D. Subedi, S. Pradhan

Abstract:

Current transformers are an integral part of power system because it provides a proportional safe amount of current for protection and measurement applications. However, when the power system experiences an abnormal situation leading to huge current flow, then this huge current is proportionally injected to the protection and metering circuit. Since the protection and metering equipment’s are designed to withstand only certain amount of current with respect to time, these high currents pose a risk to man and equipment. Therefore, during such instances, the CT saturation characteristics have a huge influence on the safety of both man and equipment and on the reliability of the protection and metering system. This paper shows the effect of burden on the Accuracy Limiting factor/ Instrument security factor of current transformers and the change in saturation characteristics of the CT’s. The response of the CT to varying levels of overcurrent at different connected burden will be captured using the data acquisition software LabVIEW. Analysis is done on the real time data gathered using LabVIEW. Variation of current transformer saturation characteristics with changes in burden will be discussed.

Keywords: Accuracy limiting factor, burden, current transformer, instrument security factor, saturation characteristics.

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3398 The Influence of Voltage Flicker for the Wind Generator upon Distribution System

Authors: Jin-Lung Guan, Jyh-Cherng Gu, Ming-Ta Yang, Hsin-Hung Chang, Chun-Wei Huang, Shao-Yu Huang

Abstract:

One of the most important power quality issues is voltage flicker. Nowadays this issue also impacts the power system all over the world. The fact of the matter is that the more and the larger capacity of wind generator has been installed. Under unstable wind power situation, the variation of output current and voltage have caused trouble to voltage flicker. Hence, the major purpose of this study is to analyze the impact of wind generator on voltage flicker of power system. First of all, digital simulation and analysis are carried out based on wind generator operating under various system short circuit capacity, impedance angle, loading, and power factor of load. The simulation results have been confirmed by field measurements.

Keywords: Wind Generator, Voltage Flicker

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3397 Investigation of Multiple Material Gate Impact on Short Channel Effects and Reliability of Nanoscale SOI MOSFETs

Authors: Paniz Tafakori, Ali A. Orouji

Abstract:

In this paper the features of multiple material gate silicon-on-insulator MOSFETs are presented and compared with single material gate silicon-on-insulator MOSFET structures. The results indicate that the multiple material gate structures reduce short channel effects such as drain induce barrier lowering, hot electron effect and better current characteristics in comparison with single material structures

Keywords: Short-channel effects (SCEs), Dual material gate (DMG), Triple material gate (TMG), Pentamerous material gate (PMG).

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3396 Investigation of Transmission Line Overvoltages and their Deduction Approach

Authors: A. Hayati Soloot, A. Gholami, E. Agheb, A. Ghorbandaeipour, P. Mokhtari

Abstract:

The two significant overvoltages in power system, switching overvoltage and lightning overvoltage, are investigated in this paper. Firstly, the effect of various power system parameters on Line Energization overvoltages is evaluated by simulation in ATP. The dominant parameters include line parameters; short-circuit impedance and circuit breaker parameters. Solutions to reduce switching overvoltages are reviewed and controlled closing using switchsync controllers is proposed as proper method. This paper also investigates lightning overvoltages in the overhead-cable transition. Simulations are performed in PSCAD/EMTDC. Surge arresters are applied in both ends of cable to fulfill the insulation coordination. The maximum amplitude of overvoltages inside the cable is surveyed which should be of great concerns in insulation coordination studies.

Keywords: Switching Overvoltage, Lightning Overvoltage, Insulation Coordination, ATP, PSCAD/EMTDC.

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3395 Low Frequency Multiple Divider Using Resonant Model

Authors: Chih Chin Yang, Chih Yu Lee, Jing Yi Wang, Mei Zhen Xue, Chia Yueh Wu

Abstract:

A well-defined frequency multiple dividing (FMD) circuit using a resonant model is presented in this research. The basic component of a frequency multiple divider as used in a resonant model is established by compositing a well-defined resonant effect of negative differential resistance (NDR) characteristics which possesses a wider operational region and high operational current at a bias voltage of about 1.15 V. The resonant model is then applied in the frequency dividing circuit with the above division ratio (RD) of 200 at the signal input of middle frequency. The division ratio also exists at the input of a low frequency signal.

Keywords: Divider, frequency, resonant model.

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3394 Analytical Modeling of Channel Noise for Gate Material Engineered Surrounded/Cylindrical Gate (SGT/CGT) MOSFET

Authors: Pujarini Ghosh A, Rishu Chaujar B, Subhasis Haldar C, R.S Gupta D, Mridula Gupta E

Abstract:

In this paper, an analytical modeling is presentated to describe the channel noise in GME SGT/CGT MOSFET, based on explicit functions of MOSFETs geometry and biasing conditions for all channel length down to deep submicron and is verified with the experimental data. Results shows the impact of various parameters such as gate bias, drain bias, channel length ,device diameter and gate material work function difference on drain current noise spectral density of the device reflecting its applicability for circuit design applications.

Keywords: Cylindrical/Surrounded gate (SGT/CGT) MOSFET, Gate Material Engineering (GME), Spectral Noise and short channeleffect (SCE).

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3393 A Current-mode Continuous-time Sigma-delta Modulator based on Translinear Loop Principle

Authors: P. Jelodarian , E. Farshidi

Abstract:

In this paper, a new approach for design of a fully differential second order current mode continuous-time sigma-delta modulator is presented. For circuit implementation, square root domain (SRD) translinear loop based on floating-gate MOS transistors that operate in saturation region is employed. The modulator features, low supply voltage, low power consumption (8mW) and high dynamic range (55dB). Simulation results confirm that this design is suitable for data converters.

Keywords: Sigma-delta, current-mode, translinear loop, geometric mean, squarer/divider.

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3392 Bridgeless Boost Power Factor Correction Rectifier with Hold-Up Time Extension Circuit

Authors: Chih-Chiang Hua, Yi-Hsiung Fang, Yuan-Jhen Siao

Abstract:

A bridgeless boost (BLB) power factor correction (PFC) rectifier with hold-up time extension circuit is proposed in this paper. A full bridge rectifier is widely used in the front end of the ac/dc converter. Since the shortcomings of the full bridge rectifier, the bridgeless rectifier is developed. A BLB rectifier topology is utilized with the hold-up time extension circuit. Unlike the traditional hold-up time extension circuit, the proposed extension scheme uses fewer active switches to achieve a longer hold-up time. Simulation results are presented to verify the converter performance.

Keywords: Bridgeless boost, boost converter, power factor correction, hold-up time.

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3391 Replacing MOSFETs with Single Electron Transistors (SET) to Reduce Power Consumption of an Inverter Circuit

Authors: Ahmed Shariful Alam, Abu Hena M. Mustafa Kamal, M. Abdul Rahman, M. Nasmus Sakib Khan Shabbir, Atiqul Islam

Abstract:

According to the rules of quantum mechanics there is a non-vanishing probability of for an electron to tunnel through a thin insulating barrier or a thin capacitor which is not possible according to the laws of classical physics. Tunneling of electron through a thin insulating barrier or tunnel junction is a random event and the magnitude of current flowing due to the tunneling of electron is very low. As the current flowing through a Single Electron Transistor (SET) is the result of electron tunneling through tunnel junctions of its source and drain the supply voltage requirement is also very low. As a result, the power consumption across a Single Electron Transistor is ultra-low in comparison to that of a MOSFET. In this paper simulations have been done with PSPICE for an inverter built with both SETs and MOSFETs. 35mV supply voltage was used for a SET built inverter circuit and the supply voltage used for a CMOS inverter was 3.5V.

Keywords: ITRS, enhancement type MOSFET, island, DC analysis, transient analysis, power consumption, background charge co-tunneling.

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3390 A Processor with Dynamically Reconfigurable Circuit for Floating-Point Arithmetic

Authors: Yukinari Minagi , Akinori Kanasugi

Abstract:

This paper describes about dynamic reconfiguration to miniaturize arithmetic circuits in general-purpose processor. Dynamic reconfiguration is a technique to realize required functions by changing hardware construction during operation. The proposed arithmetic circuit performs floating-point arithmetic which is frequently used in science and technology. The data format is floating-point based on IEEE754. The proposed circuit is designed using VHDL, and verified the correct operation by simulations and experiments.

Keywords: dynamic reconfiguration, floating-point arithmetic, double precision, FPGA

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3389 Practical Simulation Model of Floating-Gate MOS Transistor in Sub 100nm Technologies

Authors: Zina Saheb, Ezz El-Masry

Abstract:

As the Silicon oxide scaled down in MOSFET technology to few nanometers, gate Direct Tunneling (DT) in Floating gate (FGMOSFET) devices has become a major concern for analog designers. FGMOSFET has been used in many low-voltage and low-power applications, however, there is no accurate model that account for DT gate leakage in nano-scale. This paper studied and analyzed different simulation models for FGMOSFET using TSMC 90-nm technology. The simulation results for FGMOSFET cascade current mirror shows the impact of DT on circuit performance in terms of current and voltage without the need for fabrication. This works shows the significance of using an accurate model for FGMOSFET in nan-scale technologies.

Keywords: CMOS transistor, direct-tunneling current, floatinggate, gate-leakage current, simulation model.

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3388 Design and Construction of an Impulse Current Generator for Lightning Strike Experiments

Authors: Kamran Yousefpour, Mojtaba Rostaghi-Chalaki, Jason Warden, David Wallace, Chanyeop Park

Abstract:

There has been a rising trend in using impulse current generators to investigate the lightning strike protection of materials including aluminum and composites in structures such as wind turbine blade and aircraft body. The focus of this research is to present an impulse current generator built in the High Voltage Lab at Mississippi State University. The generator is capable of producing component A and D of the natural lightning discharges in accordance with the Society of Automotive Engineers (SAE) standard, which is widely used in the aerospace industry. The generator can supply lightning impulse energy up to 400 kJ with the capability of producing impulse currents with magnitudes greater than 200 kA. The electrical circuit and physical components of an improved impulse current generator are described and several lightning strike waveforms with different amplitudes is presented for comparing with the standard waveform. The results of this study contribute to the fundamental understanding the functionality of the impulse current generators and present an impulse current generator developed at the High Voltage Lab of Mississippi State University.

Keywords: impulse current generator, lightning, society of automotive engineers, capacitor

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3387 Fuzzy Modeling for Micro EDM Parameters Optimization in Drilling of Biomedical Implants Ti-6Al-4V Alloy for Higher Machining Performance

Authors: Ahmed A.D. Sarhan, Lim Siew Fen, Mum Wai Yip, M. Sayuti

Abstract:

Ti6Al4V alloy is highly used in the automotive and aerospace industry due to its good machining characteristics. Micro EDM drilling is commonly used to drill micro hole on extremely hard material with very high depth to diameter ratio. In this study, the parameters of micro-electrical discharge machining (EDM) in drilling of Ti6Al4V alloy is optimized for higher machining accuracy with less hole-dilation and hole taper ratio. The micro-EDM machining parameters includes, peak current and pulse on time. Fuzzy analysis was developed to evaluate the machining accuracy. The analysis shows that hole-dilation and hole-taper ratio are increased with the increasing of peak current and pulse on time. However, the surface quality deteriorates as the peak current and pulse on time increase. The combination that gives the optimum result for hole dilation is medium peak current and short pulse on time. Meanwhile, the optimum result for hole taper ratio is low peak current and short pulse on time.

Keywords: Micro EDM, Ti-6Al-4V alloy, fuzzy logic based analysis, optimization, machining accuracy.

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3386 Design and Simulation of Low Noise Amplifier Circuit for 5 GHz to 6 GHz

Authors: Hossein Sahoolizadeh, Alishir Moradi Kordalivand, Zargham Heidari

Abstract:

In first stage of each microwave receiver there is Low Noise Amplifier (LNA) circuit, and this stage has important rule in quality factor of the receiver. The design of a LNA in Radio Frequency (RF) circuit requires the trade-off many importance characteristics such as gain, Noise Figure (NF), stability, power consumption and complexity. This situation Forces desingners to make choices in the desing of RF circuits. In this paper the aim is to design and simulate a single stage LNA circuit with high gain and low noise using MESFET for frequency range of 5 GHz to 6 GHz. The desing simulation process is down using Advance Design System (ADS). A single stage LNA has successfully designed with 15.83 dB forward gain and 1.26 dB noise figure in frequency of 5.3 GHz. Also the designed LNA should be working stably In a frequency range of 5 GHz to 6 GHz.

Keywords: Advance Design System, Low Noise Amplifier, Radio Frequency, Noise Figure.

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3385 Power Factor Correction Based on High Switching Frequency Resonant Power Converter

Authors: B. Sathyanandhi, P. M. Balasubramaniam

Abstract:

This paper presents Buck-Boost converter topology to maintain the input power factor by using the power factor stage control and regulation stage control. Suppose, if we are using the RL load the power factor will be reduced due to the presence of total harmonic distortion in the current wave. To improve the power factor the current waveform should follow the fundamental component of the voltage waveform. These can be achieved by using the high -frequency power converter. Based on the resonant circuit the converter is able to perform the function of Buck, Boost, and buck-boost converter. Here ,we have used Buck-Boost converter, because, the buck-boost converter has more advantages than the boost converter. Here the switching action of the power converter can  take place by using the external zero comparator PFC stage control. The power converter consisting of the resonant  circuit which is used to control the output voltage gain of the converter. The power converter is operated at a very high switching frequency in the range of 400KHz in order to overcome the switching losses of the power converter. Due to  presence of high switching frequency, the power factor will improve. Therefore, the total harmonics distortion present in the current waveform has also reduced. These results has generated in the form of simulation by using MATLAB/SIMULINK software.  Similar to the Buck and Boost converters, the operation of the Buck-Boost has best understood, in terms of the inductor's "reluctance" for allowing rapid change in current, which also reduces the Total Harmonic Distortion (THD) in the input current waveform, which can improve the input Power factor, based on the type of load used.

Keywords: Buck-boost converter, High switching frequency, Power factor correction, power factor correction stage Regulation stage, Total harmonic distortion (THD).

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3384 A Single-chip Proportional to Absolute Temperature Sensor Using CMOS Technology

Authors: AL.AL, M. B. I. Reaz, S. M. A. Motakabber, Mohd Alauddin Mohd Ali

Abstract:

Nowadays it is a trend for electronic circuit designers to integrate all system components on a single-chip. This paper proposed the design of a single-chip proportional to absolute temperature (PTAT) sensor including a voltage reference circuit using CEDEC 0.18m CMOS Technology. It is a challenge to design asingle-chip wide range linear response temperature sensor for many applications. The channel widths between the compensation transistor and the reference transistor are critical to design the PTAT temperature sensor circuit. The designed temperature sensor shows excellent linearity between -100°C to 200° and the sensitivity is about 0.05mV/°C. The chip is designed to operate with a single voltage source of 1.6V.

Keywords: PTAT, single-chip circuit, linear temperature sensor, CMOS technology.

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3383 Analysis and Circuit Modeling of APDs

Authors: A. Ahadpour Shal, A. Ghadimi, A. Azadbar

Abstract:

In this paper a new method for increasing the speed of SAGCM-APD is proposed. Utilizing carrier rate equations in different regions of the structure, a circuit model for the structure is obtained. In this research, in addition to frequency response, the effect of added new charge layer on some transient parameters like slew-rate, rising and falling times have been considered. Finally, by trading-off among some physical parameters such as different layers widths and droppings, a noticeable decrease in breakdown voltage has been achieved. The results of simulation, illustrate some features of proposed structure improvement in comparison with conventional SAGCM-APD structures.

Keywords: Optical communication systems (OCS), Circuit modeling, breakdown voltage, SAGCM APD

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3382 Current-Mode Resistorless SIMO Universal Filter and Four-Phase Quadrature Oscillator

Authors: Jie Jin

Abstract:

In this paper, a new CMOS current-mode single input and multi-outputs (SIMO) universal filter and quadrature oscillator with a similar circuit are proposed. The circuits only consist of three Current differencing transconductance amplifiers (CDTA) and two grounded capacitors, which are resistorless, and they are suitable for monolithic integration. The universal filter uses minimum CDTAs and passive elements to realize SIMO type low-pass (LP), high-pass (HP), band-pass (BP) band-stop (BS) and all-pass (AP) filter functions simultaneously without any component matching conditions. The angular frequency (ω0) and the quality factor (Q) of the proposed filter can be electronically controlled and tuned orthogonal. By some modifications of the filter, a new current-mode four-phase quadrature oscillator (QO) can be obtained easily. The condition of oscillation (CO) and frequency of oscillation (FO) of the QO can be controlled electronically and independently through the bias current of the CDTAs, and it is suitable for variable frequency oscillator. Moreover, all the passive and active sensitivities of the circuits are low. SPICE simulation results are included to confirm the theory.

Keywords: Universal Filter, Quadrature Oscillator, Current mode, Current differencing transconductance amplifiers.

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3381 A Sub-mW Low Noise Amplifier for Wireless Sensor Networks

Authors: Gianluca Cornetta, David J. Santos, Balwant Godara

Abstract:

A 1.2 V, 0.61 mA bias current, low noise amplifier (LNA) suitable for low-power applications in the 2.4 GHz band is presented. Circuit has been implemented, laid out and simulated using a UMC 130 nm RF-CMOS process. The amplifier provides a 13.3 dB power gain a noise figure NF< 2.28 dB and a 1-dB compression point of -15.69 dBm, while dissipating 0.74 mW. Such performance make this design suitable for wireless sensor networks applications such as ZigBee.

Keywords: Current Reuse, IEEE 802.15.4 (ZigBee), Low NoiseAmplifiers, Wireless Sensor Networks.

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3380 The Application of Homotopy Method In Solving Electrical Circuit Design Problem

Authors: Talib Hashim Hasan

Abstract:

This paper describes simple implementation of homotopy (also called continuation) algorithm for determining the proper resistance of the resistor to dissipate energy at a specified rate of an electric circuit. Homotopy algorithm can be considered as a developing of the classical methods in numerical computing such as Newton-Raphson and fixed point methods. In homoptopy methods, an embedding parameter is used to control the convergence. The method purposed in this work utilizes a special homotopy called Newton homotopy. Numerical example solved in MATLAB is given to show the effectiveness of the purposed method

Keywords: electrical circuit homotopy, methods, MATLAB, Newton homotopy

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3379 Improvement of Short Channel Effects in Cylindrical Strained Silicon Nanowire Transistor

Authors: Fatemeh Karimi, Morteza Fathipour, Hamdam Ghanatian, Vala Fathipour

Abstract:

In this paper we investigate the electrical characteristics of a new structure of gate all around strained silicon nanowire field effect transistors (FETs) with dual dielectrics by changing the radius (RSiGe) of silicon-germanium (SiGe) wire and gate dielectric. Indeed the effect of high-κ dielectric on Field Induced Barrier Lowering (FIBL) has been studied. Due to the higher electron mobility in tensile strained silicon, the n-type FETs with strained silicon channel have better drain current compare with the pure Si one. In this structure gate dielectric divided in two parts, we have used high-κ dielectric near the source and low-κ dielectric near the drain to reduce the short channel effects. By this structure short channel effects such as FIBL will be reduced indeed by increasing the RSiGe, ID-VD characteristics will be improved. The leakage current and transfer characteristics, the threshold-voltage (Vt), the drain induced barrier height lowering (DIBL), are estimated with respect to, gate bias (VG), RSiGe and different gate dielectrics. For short channel effects, such as DIBL, gate all around strained silicon nanowire FET have similar characteristics with the pure Si one while dual dielectrics can improve short channel effects in this structure.

Keywords: SNWT (silicon nanowire transistor), Tensile Strain, high-κ dielectric, Field Induced Barrier Lowering (FIBL), cylindricalnano wire (CW), drain induced barrier lowering (DIBL).

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3378 High-Voltage Resonant Converter with Extreme Load Variation: Design Criteria and Applications

Authors: Jose A. Pomilio, Olavo Bet, Mateus P. Vieira

Abstract:

The power converter that feeds high-frequency, highvoltage transformers must be carefully designed due to parasitic components, mainly the secondary winding capacitance and the leakage inductance, that introduces resonances in relatively lowfrequency range, next to the switching frequency. This paper considers applications in which the load (resistive) has an unpredictable behavior, changing from open to short-circuit condition faster than the output voltage control loop could react. In this context, to avoid overvoltage and over current situations, that could damage the converter, the transformer or the load, it is necessary to find an operation point that assure the desired output voltage in spite of the load condition. This can done adjusting the frequency response of the transformer adding an external inductance, together with selecting the switching frequency to get stable output voltage independently of the load.

Keywords: High-voltage transformer, Resonant converter, Softcommutation.

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