WASET
	%0 Journal Article
	%A Chih-Chiang Hua and  Yi-Hsiung Fang and  Yuan-Jhen Siao
	%D 2016
	%J International Journal of Electronics and Communication Engineering
	%B World Academy of Science, Engineering and Technology
	%I Open Science Index 118, 2016
	%T Bridgeless Boost Power Factor Correction Rectifier with Hold-Up Time Extension Circuit
	%U https://publications.waset.org/pdf/10005687
	%V 118
	%X A bridgeless boost (BLB) power factor correction (PFC) rectifier with hold-up time extension circuit is proposed in this paper. A full bridge rectifier is widely used in the front end of the ac/dc converter. Since the shortcomings of the full bridge rectifier, the bridgeless rectifier is developed. A BLB rectifier topology is utilized with the hold-up time extension circuit. Unlike the traditional hold-up time extension circuit, the proposed extension scheme uses fewer active switches to achieve a longer hold-up time. Simulation results are presented to verify the converter performance.
	%P 1357 - 1360