WASET
    C. Kalamani and  V. Abishek Karthick and  S. Anitha and  K. Kavin Kumar,  Design and Implementation of 4 Bit Multiplier Using Fault Tolerant Hybrid Full Adder.   journal   = {International Journal of Electronics and Communication Engineering}, [online]. World Academy of Science, Engineering and Technology.
    November 2017, vol. 125(5). 618 - 625
    [viewed 19 April 2024]. Available from: https://publications.waset.org/pdf/10008299.