Search results for: Capacitance to Voltage converter Circuit

Authors: Kimberly Jane S. Uy, Patricia Angela Reyes-Abu, Wen Yaw Chung

Abstract:

A high precision temperature insensitive current and voltage reference generator is presented. It is specifically developed for temperature compensated oscillator. The circuit, designed using MXIC 0.5um CMOS technology, has an operating voltage that ranges from 2.6V to 5V and generates a voltage of 1.21V and a current of 6.38 ӴA. It exhibits a variation of ±0.3nA for the current reference and a stable output for voltage reference as the temperature is varied from 0°C to 70°C. The power supply rejection ratio obtained without any filtering capacitor at 100Hz and 10MHz is -30dB and -12dB respectively.

Keywords: Current reference, voltage reference, threshold voltage, temperature compensation, mobility.

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Authors: B. Nasri, M. Bensaada

Abstract:

We present a simulation and realization of a battery charge regulator (BCR) in microsatellite earth observation. The tests were performed on battery pack 12volt, capacity 24Ah and the solar array open circuit voltage of 100 volt and optimum power of about 250 watt. The battery charge is made by solar module. The principle is to adapt the output voltage of the solar module to the battery by using the technique of pulse width modulation (PWM). Among the different techniques of charge battery, we opted for the technique of the controller ON/OFF is a standard technique and simple, it-s easy to be board executed validation will be made by simulation "Proteus Isis Professional software ". The circuit and the program of this prototype are based on the PIC16F877 microcontroller, a serial interface connecting a PC is also realized, to view and save data and graphics in real time, for visualization of data and graphs we develop an interface tool “visual basic.net (VB)--.

Keywords: Battery Charge Regulator, Batteries, Buck converter, Power System, Power Conditioning, Power Distribution, Solar arrays.

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Authors: Ambuj Kumar, Sunil Kumar Singh, Shrikant Singh

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Sweep frequency response analysis has been turning out a powerful tool for investigation of mechanical as well as electrical integration of transformers. In this paper various aspect of practical application of SFRA has been studied. Open circuit and short circuit measurement were done on different phases of high voltage and low voltage winding. A case study was presented for the transformer of rating 31.5 MVA for various frequency ranges. A clear picture was presented for sub- frequency ranges for HV as well as LV winding. The main motive of work is to investigate high voltage short circuit response. The theoretical concept about SFRA responses is validated with expert system software results.

Keywords: Frequency deviation, OCT & SCT, SFRA, Transformer winding.

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Authors: Chih Chin Yang, Yen Chun Lin, Hsiao Hsuan Cheng

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Three similar negative differential resistance (NDR) profiles with both high peak to valley current density ratio (PVCDR) value and high peak current density (PCD) value in unity resonant tunneling electronic circuit (RTEC) element is developed in this paper. The PCD values and valley current density (VCD) values of the three NDR curves are all about 3.5 A and 0.8 A, respectively. All PV values of NDR curves are 0.40 V, 0.82 V, and 1.35 V, respectively. The VV values are 0.61 V, 1.07 V, and 1.69 V, respectively. All PVCDR values reach about 4.4 in three NDR curves. The PCD value of 3.5 A in triple PVCDR RTEC element is better than other resonant tunneling devices (RTD) elements. The high PVCDR value is concluded the lower VCD value about 0.8 A. The low VCD value is achieved by suitable selection of resistors in triple PVCDR RTEC element. The low PV value less than 1.35 V possesses low power dispersion in triple PVCDR RTEC element. The designed multiple value logical level (MVLL) system using triple PVCDR RTEC element provides equidistant logical level. The logical levels of MVLL system are about 0.2 V, 0.8 V, 1.5 V, and 2.2 V from low voltage to high voltage and then 2.2 V, 1.3 V, 0.8 V, and 0.2 V from high voltage back to low voltage in half cycle of sinusoid wave. The output level of four levels MVLL system is represented in 0.3 V, 1.1 V, 1.7 V, and 2.6 V, which satisfies the NMP condition of traditional two-bit system. The remarkable logical characteristic of improved MVLL system with paralleled capacitor are with four significant stable logical levels about 220 mV, 223 mV, 228 mV, and 230 mV. The stability and articulation of logical levels of improved MVLL system are outstanding. The average holding time of improved MVLL system is approximately 0.14 μs. The holding time of improved MVLL system is fourfold than of basic MVLL system. The function of additional capacitor in the improved MVLL system is successfully discovered.

Keywords: Capacitance, Logical level, Constant current source

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Authors: Sajid Iqbal, Masood Ahmed, Suhail Aftab Qureshi

Abstract:

DC-DC converters are widely used in regulated switched mode power supplies and in DC motor drive applications. There are several sources of unwanted nonlinearity in practical power converters. In addition, their operation is characterized by switching that gives birth to a variety of nonlinear dynamics. DC-DC buck and boost converters controlled by pulse-width modulation (PWM) have been simulated. The voltage waveforms and attractors obtained from the circuit simulation have been studied. With the onset of instability, the phenomenon of subharmonic oscillations, quasi-periodicity, bifurcations, and chaos have been observed. This paper is mainly motivated by potential contributions of chaos theory in the design, analysis and control of power converters, in particular and power electronics circuits, in general.

Keywords: Buck converter, boost converter, period- doubling, chaos, bifurcation, strange attractor.

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Authors: P. Prasad Rao, K. Lal Kishore

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Pipeline ADCs are becoming popular at high speeds and with high resolution. This paper discusses the options of number of bits/stage conversion techniques in pipelined ADCs and their effect on Area, Speed, Power Dissipation and Linearity. The basic building blocks like op-amp, Sample and Hold Circuit, sub converter, DAC, Residue Amplifier used in every stage is assumed to be identical. The sub converters use flash architectures. The design is implemented using 0.18

Keywords: 1.5 bits/stage, Conversion Frequency, Redundancy Switched Capacitor Sample and Hold Circuit

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Authors: A. Ahadpour Shal, A. Ghadimi, A. Azadbar

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In this paper a new method for increasing the speed of SAGCM-APD is proposed. Utilizing carrier rate equations in different regions of the structure, a circuit model for the structure is obtained. In this research, in addition to frequency response, the effect of added new charge layer on some transient parameters like slew-rate, rising and falling times have been considered. Finally, by trading-off among some physical parameters such as different layers widths and droppings, a noticeable decrease in breakdown voltage has been achieved. The results of simulation, illustrate some features of proposed structure improvement in comparison with conventional SAGCM-APD structures.

Keywords: Optical communication systems (OCS), Circuit modeling, breakdown voltage, SAGCM APD

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Authors: A. Inba Rexy, R. Seyezhai

Abstract:

Through the fast growing technologies, design of power factor correction (PFC) circuit is facing several challenges. In this paper, a two-phase interleaved boost converter with ripple steering technique is proposed. Among the various topologies, Interleaved Boost converter (IBC) is considered as superior due to enriched performance, lower ripple content, compact weight and size. A thorough investigation is presented here for the proposed topology. Simulation study for the IBC has been carried out using MATLAB/SIMULINK. Theoretical analysis and hardware prototype has been performed to validate the results.

Keywords: Interleaved Boost Converter (IBC), Power Factor Correction (PFC), Ripple Steering Technique, Ripple, and Simulation.

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Authors: Suresh Alapati, Sreehari Rao Patri, K. S. R. Krishna Prasad

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Anultra-low power capacitor less low-dropout voltage regulator with improved transient response using gain enhanced feed forward path compensation is presented in this paper. It is based on a cascade of a voltage amplifier and a transconductor stage in the feed forward path with regular error amplifier to form a composite gainenhanced feed forward stage. It broadens the gain bandwidth and thus improves the transient response without substantial increase in power consumption. The proposed LDO, designed for a maximum output current of 100 mA in UMC 180 nm, requires a quiescent current of 69 )A. An undershot of 153.79mV for a load current changes from 0mA to 100mA and an overshoot of 196.24mV for current change of 100mA to 0mA. The settling time is approximately 1.1 )s for the output voltage undershooting case. The load regulation is of 2.77 )V/mA at load current of 100mA. Reference voltage is generated by using an accurate band gap reference circuit of 0.8V.The costly features of SOC such as total chip area and power consumption is drastically reduced by the use of only a total compensation capacitance of 6pF while consuming power consumption of 0.096 mW.

Keywords: Capacitor-less LDO, frequency compensation, Transient response, latch, self-biased differential amplifier.

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Authors: Marinka K. Baghdasaryan, Siranush M. Muradyan, Avgen A. Gasparyan

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Analytical expressions of the current and angular errors, as well as the frequency characteristics of an induction converter describing the relation with its structural parameters, the core and winding characteristics are obtained. Based on estimation of the dependences obtained, a mathematical problem of parametric optimization is formulated which can successfully be used for investigating and diagnosing an induction converter.

Keywords: Induction converters, magnetic circuit material, current and angular errors, frequency response, mathematical formulation, structural parameters.

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Authors: Azza M. Anis, M. M. Abutaleb, Hani F. Ragai, M. I. Eladawy

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This paper presents the characterization and design of a capacitive pressure sensor with LC-based 0.35 µm CMOS readout circuit. SPICE is employed to evaluate the characteristics of the readout circuit and COMSOL multiphysics structural analysis is used to simulate the behavior of the pressure sensor. The readout circuit converts the capacitance variation of the pressure sensor into the frequency output. Simulation results show that the proposed pressure sensor has output frequency from 2.50 to 2.28 GHz in a pressure range from 0.1 to 2 MPa almost linearly. The sensitivity of the frequency shift with respect to the applied pressure load is 0.11 GHz/MPa.

Keywords: CMOS LC-based oscillator, micro pressure sensor, silicon carbide

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Authors: Rohana Musa, Yuzman Yusoff, Chia Chieu Yin, Hanif Che Lah

Abstract:

This paper presents the design and characterization of a low power Complementary Metal Oxide Semiconductor (CMOS) process sensor. The design is targeted for implementation using Silterra’s 180 nm CMOS process technology. The proposed process sensor employs a voltage threshold (V_th) extractor architecture for detection of variations in the fabrication process. The process sensor generates output voltages in the range of 401 mV (fast-fast corner) to 443 mV (slow-slow corner) at nominal condition. The power dissipation for this process sensor is 6.3 µW with a supply voltage of 1.8V with a silicon area of 190 µm X 60 µm. The preliminary result of this process sensor that was fabricated indicates a close resemblance between test and simulated results.

Keywords: CMOS Process sensor, Process, Voltage and Temperature (PVT) sensor, threshold extractor circuit, Vth extractor circuit.

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Authors: Pedro Luis Ferrer Penalver, Edmundo da Silva Braga

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In this paper, the performance of a simple surge protection for a direct current circuit was simulated. The protection circuit was developed from modified electric macro models of a gas discharge tube and a transient voltage suppressor diode. Moreover, a combination wave generator circuit was used as source of energy surges. The simulations showed that the circuit presented ensures immunity corresponding with test level IV of the IEC 61000-4-5:2014 international standard. The developed circuit can be modified to meet the requirements of any other equipment to be protected. Similarly, the parameters of the combination wave generator can be changed to provide different surge amplitudes.

Keywords: Combination wave generator, IEC 61000-4-5, Pspice simulation, surge protection.

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Authors: AL.AL, M. B. I. Reaz, S. M. A. Motakabber, Mohd Alauddin Mohd Ali

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Nowadays it is a trend for electronic circuit designers to integrate all system components on a single-chip. This paper proposed the design of a single-chip proportional to absolute temperature (PTAT) sensor including a voltage reference circuit using CEDEC 0.18m CMOS Technology. It is a challenge to design asingle-chip wide range linear response temperature sensor for many applications. The channel widths between the compensation transistor and the reference transistor are critical to design the PTAT temperature sensor circuit. The designed temperature sensor shows excellent linearity between -100°C to 200° and the sensitivity is about 0.05mV/°C. The chip is designed to operate with a single voltage source of 1.6V.

Keywords: PTAT, single-chip circuit, linear temperature sensor, CMOS technology.

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Authors: M. M. Karkhanehchi, A. Ammani

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A simple analytical model has been developed to optimize biasing conditions for obtaining maximum linearity among lattice-matched, pseudomorphic and metamorphic HEMT types as well as enhancement and depletion HEMT modes. A nonlinear current-voltage model has been simulated based on extracted data to study and select the most appropriate type and mode of HEMT in terms of a given gate-source biasing voltage within the device so as to employ the circuit for the highest possible output current or voltage linear swing. Simulation results can be used as a basis for the selection of optimum gate-source biasing voltage for a given type and mode of HEMT with regard to a circuit design. The consequences can also be a criterion for choosing the optimum type or mode of HEMT for a predetermined biasing condition.

Keywords: Biasing, characteristic, linearity, simulation.

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Authors: Jaimala Gambhir, Tilak Thakur, Puneet Chawla

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As per the statistical data, the Doubly-fed Induction Generator (DFIG) based wind turbine with variable speed and variable pitch control is the most common wind turbine in the growing wind market. This machine is usually used on the grid connected wind energy conversion system to satisfy grid code requirements such as grid stability, Fault Ride Through (FRT), power quality improvement, grid synchronization and power control etc. Though the requirements are not fulfilled directly by the machine, the control strategy is used in both the stator as well as rotor side along with power electronic converters to fulfil the requirements stated above. To satisfy the grid code requirements of wind turbine, usually grid side converter is playing a major role. So in order to improve the operation capacity of wind turbine under critical situation, the intensive study of both machine side converter control and grid side converter control is necessary In this paper DFIG is modeled using power components as variables and the performance of the DFIG system is analysed under grid voltage fluctuations. The voltage fluctuations are made by lowering and raising the voltage values in the utility grid intentionally for the purpose of simulation keeping in view of different grid disturbances.

Keywords: DFIG, dynamic modeling, DPC, sag, swell, voltage fluctuations, FRT.

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Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn

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This paper discusses the undesirable charge transfer by the parasitic capacitances of the input transistors in a voltage sense amplifier. Due to its intrinsic rail-to-rail voltage transition, the input sides are inevitably disturbed. It can possible disturb the stabilities of the reference voltage levels. Moreover, it becomes serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the systems. In order to alleviate the internal node voltage transition, the internal node stabilization technique is proposed by utilizing an additional biasing circuit. It achieves 47% and 43% improvements for node stabilization and input referred disturbance, respectively.

Keywords: Voltage sense amplifier, voltage transition, node stabilization, and biasing circuits.

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Authors: Shipra Upadhyay , R. K. Nagaria, R. A. Mishra

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In this paper, we present the design and experimental evaluation of complementary energy path adiabatic logic (CEPAL) based 1 bit full adder circuit. A simulative investigation on the proposed full adder has been done using VIRTUOSO SPECTRE simulator of cadence in 0.18μm UMC technology and its performance has been compared with the conventional CMOS full adder circuit. The CEPAL based full adder circuit exhibits the energy saving of 70% to the conventional CMOS full adder circuit, at 100 MHz frequency and 1.8V operating voltage.

Keywords: Adiabatic, CEPAL, full adder, power clock

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Authors: Priyanka Chaudhary, M. Rizwan

Abstract:

This paper presents a grid synchronization technique based on adaptive notch filter for SPV (Solar Photovoltaic) system along with MPPT (Maximum Power Point Tracking) techniques. An efficient grid synchronization technique offers proficient detection of various components of grid signal like phase and frequency. It also acts as a barrier for harmonics and other disturbances in grid signal. A reference phase signal synchronized with the grid voltage is provided by the grid synchronization technique to standardize the system with grid codes and power quality standards. Hence, grid synchronization unit plays important role for grid connected SPV systems. As the output of the PV array is fluctuating in nature with the meteorological parameters like irradiance, temperature, wind etc. In order to maintain a constant DC voltage at VSC (Voltage Source Converter) input, MPPT control is required to track the maximum power point from PV array. In this work, a variable step size P & O (Perturb and Observe) MPPT technique with DC/DC boost converter has been used at first stage of the system. This algorithm divides the dPpv/dVpv curve of PV panel into three separate zones i.e. zone 0, zone 1 and zone 2. A fine value of tracking step size is used in zone 0 while zone 1 and zone 2 requires a large value of step size in order to obtain a high tracking speed. Further, adaptive notch filter based control technique is proposed for VSC in PV generation system. Adaptive notch filter (ANF) approach is used to synchronize the interfaced PV system with grid to maintain the amplitude, phase and frequency parameters as well as power quality improvement. This technique offers the compensation of harmonics current and reactive power with both linear and nonlinear loads. To maintain constant DC link voltage a PI controller is also implemented and presented in this paper. The complete system has been designed, developed and simulated using SimPower System and Simulink toolbox of MATLAB. The performance analysis of three phase grid connected solar photovoltaic system has been carried out on the basis of various parameters like PV output power, PV voltage, PV current, DC link voltage, PCC (Point of Common Coupling) voltage, grid voltage, grid current, voltage source converter current, power supplied by the voltage source converter etc. The results obtained from the proposed system are found satisfactory.

Keywords: Solar photovoltaic systems, MPPT, voltage source converter, grid synchronization technique.

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Authors: Guiheng Zhang, Wei Zhang, Jun Fu, Yudong Wang

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A 900 MHz three-stage SiGe power amplifier (PA) with high power gain is presented in this paper. Volterra Series is applied to analyze nonlinearity sources of SiGe HBT device model clearly. Meanwhile, the influence of operating current to IMD3 is discussed. Then a β-helper current mirror bias circuit is applied to improve linearity, since the β-helper current mirror bias circuit can offer stable base biasing voltage. Meanwhile, it can also work as predistortion circuit when biasing voltages of three bias circuits are fine-tuned, by this way, the power gain and operating current of PA are optimized for best linearity. The three power stages which fabricated by 0.18 μm SiGe technology are bonded to the printed circuit board (PCB) to obtain impedances by Load-Pull system, then matching networks are done for best linearity with discrete passive components on PCB. The final measured three-stage PA exhibits 21.1 dBm of output power at 1 dB compression point (OP1dB) with power added efficiency (PAE) of 20.6% and 33 dB power gain under 3.3 V power supply voltage.

Keywords: High gain power amplifier, linearization bias circuit, SiGe HBT model, Volterra Series.

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Authors: Rishikesh Pandey, Maneesha Gupta

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A new low-voltage floating gate MOSFET (FGMOS) based squarer using square law characteristic of the FGMOS is proposed in this paper. The major advantages of the squarer are simplicity, rail-to-rail input dynamic range, low total harmonic distortion, and low power consumption. The proposed circuit is biased without body effect. The circuit is designed and simulated using SPICE in 0.25μm CMOS technology. The squarer is operated at the supply voltages of ±0.75V . The total harmonic distortion (THD) for the input signal 0.75Vpp at 25 KHz, and maximum power consumption were found to be less than 1% and 319μW respectively.

Keywords: Analog signal processing, floating gate MOSFETs, low-voltage, Spice, squarer.

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Authors: Raja Singh Khela, R. K. Bansal, K. S. Sandhu, A. K. Goel

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Self-Excited Induction Generator (SEIG) builds up voltage while it enters in its magnetic saturation region. Due to non-linear magnetic characteristics, the performance analysis of SEIG involves cumbersome mathematical computations. The dependence of air-gap voltage on saturated magnetizing reactance can only be established at rated frequency by conducting a laboratory test commonly known as synchronous run test. But, there is no laboratory method to determine saturated magnetizing reactance and air-gap voltage of SEIG at varying speed, terminal capacitance and other loading conditions. For overall analysis of SEIG, prior information of magnetizing reactance, generated frequency and air-gap voltage is essentially required. Thus, analytical methods are the only alternative to determine these variables. Non-existence of direct mathematical relationship of these variables for different terminal conditions has forced the researchers to evolve new computational techniques. Artificial Neural Networks (ANNs) are very useful for solution of such complex problems, as they do not require any a priori information about the system. In this paper, an attempt is made to use cascaded neural networks to first determine the generated frequency and magnetizing reactance with varying terminal conditions and then air-gap voltage of SEIG. The results obtained from the ANN model are used to evaluate the overall performance of SEIG and are found to be in good agreement with experimental results. Hence, it is concluded that analysis of SEIG can be carried out effectively using ANNs.

Keywords: Self-Excited Induction Generator, Artificial NeuralNetworks, Exciting Capacitance and Saturated magnetizingreactance.

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Authors: Mamidi Ramakrishna Rao

Abstract:

Doubly-fed induction generator (DFIG) is currently the choice for many wind turbines. These generators, when connected to the grid through a converter, is subjected to varied power system conditions like voltage variation, frequency variation, short circuit fault conditions, etc. Further, many countries like Canada, Germany, UK, Scotland, etc. have distinct grid codes relating to wind turbines. Accordingly, following the network faults, wind turbines have to supply a definite reactive current. To satisfy the requirements including reactive current capability, an optimum electrical design becomes a mandate for DFIG to function. This paper intends to optimize the equivalent circuit parameters of an electrical design for satisfactory DFIG performance. Direct search method has been used for optimization of the parameters. The variables selected include electromagnetic core dimensions (diameters and stack length), slot dimensions, radial air gap between stator and rotor and winding copper cross section area. Optimization for 2 MW DFIG has been executed separately for three objective functions - maximum reactive power capability (Case I), maximum efficiency (Case II) and minimum weight (Case III). In the optimization analysis program, voltage variations (10%), power factor- leading and lagging (0.95), speeds for corresponding to slips (-0.3 to +0.3) have been considered. The optimum designs obtained for objective functions were compared. It can be concluded that direct search method of optimization helps in determining an optimum electrical design for each objective function like efficiency or reactive power capability or weight minimization.

Keywords: Direct search, DFIG, equivalent circuit parameters, optimization.

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Authors: S. Chonsatidjamroen , K-N. Areerak, K-L. Areerak

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This paper presents the averaging model of a buck converter derived from the generalized state-space averaging method. The sliding mode control is used to regulate the output voltage of the converter and taken into account in the model. The proposed model requires the fast computational time compared with those of the full topology model. The intensive time-domain simulations via the exact topology model are used as the comparable model. The results show that a good agreement between the proposed model and the switching model is achieved in both transient and steady-state responses. The reported model is suitable for the optimal controller design by using the artificial intelligence techniques.

Keywords: Generalized state-space averaging method, buck converter, sliding mode control, modeling, simulation.

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Authors: S. Ganesh, J. Janani, G. Besliya Angel

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Photovoltaic (PV) energy is one of the most important renewable energy sources. Maximum Power Point Tracking (MPPT) techniques should be used in photovoltaic systems to maximize the PV panel output power by tracking continuously the maximum power point which depends on panel’s temperature and on irradiance conditions. Incremental conductance control method has been used as MPPT algorithm. The methodology is based on connecting a pulse width modulated dc/dc SEPIC converter, which is controlled by a microprocessor based unit. The SEPIC converter is one of the buck-boost converters which maintain the output voltage as constant irrespective of the solar isolation level. By adjusting the switching frequency of the converter the maximum power point has been achieved. The main difference between the method used in the proposed MPPT systems and other technique used in the past is that PV array output power is used to directly control the dc/dc converter thus reducing the complexity of the system. The resulting system has high efficiency, low cost and can be easily modified. The tracking capability has been verified experimentally with a 10 W solar panel under a controlled experimental setup. The SEPIC converter and their control strategies has been analyzed and simulated using Simulink/Matlab software.

Keywords: Maximum Power Point Tracking, Microprocessor, PV Module, SEPIC Converter.

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Authors: Mehdi Hosseinzadeh, Amir Sabbagh Molahosseini, Keivan Navi

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In this paper, a new reverse converter for the moduli set {2n, 2n–1, 2n–1–1} is presented. We improved a previously introduced conversion algorithm for deriving an efficient hardware design for reverse converter. Hardware architecture of the proposed converter is based on carry-save adders and regular binary adders, without the requirement for modular adders. The presented design is faster than the latest introduced reverse converter for moduli set {2n, 2n–1, 2n–1–1}. Also, it has better performance than the reverse converters for the recently introduced moduli set {2n+1–1, 2n, 2n–1}

Keywords: Residue arithmetic, Residue number system, Residue-to-Binary converter, Reverse converter

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Authors: Mawahib Gafare Abdalrahman Ahmed, Abdallah Belal Adam, John Ojur Dennis

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Air bubbles have been detected in human circulation of end-stage renal disease patients who are treated by hemodialysis. The consequence of air embolism, air bubbles, is under recognized and usually overlooked in daily practice. This paper shows results of a capacitor based detection method that capable of detecting the presence of air bubbles in the blood stream in different frequencies. The method is based on a parallel plates capacitor made of platinum with an area of 1.5 cm2 and a distance between the two plates is 1cm. The dielectric material used in this capacitor is Dextran70 solution which mimics blood rheology. Simulations were carried out using RC circuit at two frequencies 30Hz and 3 kHz and results compared with experiments and theory. It is observed that by injecting air bubbles of different diameters into the device, there were significant changes in the capacitance of the capacitor. Furthermore, it is observed that the output voltage from the circuit increased with increasing air bubble diameter. These results demonstrate the feasibility of this approach in improving air bubble detection in Hemodialysis.

Keywords: Air bubbles, Hemodialysis, Capacitor, Dextran70, Air bubbles diameters.

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Authors: Rafik Medjoudj, Rabah Medjoudj, D. Aissani

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The electrical substation components are often subject to degradation due to over-voltage or over-current, caused by a short circuit or a lightning. A particular interest is given to the circuit breaker, regarding the importance of its function and its dangerous failure. This component degrades gradually due to the use, and it is also subject to the shock process resulted from the stress of isolating the fault when a short circuit occurs in the system. In this paper, based on failure mechanisms developments, the wear out of the circuit breaker contacts is modeled. The aim of this work is to evaluate its reliability and consequently its residual lifetime. The shock process is based on two random variables such as: the arrival of shocks and their magnitudes. The arrival of shocks was modeled using homogeneous Poisson process (HPP). By simulation, the dates of short-circuit arrivals were generated accompanied with their magnitudes. The same principle of simulation is applied to the amount of cumulative wear out contacts. The objective reached is to find the formulation of the wear function depending on the number of solicitations of the circuit breaker.

Keywords: reliability, short-circuit, models of shocks.

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Authors: S. Boorboor, S. A. H. Feghhi, H. Jafari

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The ionizing radiations cause different kinds of damages in electronic components. MOSFETs, most common transistors in today’s digital and analog circuits, are severely sensitive to TID damage. In this work, the threshold voltage shift of CD4007 device, which is an integrated circuit including P-channel and N-channel MOS transistors, was investigated for low dose gamma irradiation under different gate bias voltages. We used linear extrapolation method to extract threshold voltage from I_D-V_G characteristic curve. The results showed that the threshold voltage shift was approximately 27.5 mV/Gy for N-channel and 3.5 mV/Gy for P-channel transistors at the gate bias of |9 V| after irradiation by Co-60 gamma ray source. Although the sensitivity of the devices under test were strongly dependent to biasing condition and transistor type, the threshold voltage shifted linearly versus accumulated dose in all cases. The overall results show that the application of CD4007 as an electronic buffer in a radiation therapy system is limited by TID damage. However, this integrated circuit can be used as a cheap and sensitive radiation dosimeter for accumulated dose measurement in radiation therapy systems.

Keywords: Threshold voltage shift, MOS transistor, linear extrapolation, gamma irradiation.

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Authors: Jin-Lung Guan, Jyh-Cherng Gu, Ming-Ta Yang, Hsin-Hung Chang, Chun-Wei Huang, Shao-Yu Huang

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One of the most important power quality issues is voltage flicker. Nowadays this issue also impacts the power system all over the world. The fact of the matter is that the more and the larger capacity of wind generator has been installed. Under unstable wind power situation, the variation of output current and voltage have caused trouble to voltage flicker. Hence, the major purpose of this study is to analyze the impact of wind generator on voltage flicker of power system. First of all, digital simulation and analysis are carried out based on wind generator operating under various system short circuit capacity, impedance angle, loading, and power factor of load. The simulation results have been confirmed by field measurements.

Keywords: Wind Generator, Voltage Flicker

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