Search results for: Negative bias voltage

Authors: X. L. Zhou, S. Tunmee, I. Toda, K. Komatsu, S. Ohshio, H. Saitoh

Abstract:

Hydrogenated amorphous carbon (a-C:H) films have been synthesized by a radio frequency plasma enhanced chemical vapor deposition (rf-PECVD) technique with different bias voltage from 0.0 to -0.5 kV. The Raman spectra displayed the polymer-like hydrogenated amorphous carbon (PLCH) film with 0.0 to -0.1 and a-C:H films with -0.2 to -0.5 kV of bias voltages. The surface chemical information of all films were studied by X-ray photoelectron spectroscopy (XPS) technique, presented to C-C (sp2 and sp3) and C-O bonds, and relative carbon (C) and oxygen (O) atomics contents. The O contamination had affected on structure and optical properties. The true density of PLCH and a-C:H films were characterized by X-ray refractivity (XRR) method, showed the result as in the range of 1.16-1.73 g/cm3 that depending on an increasing of bias voltage. The hardness was proportional to the true density of films. In addition, the optical properties i.e. refractive index (n) and extinction coefficient (k) of these films were determined by a spectroscopic ellipsometry (SE) method that give formation to in 1.62-2.10 (n) and 0.04-0.15 (k) respectively. These results indicated that the optical properties confirmed the Raman results as presenting the structure changed with applied bias voltage increased.

Keywords: Negative bias voltage, a-C:H film, Oxygen contamination, Optical properties.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 5411

Authors: C. Chanapromma, T. Worachak, P. Silapan

Abstract:

This paper presents positive and negative full-wave rectifier. The proposed structure is based on OTA using commercially available ICs (LT1228). The features of the proposed circuit are that: it can rectify and amplify voltage signal with controllable output magnitude via input bias current: the output voltage is free from temperature variation. The circuit description merely consists of 1 single ended and 3 fully differential OTAs. The performance of the proposed circuit are investigated though PSpice. They show that the proposed circuit can function as positive/negative full-wave rectifier, where the voltage input wide-dynamic range from -5V to 5V. Furthermore, the output voltage is slightly dependent on the temperature variations.

Keywords: Full-wave rectifier, Positive/negative, OTA, Electronically controllable, Wide-dynamic range

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1781

Authors: Ghazi Al Sukkar, Yazid Khattabi, Shifen Zhong

Abstract:

Most of the recent wireless LANs, broadband access networks, and digital broadcasting use Orthogonal Frequency Division Multiplexing techniques. In addition, the increasing demand of Data and Internet makes fiber optics an important technology, as fiber optics has many characteristics that make it the best solution for transferring huge frames of Data from a point to another. Radio over fiber is the place where high quality RF is converted to optical signals over single mode fiber. Optimum values for the bias level and the switching voltage for Mach-Zehnder modulator are important for the performance of radio over fiber links. In this paper, we propose a method to optimize the two parameters simultaneously; the bias and the switching voltage point of the external modulator of a radio over fiber system considering RF gain. Simulation results show the optimum gain value under these two parameters.

Keywords: OFDM, Mach Zehnder Bias Voltage, switching voltage, radio-over-fiber, RF gain.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1525

Authors: Mansour I. Abbadi, Abdel-Rahman M. Jaradat

Abstract:

In this paper, a technique is proposed to implement an artificial voltage-controlled capacitance or inductance which can replace the well-known varactor diode in many applications. The technique is based on injecting the current of a voltage-controlled current source onto a fixed capacitor or inductor. Then, by controlling the transconductance of the current source by an external bias voltage, a voltage-controlled capacitive or inductive reactance is obtained. The proposed voltage-controlled reactance devices can be designed to work anywhere in the frequency spectrum. Practical circuits for the proposed voltage-controlled reactances are suggested and simulated.

Keywords: voltage-controlled capacitance, voltage-controlled inductance, varactor diode, variable transconductance.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4779

Authors: Vincent King Soon Wong, Hong Seng Ng, Florinna Sim

Abstract:

Negative Bias Temperature Instability (NBTI) is one of the critical degradation mechanisms in semiconductor device reliability that causes shift in the threshold voltage (Vth). However, thorough understanding of this reliability failure mechanism is still unachievable due to a recovery characteristic known as NBTI recovery. This paper will demonstrate the severity of NBTI recovery as well as one of the effective methods used to mitigate, which is the minimization of measurement system delays. Comparison was done in between two measurement systems that have significant differences in measurement delays to show how NBTI recovery causes result deviations and how fast measurement systems can mitigate NBTI recovery. Another method to minimize NBTI recovery without the influence of measurement system known as Fast Wafer Level Reliability (FWLR) NBTI was also done to be used as reference.

Keywords: Fast vs slow BTI, Fast wafer level reliability, Negative bias temperature instability, NBTI measurement system, metal-oxide-semiconductor field-effect transistor, MOSFET, NBTI recovery, reliability.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1578

Authors: Wei Yi Lim, M. Annamalai Arasu, M. Kumarasamy Raja, Minkyu Je

Abstract:

In this paper, the design of wide-swing constant transconductance (g_m) bias circuit that generates bias voltage for low-noise amplifier (LNA) circuit design by using an off-chip resistor is demonstrated. The overall transconductance (G_m) generated by the constant g_m bias circuit is important to maintain the overall gain and noise figure of the LNA circuit. Therefore, investigation is performed to study the variation in G_m with process, temperature and supply voltage (PVT).  Temperature and supply voltage are swept from -10 °C to 85 °C and 1.425 V to 1.575 V respectively, while the process conditions are also varied to the extreme and the g_m variation is eventually concluded at between -3 % to 7 %. With the slight variation in the g_m value, through simulation, at worst condition of state SS, we are able to attain a conversion gain (S₂₁) variation of -3.10 % and a noise figure (NF) variation of 18.71 %. The whole constant g_m circuit draws approximately 100 µA from a 1.5V supply and is designed based on 0.13 µm CMOS process. 

Keywords: Transconductance, LNA, temperature, process.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4081

Authors: Guiheng Zhang, Wei Zhang, Jun Fu, Yudong Wang

Abstract:

A 900 MHz three-stage SiGe power amplifier (PA) with high power gain is presented in this paper. Volterra Series is applied to analyze nonlinearity sources of SiGe HBT device model clearly. Meanwhile, the influence of operating current to IMD3 is discussed. Then a β-helper current mirror bias circuit is applied to improve linearity, since the β-helper current mirror bias circuit can offer stable base biasing voltage. Meanwhile, it can also work as predistortion circuit when biasing voltages of three bias circuits are fine-tuned, by this way, the power gain and operating current of PA are optimized for best linearity. The three power stages which fabricated by 0.18 μm SiGe technology are bonded to the printed circuit board (PCB) to obtain impedances by Load-Pull system, then matching networks are done for best linearity with discrete passive components on PCB. The final measured three-stage PA exhibits 21.1 dBm of output power at 1 dB compression point (OP1dB) with power added efficiency (PAE) of 20.6% and 33 dB power gain under 3.3 V power supply voltage.

Keywords: High gain power amplifier, linearization bias circuit, SiGe HBT model, Volterra Series.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 942

Authors: S. Boorboor, S. A. H. Feghhi, H. Jafari

Abstract:

The ionizing radiations cause different kinds of damages in electronic components. MOSFETs, most common transistors in today’s digital and analog circuits, are severely sensitive to TID damage. In this work, the threshold voltage shift of CD4007 device, which is an integrated circuit including P-channel and N-channel MOS transistors, was investigated for low dose gamma irradiation under different gate bias voltages. We used linear extrapolation method to extract threshold voltage from I_D-V_G characteristic curve. The results showed that the threshold voltage shift was approximately 27.5 mV/Gy for N-channel and 3.5 mV/Gy for P-channel transistors at the gate bias of |9 V| after irradiation by Co-60 gamma ray source. Although the sensitivity of the devices under test were strongly dependent to biasing condition and transistor type, the threshold voltage shifted linearly versus accumulated dose in all cases. The overall results show that the application of CD4007 as an electronic buffer in a radiation therapy system is limited by TID damage. However, this integrated circuit can be used as a cheap and sensitive radiation dosimeter for accumulated dose measurement in radiation therapy systems.

Keywords: Threshold voltage shift, MOS transistor, linear extrapolation, gamma irradiation.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1324

Authors: Neeraj K. Chasta

Abstract:

This paper presents an idea for analog current comparison which compares input signal and reference currents with high speed and accuracy. Proposed circuit utilizes amplification properties of common gate configuration, where voltage variations of input current are amplified and a compared output voltage is developed. Cascaded inverter stages are used to generate final CMOS compatible output voltage. Power consumption of circuit can be controlled by the applied gate bias voltage. The comparator is designed and studied at 180nm CMOS process technology for a supply voltage of 3V.

Keywords: Current Mode, Comparator, High Resolution, High Speed.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4659

Authors: S. Varnagiris, M. Urbonavicius, S. Tuckute, M. Lelis, K. Bockute

Abstract:

Amongst many water purification techniques, TiO₂ photocatalysis is recognized as one of the most promising sustainable methods. It is known that for photocatalytical applications anatase is the most suitable TiO₂ phase, however heterojunction of anatase/rutile phases could improve the photocatalytical activity of TiO₂ even further. Despite the relative simplicity of TiO₂ different synthesis methods lead to the highly dispersed crystal phases and photocatalytic activity of the corresponding samples. Accordingly, suggestions and investigations of various innovative methods of TiO₂ synthesis are still needed. In this work structural and photocatalytical properties of TiO₂ films deposited by the unconventional method of simultaneous co-sputtering from two magnetrons powered by pulsed-Direct Current (pDC) and Radio Frequency (RF) power sources with negative bias voltage have been studied. More specifically, TiO₂ film thickness, microstructure, surface roughness, crystal structure, optical transmittance and photocatalytical properties were investigated by profilometer, scanning electron microscope, atomic force microscope, X-ray diffractometer and UV-Vis spectrophotometer respectively. The proposed unconventional two magnetron co-sputtering based TiO₂ film formation method showed very promising results for crystalline TiO₂ film formation while keeping process temperatures below 100 °C. XRD analysis revealed that by using proper combination of power source type and bias voltage various TiO₂ phases (amorphous, anatase, rutile or their mixture) can be synthesized selectively. Moreover, strong dependency between power source type and surface roughness, as well as between the bias voltage and band gap value of TiO₂ films was observed. Interestingly, TiO₂ films deposited by two magnetron co-sputtering without bias voltage had one of the highest band gap values between the investigated films but its photocatalytic activity was superior compared to all other samples. It is suggested that this is due to the dominating nanocrystalline anatase phase with various exposed surfaces including photocatalytically the most active {001}.

Keywords: Films, magnetron co-sputtering, photocatalysis, TiO2.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 599

Authors: Rasha A. Abdullah, Mohammed. A. Razooqi, Adwan N. H. Al-Ajili

Abstract:

A SnO2/CdS/CdTe heterojunction was fabricated by thermal evaporation technique. The fabricated cells were annealed at 573K for periods of 60, 120 and 180 minutes. The structural properties of the solar cells have been studied by using X-ray diffraction. Capacitance- voltage measurements were studied for the as-prepared and annealed cells at a frequency of 102 Hz. The capacitance- voltage measurements indicated that these cells are abrupt. The capacitance decreases with increasing annealing time. The zero bias depletion region width and the carrier concentration increased with increasing annealing time. The carrier transport mechanism for the CdS/CdTe heterojunction in dark is tunneling recombination. The ideality factor is 1.56 and the reverse bias saturation current is 9.6×10-10A. The energy band lineup for the n- CdS/p-CdTe heterojunction was investigated using current - voltage and capacitance - voltage characteristics.

Keywords: SnO2/CdS/CdTe heterojunction, XRD, C-V measurement, I-V measurement, energy band diagram.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3664

Authors: Guojia Ma, Guoqiang Lin, Shuili Gong, Gang Sun, Dawang Wang

Abstract:

A diamond-like carbon (DLC) based solid-lubricant film was designed and DLC films were successfully prepared using a microwave plasma enhanced magnetron sputtering deposition technology. Post-test characterizations including Raman spectrometry, X-ray diffraction, nano-indentation test, adhesion test, friction coefficient test were performed to study the influence of substrate bias voltage on the mechanical properties of the W- and S-doped DLC films. The results indicated that the W- and S-doped DLC films also had the typical structure of DLC films and a better mechanical performance achieved by the application of a substrate bias of -200V.

Keywords: Adhesive Strength, Coefficient of Friction, Substrate Bias, W- and S-doped DLC film

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1912

Authors: Néjib Hassen, Thouraya Ettaghzouti, Kamel Besbes

Abstract:

In this paper, a modified CCCII is presented. We have used a current mirror with low supply voltage. This circuit is operated at low supply voltage of ±1V. Tspice simulations for TSMC 0.18μm CMOS Technology has shown that the current and voltage bandwidth are respectively 3.34GHz and 4.37GHz, and parasitic resistance at port X has a value of 169.320 for a control current of 120μA. In order to realize this circuit, we have implemented in this first step a universal current mode filter where the frequency can reach the 134.58MHz. In the second step, we have implemented two simulated inductors: one floating and the other grounded. These two inductors are operated in high frequency and variable depending on bias current I0. Finally, we have used the two last inductors respectively to implement two sinusoidal oscillators domains of frequencies respectively: [470MHz, 692MHz], and [358MHz, 572MHz] for bias currents I0 [80μA, 350μA].

Keywords: Current controlled current conveyor CCCII, floating inductor, grounded inductor, oscillator, universal filter.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2744

Authors: N.R.N. Idris

Abstract:

This study uses simulated meta-analysis to assess the effects of publication bias on meta-analysis estimates and to evaluate the efficacy of the trim and fill method in adjusting for these biases. The estimated effect sizes and the standard error were evaluated in terms of the statistical bias and the coverage probability. The results demonstrate that if publication bias is not adjusted it could lead to up to 40% bias in the treatment effect estimates. Utilization of the trim and fill method could reduce the bias in the overall estimate by more than half. The method is optimum in presence of moderate underlying bias but has minimal effects in presence of low and severe publication bias. Additionally, the trim and fill method improves the coverage probability by more than half when subjected to the same level of publication bias as those of the unadjusted data. The method however tends to produce false positive results and will incorrectly adjust the data for publication bias up to 45 % of the time. Nonetheless, the bias introduced into the estimates due to this adjustment is minimal

Keywords: Publication bias, Trim and Fill method, percentage relative bias, coverage probability

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1516

Authors: Young Wook Lee, Sun-Jae Kim, Soo-Yeon Lee, Moon-Kyu Song, Woo-Geun Lee Min-Koo Han

Abstract:

We have fabricated a-IGZO TFT and investigated the stability under positive DC and AC bias stress. The threshold voltage of a-IGZO TFT shifts positively under those biases, and that reduces on-current. For this reason, conventional shift-register circuit employing TFTs which stressed by positive bias will be unstable, may do not work properly. We have designed a new 6-transistor shift-register, which has less transistors than prior circuits. The TFTs of the proposed shift-register are not suffering from positive DC or AC stress, mainly kept unbiased. Despite the compact design, the stable output signal was verified through the SPICE simulation even under RC delay of clock signal.

Keywords: Indium Gallium Zinc Oxide (IGZO), Thin FilmTransistor (TFT), shift-register

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3216

Authors: S. Ganesh, L. Raguraman, E. Anushya, J. krishnasree

Abstract:

Voltage sags are the most common power quality disturbance in the distribution system. It occurs due to the fault in the electrical network or by the starting of a large induction motor and this can be solved by using the custom power devices such as Dynamic Voltage Restorer (DVR). In this paper DVR is proposed to compensate voltage sags on critical loads dynamically. The DVR consists of VSC, injection transformers, passive filters and energy storage (lead acid battery). By injecting an appropriate voltage, the DVR restores a voltage waveform and ensures constant load voltage. The simulation and experimental results of a DVR using MATLAB software shows clearly the performance of the DVR in mitigating voltage sags.

Keywords: Dynamic voltage restorer, Voltage sags, Power quality, Injection methods.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4222

Authors: Muhibul Haque Bhuyan, Quazi Deen Mohd Khosru

Abstract:

This paper presents a threshold voltage model of pocket implanted sub-100 nm n-MOSFETs incorporating the drain and substrate bias effects using two linear pocket profiles. Two linear equations are used to simulate the pocket profiles along the channel at the surface from the source and drain edges towards the center of the n-MOSFET. Then the effective doping concentration is derived and is used in the threshold voltage equation that is obtained by solving the Poisson-s equation in the depletion region at the surface. Simulated threshold voltages for various gate lengths fit well with the experimental data already published in the literature. The simulated result is compared with the two other pocket profiles used to derive the threshold voltage models of n-MOSFETs. The comparison shows that the linear model has a simple compact form that can be utilized to study and characterize the pocket implanted advanced ULSI devices.

Keywords: Linear pocket profile, pocket implantation, nMOSFET, threshold voltage, short channel effect (SCE), reverse short channeleffect (RSCE).

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1748

Authors: S. Abdollahi Pour, M. Saneei

Abstract:

This paper propose a new circuit design which monitor total leakage current during standby mode and generates the optimal reverse body bias voltage, by using the adaptive body bias (ABB) technique to compensate die-to-die parameter variations. Design details of power monitor are examined using simulation framework in 65nm and 32nm BTPM model CMOS process. Experimental results show the overhead of proposed circuit in terms of its power consumption is about 10 μW for 32nm technology and about 12 μW for 65nm technology at the same power supply voltage as the core power supply. Moreover the results show that our proposed circuit design is not far sensitive to the temperature variations and also process variations. Besides, uses the simple blocks which offer good sensitivity, high speed, the continuously feedback loop.

Keywords: leakage current, leakage power monitor, body biasing, low power

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1700

Authors: Mohammed Amroune, Hadi Sebaa, Tarek Bouktir

Abstract:

Reactive power limit of power system is one of the major causes of voltage instability. The only way to save the system from voltage instability is to reduce the reactive power load or add additional reactive power to reaching the point of voltage collapse. In recent times, the application of FACTS devices is a very effective solution to prevent voltage instability due to their fast and very flexible control. In this paper, voltage stability assessment with SVC and TCSC devices is investigated and compared in the modified IEEE 30-bus test system. The fast voltage stability indicator (FVSI) is used to identify weakest bus and to assess the voltage stability of power system.

Keywords: SVC, TCSC, Voltage stability, Fast Voltage Stability Index (FVSI), Reactive power.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4008

Authors: A. C. Sarmah

Abstract:

The Al-MoO3-P-CdTe-Al MOS sandwich structures were fabricated by vacuum deposition method on cleaned glass substrates. Capacitance versus voltage measurements were performed at different frequencies and sweep rates of applied voltages for oxide and semiconductor films of different thicknesses. In the negative voltage region of the C-V curve a high differential capacitance of the semiconductor was observed and at high frequencies (<10 kHz) the transition from accumulation to depletion and further to deep depletion was observed as the voltage was swept from negative to positive. A study have been undertaken to determine the value of acceptor density and some depletion layer parameters such as depletion layer capacitance, depletion width, impurity concentration, flat band voltage, Debye length, flat band capacitance, diffusion or built-in-potential, space charge per unit area etc. These were determined from C-V measurements for different oxide and semiconductor thicknesses.

Keywords: Debye length, Depletion width, flat band capacitance, impurity concentration.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1529

Authors: Bo Bae Song, Byung Seok Lee, Hyun Young Kim, Chung Kwang Lee, Yong Seo Koo

Abstract:

This paper proposed a silicon controller rectifier (SCR) based ESD protection device to protect low voltage ESD for integrated circuit. The proposed ESD protection device has low trigger voltage and high holding voltage compared with conventional SCR-based ESD protection devices. The proposed ESD protection circuit is verified and compared by TCAD simulation. This paper verified effective low voltage ESD characteristics with low trigger voltage of 5.79V and high holding voltage of 3.5V through optimization depending on design variables (D1, D2, D3 and D4).

Keywords: ESD, SCR, Holding voltage, Latch-up.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2847

Authors: Muhammad Mujtaba Asad, Razali Bin Hassan, Fahad Sherwani

Abstract:

This paper explains about the voltage output for DC to DC boost converter between open loop, PID controller and fuzzy logic controller through Matlab Simulink. Simulink input voltage was set at 12V and the voltage reference was set at 24V. The analysis on the deviation of voltage resulted that the difference between reference voltage setting and the output voltage is always lower. Comparison between open loop, PID and FLC shows that, the open loop circuit having a bit higher on the deviation of voltage. The PID circuit boosts for FLC has a lesser deviation of voltage and proved that it is such a better performance on control the deviation of voltage during the boost mode.

Keywords: Boost Convertors, Power Electronics, PID, Fuzzy logic, Open loop.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3803

Authors: Hee-Guk Chae, Bo-Bae Song, Kyoung-Il Do, Jeong-Yun Seo, Yong-Seo Koo

Abstract:

In this study, an improved Electrostatic Discharge (ESD) protection circuit with low trigger voltage and high holding voltage is proposed. ESD has become a serious problem in the semiconductor process because the semiconductor density has become very high these days. Therefore, much research has been done to prevent ESD. The proposed circuit is a stacked structure of the new unit structure combined by the Zener Triggering (SCR ZTSCR) and the High Holding Voltage SCR (HHVSCR). The simulation results show that the proposed circuit has low trigger voltage and high holding voltage. And the stack technology is applied to adjust the various operating voltage. As the results, the holding voltage is 7.7 V for 2-stack and 10.7 V for 3-stack.

Keywords: ESD, SCR, latch-up, power clamp, holding voltage.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 947

Authors: V. Suresh Babu, Haseena P. S., Varun P. Gopi, M. R. Baiju

Abstract:

In this paper a scheme is proposed for generating a programmable current reference which can be implemented in the CMOS technology. The current can be varied over a wide range by changing an external voltage applied to one of the control gates of FGMOS (Floating Gate MOSFET). For a range of supply voltages and temperature, CMOS current reference is found to be dependent, this dependence is compensated by subtracting two current outputs with the same dependencies on the supply voltage and temperature. The system performance is found to improve with the use of FGMOS. Mathematical analysis of the proposed circuit is done to establish supply voltage and temperature independence. Simulation and performance evaluation of the proposed current reference circuit is done using TANNER EDA Tools. The current reference shows the supply and temperature dependencies of 520 ppm/V and 312 ppm/oC, respectively. The proposed current reference can operate down to 0.9 V supply.

Keywords: Floating Gate MOSFET, current reference, self bias scheme, temperature independency, supply voltage independency.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1757

Authors: S. Thongkeaw, M. Boonthienthong

Abstract:

This paper presents the techniques for voltage control in distribution system. It is integrated in the distribution management system. Voltage is an important parameter for the control of electrical power systems. The distribution network operators have the responsibility to regulate the voltage supplied to consumer within statutory limits. Traditionally, the On-Load Tap Changer (OLTC) transformer equipped with automatic voltage control (AVC) relays is the most popular and effective voltage control device. A static synchronous compensator (STATCOM) may be equipped with several controllers to perform multiple control functions. Static Var Compensation (SVC) is regulation slopes and available margins for var dispatch. The voltage control in distribution networks is established as a centralized analytical function in this paper. 

Keywords: Voltage Control, Reactive Power, Distribution System.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 9448

Authors: Kimberly Jane S. Uy, Patricia Angela Reyes-Abu, Wen Yaw Chung

Abstract:

A high precision temperature insensitive current and voltage reference generator is presented. It is specifically developed for temperature compensated oscillator. The circuit, designed using MXIC 0.5um CMOS technology, has an operating voltage that ranges from 2.6V to 5V and generates a voltage of 1.21V and a current of 6.38 ӴA. It exhibits a variation of ±0.3nA for the current reference and a stable output for voltage reference as the temperature is varied from 0°C to 70°C. The power supply rejection ratio obtained without any filtering capacitor at 100Hz and 10MHz is -30dB and -12dB respectively.

Keywords: Current reference, voltage reference, threshold voltage, temperature compensation, mobility.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2293

Authors: Z. Fang, X. P. Wang, G. Q. Lo, D. L. Kwong

Abstract:

In this work, we demonstrated vertical RRAM device fabricated at the sidewall of contact hole structures for possible future 3-D stacking integrations. The fabricated devices exhibit polarity dependent bipolar resistive switching with small operation voltage of less than 1V for both set and reset process. A good retention of memory window ~50 times is maintained after 1000s voltage bias.

Keywords: Bipolar switching, non volatile memory, resistive random access memory, 3-D stacking.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2159

Authors: Ahmad Al-Omari, Osama Khreis, Ahmad M. K. Dagamseh, Abdullah Ababneh, Kevin Lear

Abstract:

High-speed infrared vertical-cavity surface-emitting laser diodes (VCSELs) with Cu-plated heat sinks were fabricated and tested. VCSELs with 10 mm aperture diameter and 4 mm of electroplated copper demonstrated a -3dB modulation bandwidth (f_-3dB) of 14 GHz and a resonance frequency (f_R) of 9.5 GHz at a bias current density (J_bias) of only 4.3 kA/cm², which corresponds to an improved f_-3dB²/J_bias ratio of 44 GHz²/kA/cm². At higher and lower bias current densities, the f_-3dB²/ J_bias ratio decreased to about 30 GHz²/kA/cm² and 18 GHz²/kA/cm², respectively. Examination of the analogue modulation response demonstrated that the presented VCSELs displayed a steady f_-3dB/ f_R ratio of 1.41±10% over the whole range of the bias current (1.3I_th to 6.2I_th). The devices also demonstrated a maximum modulation bandwidth (f_{-3dB max}) of more than 16 GHz at a bias current less than the industrial bias current standard for reliability by 25%.

Keywords: Current density, High-speed VCSELs, Modulation bandwidth, Small-Signal Characteristics, Thermal impedance, Vertical-cavity surface-emitting lasers.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1231

Authors: B.Gholami, S.Gholami, A.Forouzantabar, Sh.Bazyari

Abstract:

A new design approach for three-stage operational amplifiers (op-amps) is proposed. It allows to actually implement a symmetrical push-pull class-AB amplifier output stage for wellestablished three-stage amplifiers using a feedforward transconductance stage. Compared with the conventional design practice, the proposed approach leads to a significant improvement of the symmetry between the positive and the negative op-amp step response, resulting in similar values of the positive/negative settling time. The new approach proves to be very useful in order to fully exploit the potentiality allowed by the op-amp in terms of speed performances. Design examples in a commercial 0.35-μm CMOS prove the effectiveness of theproposed strategy.

Keywords: Low-voltage op amp, design , optimum design

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3513

Authors: Sun-Ki Hong, Nam-HeeByeon, Jung-Seop Lee, Tae-Sam Kang

Abstract:

For Common R or R-L load to apply arbitrary voltage, the bridge traditional inverters don’t have any difficulties by PWM method. However for driving some piezoelectric actuator, arbitrary voltage not a pulse but a steady voltage should be applied. Piezoelectric load is considered as R-C load and its voltage does not decrease even though the applied voltage decreases. Therefore it needs some special inverter with circuit that can discharge the capacitive energy. Especially for unidirectional arbitrary voltage driving like as sine wave, it becomes more difficult problem. In this paper, a charge and discharge circuit for unidirectional arbitrary voltage driving for piezoelectric actuator is proposed. The circuit has charging and discharging switches for increasing and decreasing output voltage. With the proposed simple circuit, the load voltage can have any unidirectional level with tens of bandwidth because the load voltage can be adjusted by switching the charging and discharging switch appropriately. The appropriateness is proved from the simulation of the proposed circuit.

Keywords: DC-DC converter, analog output voltage, sinusoidal drive, piezoelectric load, discharging circuit.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2475