Search results for: Analog Integrated Circuit Design

Authors: Safyeh Soufian, Hoosein Naderi-Manesh, Abdoali Alizadeh, Mohammad Nabi Sarbolouki

Abstract:

Aurein 1.2 is a 13-residue amphipathic peptide with antibacterial and anticancer activity. Aurein1.2 and its retro analog were synthesized to study the activity of the peptides in relation to their structure. The antibacterial test result showed the retro-analog is inactive. The secondary structural analysis by CD spectra indicated that both of the peptides at TFE/Water adopt alpha-helical conformation. MD simulation was performed on aurein 1.2 and retro-analog in water and TFE in order to analyse the factors that are involved in the activity difference between retro and the native peptide. The simulation results are discussed and validated in the light of experimental data from the CD experiment. Both of the peptides showed a relatively similar pattern for their hydrophobicity, hydrophilicity, solvent accessible surfaces, and solvent accessible hydrophobic surfaces. However, they showed different in directions of dipole moment of peptides. Also, Our results further indicate that the reversion of the amino acid sequence affects flexibility .The data also showed that factors causing structural rigidity may decrease the activity. Consequently, our finding suggests that in the case of sequence-reversed peptide strategy, one has to pay attention to the role of amino acid sequence order in making flexibility and role of dipole moment direction in peptide activity. KeywordsAntimicrobial peptides, retro, molecular dynamic, circular dichroism.

Keywords: Antimicrobial peptides, retro, molecular dynamic, circular dichroism.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1811

Authors: Douglas A. Menezes, Isabel D. Nunes, Ulrich Schiel

Abstract:

Most Virtual Learning Environments do not provide support mechanisms for the integrated planning, construction and follow-up of Instructional Design supported by Learning Analytic results. The present work aims to present an authoring tool that will be responsible for constructing the structure of an Instructional Design (ID), without the data being altered during the execution of the course. The visual interface aims to present the critical situations present in this ID, serving as a support tool for the course follow-up and possible improvements, which can be made during its execution or in the planning of a new edition of this course. The model for the ID is based on High-Level Petri Nets and the visualization forms are determined by the specific kind of the data generated by an e-course, a population of students generating sequentially dependent data.

Keywords: Educational data visualization, high-level petri nets, instructional design, learning analytics.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 799

Authors: Syed Iftekhar Ali, M. S. Islam

Abstract:

In this paper we present an energy efficient match-line (ML) sensing scheme for high-speed ternary content-addressable memory (TCAM). The proposed scheme isolates the sensing unit of the sense amplifier from the large and variable ML capacitance. It employs feedback in the sense amplifier to successfully detect a match while keeping the ML voltage swing low. This reduced voltage swing results in large energy saving. Simulation performed using 130nm 1.2V CMOS logic shows at least 30% total energy saving in our scheme compared to popular current race (CR) scheme for similar search speed. In terms of speed, dynamic energy, peak power consumption and transistor count our scheme also shows better performance than mismatch-dependant (MD) power allocation technique which also employs feedback in the sense amplifier. Additionally, the implementation of our scheme is simpler than CR or MD scheme because of absence of analog control voltage and programmable delay circuit as have been used in those schemes.

Keywords: content-addressable memory, energy consumption, feedback, peak power, sensing scheme, sense amplifier, ternary.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1774

Authors: A. Ahadpour Shal, A. Ghadimi, A. Azadbar

Abstract:

In this paper a new method for increasing the speed of SAGCM-APD is proposed. Utilizing carrier rate equations in different regions of the structure, a circuit model for the structure is obtained. In this research, in addition to frequency response, the effect of added new charge layer on some transient parameters like slew-rate, rising and falling times have been considered. Finally, by trading-off among some physical parameters such as different layers widths and droppings, a noticeable decrease in breakdown voltage has been achieved. The results of simulation, illustrate some features of proposed structure improvement in comparison with conventional SAGCM-APD structures.

Keywords: Optical communication systems (OCS), Circuit modeling, breakdown voltage, SAGCM APD

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2025

Authors: Nasir Mehmood, Saad Rahman, Vinodh Ravinath, Mahesh Balaji

Abstract:

This paper describes the design of a programmable FSK-modulator based on VCO and its implementation in 0.35m CMOS process. The circuit is used to transmit digital data at 100Kbps rate in the frequency range of 400-600MHz. The design and operation of the modulator is discussed briefly. Further the characteristics of PLL, frequency synthesizer, VCO and the whole design are elaborated. The variation among the proposed and tested specifications is presented. Finally, the layout of sub-modules, pin configurations, final chip and test results are presented.

Keywords: FSK Modulator, CMOS, VCO, Phase Locked Loop, Frequency Synthesizer.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1675

Authors: Zdeňka Dostálová, David Matoušek, Bohumil Brtnik

Abstract:

As there are also graph methods of circuit analysis in addition to algebraic methods, it is, in theory, clearly possible to carry out an analysis of a whole switched circuit in two-phase switching exclusively by the graph method as well. This article deals with two methods of full-graph solving of switched circuits: by transformation graphs and by two-graphs. It deals with the circuit switched capacitors and the switched current, too. All methods are presented in an equally detailed steps to be able to compare.

Keywords: Switched capacitors of two phases, switched currents of two phases, transformation graph, two-graph, Mason's formula, voltage transfer, summary graph.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1266

Authors: Zina Saheb, Ezz El-Masry

Abstract:

As the Silicon oxide scaled down in MOSFET technology to few nanometers, gate Direct Tunneling (DT) in Floating gate (FGMOSFET) devices has become a major concern for analog designers. FGMOSFET has been used in many low-voltage and low-power applications, however, there is no accurate model that account for DT gate leakage in nano-scale. This paper studied and analyzed different simulation models for FGMOSFET using TSMC 90-nm technology. The simulation results for FGMOSFET cascade current mirror shows the impact of DT on circuit performance in terms of current and voltage without the need for fabrication. This works shows the significance of using an accurate model for FGMOSFET in nan-scale technologies.

Keywords: CMOS transistor, direct-tunneling current, floatinggate, gate-leakage current, simulation model.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2940

Authors: Eduardo Romero, Marcelo Costamagna, Gabriela Peretti, Carlos Marqués

Abstract:

This work evaluates the ability of OBT for detecting parametric faults in continuous-time filters. To this end, we adopt two filters with quite different topologies as cases of study and a previously reported statistical fault model. In addition, we explore the behavior of the test schemes when a particular test condition is changed. The new data reported here, obtained from a fault simulation process, reveal a lower performance of OBT not observed in previous work using single-deviation faults, even under the change in the test condition.

Keywords: Testing, analog fault simulation, analog filter test, oscillation based test.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1397

Authors: G. Sonfack, J. Mbihi, B. Lonla Moffo

Abstract:

This paper presents an optimal duty-cycle modulation (ODCM) scheme for analog-to-digital conversion (ADC) systems. The overall ODCM-Based ADC problem is decoupled into optimal DCM and digital filtering sub-problems, while taking into account constraints of mutual design parameters between the two. Using a set of three lemmas and four morphological theorems, the ODCM sub-problem is modelled as a nonlinear cost function with nonlinear constraints. Then, a weighted least p^th norm of the error between ideal and predicted frequency responses is used as a cost function for the digital filtering sub-problem. In addition, MATLAB fmincon and MATLAB iirlnorm tools are used as optimal DCM and least p^th norm solvers respectively. Furthermore, the virtual simulation scheme of an overall prototyping ODCM-based ADC system is implemented and well tested with the help of Simulink tool according to relevant set of design data, i.e., 3 KHz of modulating bandwidth, 172 KHz of maximum modulation frequency and 25 MHZ of sampling frequency. Finally, the results obtained and presented show that the ODCM-based ADC achieves under 3 KHz of modulating bandwidth: 57 dBc of SINAD (signal-to-noise and distorsion), 58 dB of SFDR (Surpious free dynamic range) -80 dBc of THD (total harmonic distorsion), and 10 bits of minimum resolution. These performance levels appear to be a great challenge within the class of oversampling ADC topologies, with 2^nd order IIR (infinite impulse response) decimation filter.

Keywords: Digital IIR filter, morphological lemmas and theorems, optimal DCM-based DAC, virtual simulation, weighted least pth norm.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 875

Authors: Seyed Ali Sedigh Zyabari, A. Zarifkar

Abstract:

Single photon detectors have been fabricated NbN nano wire. These detectors are fabricated from high quality, ultra high vacuum sputtered NbN thin films on a sapphire substrate. In this work a typical schematic of the nanowire Single Photon Detector structure and then driving and measurement electronic circuit are shown. The response of superconducting nanowire single photon detectors during a photo detection event, is modeled by a special electrical circuits (two circuit). Finally, current through the wire is calculated by solving equations of models.

Keywords: NbN, nanowire meander, superconducting single photon detector, kinetic inductance.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1463

Authors: C. Chanapromma, T. Worachak, P. Silapan

Abstract:

This paper presents positive and negative full-wave rectifier. The proposed structure is based on OTA using commercially available ICs (LT1228). The features of the proposed circuit are that: it can rectify and amplify voltage signal with controllable output magnitude via input bias current: the output voltage is free from temperature variation. The circuit description merely consists of 1 single ended and 3 fully differential OTAs. The performance of the proposed circuit are investigated though PSpice. They show that the proposed circuit can function as positive/negative full-wave rectifier, where the voltage input wide-dynamic range from -5V to 5V. Furthermore, the output voltage is slightly dependent on the temperature variations.

Keywords: Full-wave rectifier, Positive/negative, OTA, Electronically controllable, Wide-dynamic range

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1785

Authors: Wirat Sonchan, Pratoom Moungmee, Anek Sootmongkol

Abstract:

This study aimed to examine the effects of a circuit training program on muscle strength, agility, anaerobic performance and cardiovascular endurance. The study involved 24 freshmen (age 18.87+0.68 yr.) male students of the Faculty of Sport Science, Burapha University. They sample study were randomly divided into two groups: Circuit Training group (CT; n=12) and a Control group (C; n=12). Baseline data on height, weight, muscle strength (hand grip dynamometer and leg strength dynamometer), agility (agility T-Test), and anaerobic performance (Running-based Anaerobic Sprint Test) and cardiovascular endurance (20 m Endurance Shuttle Run Test) were collected. The circuit training program included one circuit of eight stations of 30/60 seconds of work/rest interval with two cycles in Week 1-4, and 60/90 seconds of work/rest interval with three cycles in Week 5-8, performed three times per week. Data were analyzed using paired t-tests and independent sample t-test. Statistically significance level was set at 0.05. The results show that after 8 weeks of a training program, muscle strength, agility, anaerobic capacity and cardiovascular endurance increased significantly in the CT Group (p < 0.05), while significant increase was not observed in the C Group (p < 0.05). The results of this study suggest that the circuit training program improved muscle strength, agility, anaerobic capacity and cardiovascular endurance of the study subjects. This program may be used as a guideline for selecting a set of exercise to improve physical fitness.

Keywords: Cardiovascular endurance, circuit training, physical fitness, anaerobic performance.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2433

Authors: Shiyang Zhu, G. Q. Lo, D. L. Kwong

Abstract:

Silicon photonics has generated an increasing interest in recent years mainly for optical communications optical interconnects in microelectronic circuits or bio-sensing applications. The development of elementary passive and active components (including detectors and modulators), which are mainly fabricated on the silicon on insulator platform for CMOS-compatible fabrication, has reached such a performance level that the integration challenge of silicon photonics with microelectronic circuits should be addressed. Since crystalline silicon can only be grown from another silicon crystal, making it impossible to deposit in this state, the optical devices are typically limited to a single layer. An alternative approach is to integrate a photonic layer above the CMOS chip using back-end CMOS fabrication process. In this paper, various materials, including silicon nitride, amorphous silicon, and polycrystalline silicon, for this purpose are addressed.

Keywords: Silicon photonics, CMOS, Integration.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2431

Authors: Shahana T. K., Babita R. Jose, K. Poulose Jacob, Sreela Sasi

Abstract:

The modern telecommunication industry demands higher capacity networks with high data rate. Orthogonal frequency division multiplexing (OFDM) is a promising technique for high data rate wireless communications at reasonable complexity in wireless channels. OFDM has been adopted for many types of wireless systems like wireless local area networks such as IEEE 802.11a, and digital audio/video broadcasting (DAB/DVB). The proposed research focuses on a concatenated coding scheme that improve the performance of OFDM based wireless communications. It uses a Redundant Residue Number System (RRNS) code as the outer code and a convolutional code as the inner code. Here, a direct conversion of analog signal to residue domain is done to reduce the conversion complexity using sigma-delta based parallel analog-to-residue converter. The bit error rate (BER) performances of the proposed system under different channel conditions are investigated. These include the effect of additive white Gaussian noise (AWGN), multipath delay spread, peak power clipping and frame start synchronization error. The simulation results show that the proposed RRNS-Convolutional concatenated coding (RCCC) scheme provides significant improvement in the system performance by exploiting the inherent properties of RRNS.

Keywords: Analog-to-residue converter, Concatenated codes, OFDM, Redundant Residue Number System, Sigma-delta modulator, Wireless communication

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1904

Authors: M.Hosseinghadiry, H. Mohammadi, M.Nadisenejani

Abstract:

with increasing circuits- complexity and demand to use portable devices, power consumption is one of the most important parameters these days. Full adders are the basic block of many circuits. Therefore reducing power consumption in full adders is very important in low power circuits. One of the most powerconsuming modules in full adders is XOR/XNOR circuit. This paper presents two new full adders based on two new logic approaches. The proposed logic approaches use one XOR or XNOR gate to implement a full adder cell. Therefore, delay and power will be decreased. Using two new approaches and two XOR and XNOR gates, two new full adders have been implemented in this paper. Simulations are carried out by HSPICE in 0.18μm bulk technology with 1.8V supply voltage. The results show that the ten-transistors proposed full adder has 12% less power consumption and is 5% faster in comparison to MB12T full adder. 9T is more efficient in area and is 24% better than similar 10T full adder in term of power consumption. The main drawback of the proposed circuits is output threshold loss problem.

Keywords: Full adder, XNOR, Low power, High performance, Very Large Scale Integrated Circuit.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2037

Authors: Ali Al-Ataby , Fawzi Al-Naima

Abstract:

Symbolic Circuit Analysis (SCA) is a technique used to generate the symbolic expression of a network. It has become a well-established technique in circuit analysis and design. The symbolic expression of networks offers excellent way to perform frequency response analysis, sensitivity computation, stability measurements, performance optimization, and fault diagnosis. Many approaches have been proposed in the area of SCA offering different features and capabilities. Numerical Interpolation methods are very common in this context, especially by using the Fast Fourier Transform (FFT). The aim of this paper is to present a method for SCA that depends on the use of Wavelet Transform (WT) as a mathematical tool to generate the symbolic expression for large circuits with minimizing the analysis time by reducing the number of computations.

Keywords: Numerical Interpolation, Sparse Matrices, SymbolicAnalysis, Wavelet Transform.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1497

Authors: Y.B.Gandole

Abstract:

Compaction testing methods allow at-speed detecting of errors while possessing low cost of implementation. Owing to this distinctive feature, compaction methods have been widely used for built-in testing, as well as external testing. In the latter case, the bandwidth requirements to the automated test equipment employed are relaxed which reduces the overall cost of testing. Concurrent compaction testing methods use operational signals to detect misbehavior of the device under test and do not require input test stimuli. These methods have been employed for digital systems only. In the present work, we extend the use of compaction methods for concurrent testing of analog-to-digital converters. We estimate tolerance bounds for the result of compaction and evaluate the aliasing rate.

Keywords: Analog-to Digital Converter, Embedded system, Concurrent Testing

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1569

Authors: Syed Manzoor Qasim, Shuja Abbasi, Saleh Alshebeili, Bandar Almashary, Ateeq Ahmad Khan

Abstract:

Higher-order Statistics (HOS), also known as cumulants, cross moments and their frequency domain counterparts, known as poly spectra have emerged as a powerful signal processing tool for the synthesis and analysis of signals and systems. Algorithms used for the computation of cross moments are computationally intensive and require high computational speed for real-time applications. For efficiency and high speed, it is often advantageous to realize computation intensive algorithms in hardware. A promising solution that combines high flexibility together with the speed of a traditional hardware is Field Programmable Gate Array (FPGA). In this paper, we present FPGA-based parallel architecture for the computation of third-order cross moments. The proposed design is coded in Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) and functionally verified by implementing it on Xilinx Spartan-3 XC3S2000FG900-4 FPGA. Implementation results are presented and it shows that the proposed design can operate at a maximum frequency of 86.618 MHz.

Keywords: Cross moments, Cumulants, FPGA, Hardware Implementation.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1687

Authors: Yuan-Jye Tseng, Yen-Jung Wang

Abstract:

A product development for green logistics model using the fuzzy analytic network process method is presented for evaluating the relationships among the product design, the manufacturing activities, and the green supply chain. In the product development stage, there can be alternative ways to design the detailed components to satisfy the design concept and product requirement. In different design alternative cases, the manufacturing activities can be different. In addition, the manufacturing activities can affect the green supply chain of the components and product. In this research, a fuzzy analytic network process evaluation model is presented for evaluating the criteria in product design, manufacturing activities, and green supply chain. The comparison matrices for evaluating the criteria among the three groups are established. The total relational values between the three groups represent the relationships and effects. In application, the total relational values can be used to evaluate the design alternative cases for decision-making to select a suitable design case and the green supply chain. In this presentation, an example product is illustrated. It shows that the model is useful for integrated evaluation of design and manufacturing and green supply chain for the purpose of product development for green logistics.

Keywords: Supply chain management, green supply chain, product development for logistics, fuzzy analytic network process.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2199

Authors: Prapoj Na Bangchang

Abstract:

The research aimed to study the satisfaction of Suan Sunandha Rajabhat University students towards the university radio station which broadcasts in both analog on FM 97.25 MHz and online via the university website. The sample used in this study consists of undergraduate students year 1 to year 4 from 6 faculties i.e. Faculty of Education, Faculty of Humanities and Social Sciences, Faculty of Management Science and Faculty of Industrial Technology, and Faculty of Fine and Applied Arts totaling 200 students. The tools used for data collection is survey. Data analysis applied statistics that are percentage, mean and standard deviation. The results showed that Suan Sunandha Rajabhat University students were satisfied to the place of listening service, followed by channels of broadcasting that cover both analog signals on 97.25 MHz FM and online via the Internet. However, the satisfaction level of the content offered was very low. Most of the students want the station to improve the content. Entertainment content was requested the most, followed by sports content. The lowest satisfaction level is with the broadcasting quality through analog signal. Most students asked the station to improve on the issue. However, overall, Suan Sunandha Rajabhat University students were satisfied with the university radio station broadcasted online via the university website.

Keywords: Satisfaction, students, radio station, Suan Sunandha Rajabhat University.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1208

Authors: Yi-Pin Hsu, Shin-Yu Lin

Abstract:

In order to protect original data, watermarking is first consideration direction for digital information copyright. In addition, to achieve high quality image, the algorithm maybe can not run on embedded system because the computation is very complexity. However, almost nowadays algorithms need to build on consumer production because integrator circuit has a huge progress and cheap price. In this paper, we propose a novel algorithm which efficient inserts watermarking on digital image and very easy to implement on digital signal processor. In further, we select a general and cheap digital signal processor which is made by analog device company to fit consumer application. The experimental results show that the image quality by watermarking insertion can achieve 46 dB can be accepted in human vision and can real-time execute on digital signal processor.

Keywords: watermarking, digital signal processor, embedded system

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1195

Authors: Wang liguo, Wang zongmin, Kong ying

Abstract:

A novel interpolation scheme to extend usable spectrum and upconvert in high performance D/A converters is addressed in this paper. By adjusting the pulse width of cycle and the production circuit of code, the expansion code is a null code or complementary code that is interpolation process. What the times and codes of interpolation decide DAC works in one of a normal mode or multi-mixer mode so that convert the input digital data signal into normal signal or a mixed analog signal having a mixer frequency that is higher than the data frequency. Simulation results show that the novel scheme and apparatus most extend the usable frequency spectrum into fifth to sixth Nyquist zone beyond conventional DACs.

Keywords: interpolation, upconversion, modulation, switching function, duty cycle.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1449

Authors: Farhana Mohamad Yusop, Syafrudin Masri, Dahaman Ishak, Mohamad Kamarol

Abstract:

Electromagnetic forces on three-phase five-wire (3P5W) busbar system is investigated under three-phase short-circuits current. The conductor busbar placed in compact galvanized steel enclosure is in the rectangular shape. Transient analysis from Opera-2D is carried out to develop the model of three-phase short-circuits current in the system. The result of the simulation is compared with the calculation result, which is obtained by applying the theories of Biot Savart’s law and Laplace equation. Under this analytical approach, the moment of peak short-circuit current is taken into account. The effect upon geometrical arrangement of the conductor and the present of the steel enclosure are considered by the theory of image. The result depict that the electromagnetic force due to the transient short-circuit from simulation is agreed with the calculation.

Keywords: Busbar, electromagnetic force, short-circuit current, transient analysis.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3926

Authors: Asmaa M. El-Bandrawy, Afaf M. Botla, Ghada E. El-Refaye, Hassan O. Ghareeb

Abstract:

Background: Urinary incontinence is a common problem among adults. Its incidence increases with age and it is more frequent in women. Pelvic floor muscle training (PFMT) is the first-line therapy in the treatment of pelvic floor dysfunction (PFD) either alone or combined with biofeedback-assisted PFMT. The aim of the work: The purpose of this study is to evaluate the efficacy of biofeedback-assisted PFMT in postoperative stress urinary incontinence. Settings and Design: A single blind controlled trial design was. Methods and Material: This study was carried out in 30 volunteer patients diagnosed as severe degree of stress urinary incontinence and they were admitted to surgical treatment. They were divided randomly into two equal groups: (Group A) consisted of 15 patients who had been treated with post-operative biofeedback-assisted PFMT and home exercise program (Group B) consisted of 15 patients who had been treated with home exercise program only. Assessment of all patients in both groups (A) and (B) was carried out before and after the treatment program by measuring intra-vaginal pressure in addition to the visual analog scale. Results: At the end of the treatment program, there was a highly statistically significant difference between group (A) and group (B) in the intra-vaginal pressure and the visual analog scale favoring the group (A). Conclusion: biofeedback-assisted PFMT is an effective method for the symptomatic relief of post-operative female stress urinary incontinence.

Keywords: Stress urinary incontinence, pelvic floor muscles, pelvic floor exercises, biofeedback.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1357

Authors: A. Marcengo, A. Rapp, E. Guercio

Abstract:

This work aims to describe the process of developing services and applications of seamless communication within a Telecom Italia long-term research project, which takes as central aim the design of a wearable communication device. In particular, the objective was to design a wrist phone integrated into everyday life of people in full transparency. The methodology used to design the wristwatch was developed through several subsequent steps also involving the Personas Layering Framework. The data collected in this phases have been very useful for designing an improved version of the first two concepts of wrist phone going to change aspects related to the four critical points expressed by the users.

Keywords: Design, Interaction, User Centred Design, Wristphone.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1238

Authors: Gu Wei, Gao Wei

Abstract:

In this report, an OTA which is used in fully differential pipelined ADC was described. Using gain-boost architecture with difference-ended amplifier, this OTA achieve high-gain and high-speed. Besides, the CMFB circuit is also used, and some methods are concerned to improve the performance. Then, by optimization the layout design, OTA-s mismatch was reduced. This design was using TSMC 0.18um CMOS process and simulation both schematic and layout in Cadence. The result of the simulation shows that the OTA has a gain up to 80dB,a unity gain bandwidth of about 1.437GHz for a 2pF load, a slew rate is about 428V/μs, a output swing is 0.2V~1.35V, with the power supply of 1.8V, the power consumption is 88mW. This amplifier was used in a 10bit 150MHz pipelined ADC.

Keywords: OTA, common drain, CMFB, pipelined ADC

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3290

Authors: Tsietsi J. Pilusa, Tumisang G. Seodigeng

Abstract:

This study evaluates the benefits of advanced waste management practices in unlocking waste-to-energy opportunities within the solid waste industry. The key drivers of sustainable waste management practices, specifically with respect to packaging waste-to-energy technology options are discussed. The success of a waste-to-energy system depends significantly on the appropriateness of available technologies, including those that are well established as well as those that are less so. There are hard and soft interventions to be considered when packaging an integrated waste treatment solution. Technology compatibility with variation in feedstock (waste) quality and quantities remains a key factor. These factors influence the technology reliability in terms of production efficiencies and product consistency, which in turn, drives the supply and demand network. Waste treatment technologies rely on the waste material as feedstock; the feedstock varies in quality and quantities depending on several factors; hence, the technology fails, as a result. It is critical to design an advanced waste treatment technology in an integrated approach to minimize the possibility of technology failure due to unpredictable feedstock quality, quantities, conversion efficiencies, and inconsistent product yield or quality. An integrated waste-to-energy approach offers a secure system design that considers sustainable waste management practices.

Keywords: Emerging markets, evaluation tool, interventions, waste treatment technologies.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 951

Authors: G. Ait Abdelmalek, R. Ziani

Abstract:

In this document, we have proposed a robust conceptual strategy, in order to improve the robustness against the manufacturing defects and thus the reliability of logic CMOS circuits. However, in order to enable the use of future CMOS technology nodes this strategy combines various types of design: DFR (Design for Reliability), techniques of tolerance: hardware redundancy TMR (Triple Modular Redundancy) for hard error tolerance, the DFT (Design for Testability. The Results on largest ISCAS and ITC benchmark circuits show that our approach improves considerably the reliability, by reducing the key factors, the area costs and fault tolerance probability.

Keywords: Design for reliability, design for testability, fault tolerance, manufacturing yield.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2018

Authors: SreehariRao Patri, K. S. R. KrishnaPrasad

Abstract:

An on chip low drop out voltage regulator that employs elegant compensation scheme is presented in this paper. The novelty in this design is that the device parasitic capacitances are exploited for compensation at different loads. The proposed LDO is designed to provide a constant voltage of 1.2V and is implemented in UMC 180 nano meter CMOS technology. The voltage regulator presented improves stability even at lighter loads and enhances line and load regulation.

Keywords: Analog, LDO, SOC.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2488

Authors: Mahmoud Gilany, Wael Al-Hasawi

Abstract:

Preliminary studies on Kuwait high voltage transmission system show significant increase in the short circuit level at some of the grid substations and some generating stations. This increase results from the growth in the power transmission systems in size and complexity. New generating stations are expected to be added to the system within the next few years. This paper describes the study analysis performed to evaluate the available and potential solutions to control SC levels in Kuwait power system. It also presents a modified planning of the transmission network in order to fulfill this task.

Keywords: Short circuit current, network splitting, fault current limiter, power transmission planning.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3349