Commenced in January 2007
Paper Count: 30184
Self Compensating ON Chip LDO Voltage Regulator in 180nm
Abstract:An on chip low drop out voltage regulator that employs elegant compensation scheme is presented in this paper. The novelty in this design is that the device parasitic capacitances are exploited for compensation at different loads. The proposed LDO is designed to provide a constant voltage of 1.2V and is implemented in UMC 180 nano meter CMOS technology. The voltage regulator presented improves stability even at lighter loads and enhances line and load regulation.
Digital Object Identifier (DOI): doi.org/10.5281/zenodo.1076654Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2159
 B.M. King, "Advantages of using PMOS-type low-dropout linear regulators in battery applications", TI Analog Applications Journal, August2000. pp 16-21.
 G. Patounakis, Y. W. Li, and K. Shepard, "A fully integrated on-chip DC-DC conversion and power management system," IEEE J. Solid-State Circuits, vol. 39, no. 3, pp. 443-451, Mar. 2004.
 K. N. Leung and P. K. T. Mok, "A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency," IEEE J. Solid- StateCircuits, vol. 37, no. 10, pp. 1691-1701, Oct. 2003.
 R. K. Dokaniz and G. A. Rincon-Mora, "Cancellation of load regulation in low drop-out regulators," Electron. Lett., vol. 38, no. 22, pp. 1300- 1302, Oct. 24, 2002.
 V. Gupta, G. Rincon-Mora, and P. Raha, "Analysis and design of monolithic, high PSR, linear regulators for SoC applications," in Proc. IEEE Int. Syst. Chip Conf. , Santa Clara, CA, Sep. 2004, pp. 311-315.
 C. K. Chava and J. Silva-Martinez, "A robust frequency compensation.
 Robert J. Milliken, Jose Silva-Mart├¡nez , " Full On-Chip CMOS Low- Dropout Voltage Regulator" IEEE transactions on circuits and systemsÔÇöi: vol. 54, no. 9, September 2007.