Search results for: CMOS analog to digital converter

Authors: A. Inba Rexy, R. Seyezhai

Abstract:

Through the fast growing technologies, design of power factor correction (PFC) circuit is facing several challenges. In this paper, a two-phase interleaved boost converter with ripple steering technique is proposed. Among the various topologies, Interleaved Boost converter (IBC) is considered as superior due to enriched performance, lower ripple content, compact weight and size. A thorough investigation is presented here for the proposed topology. Simulation study for the IBC has been carried out using MATLAB/SIMULINK. Theoretical analysis and hardware prototype has been performed to validate the results.

Keywords: Interleaved Boost Converter (IBC), Power Factor Correction (PFC), Ripple Steering Technique, Ripple, and Simulation.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3228

Authors: R.K. Behera, S.Behera

Abstract:

In a wind power generator using doubly fed induction generator (DFIG), the three-phase pulse width modulation (PWM) voltage source converter (VSC) is used as grid side converter (GSC) and rotor side converter (RSC). The standard linear control laws proposed for GSC provides not only instablity against comparatively large-signal disturbances, but also the problem of stability due to uncertainty of load and variations in parameters. In this paper, a nonlinear controller is designed for grid side converter (GSC) of a DFIG for wind power application. The nonlinear controller is designed based on the input-output feedback linearization control method. The resulting closed-loop system ensures a sufficient stability region, make robust to variations in circuit parameters and also exhibits good transient response. Computer simulations and experimental results are presented to confirm the effectiveness of the proposed control strategy.

Keywords: Doubly fed Induction Generator, grid side converter, machine side converter, dc link, feedback linearization.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2121

Authors: S. Ganesh, J. Janani, G. Besliya Angel

Abstract:

Photovoltaic (PV) energy is one of the most important renewable energy sources. Maximum Power Point Tracking (MPPT) techniques should be used in photovoltaic systems to maximize the PV panel output power by tracking continuously the maximum power point which depends on panel’s temperature and on irradiance conditions. Incremental conductance control method has been used as MPPT algorithm. The methodology is based on connecting a pulse width modulated dc/dc SEPIC converter, which is controlled by a microprocessor based unit. The SEPIC converter is one of the buck-boost converters which maintain the output voltage as constant irrespective of the solar isolation level. By adjusting the switching frequency of the converter the maximum power point has been achieved. The main difference between the method used in the proposed MPPT systems and other technique used in the past is that PV array output power is used to directly control the dc/dc converter thus reducing the complexity of the system. The resulting system has high efficiency, low cost and can be easily modified. The tracking capability has been verified experimentally with a 10 W solar panel under a controlled experimental setup. The SEPIC converter and their control strategies has been analyzed and simulated using Simulink/Matlab software.

Keywords: Maximum Power Point Tracking, Microprocessor, PV Module, SEPIC Converter.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 5969

Authors: Dipankar Dhabak, Soumya Pandit

Abstract:

This paper presents an adaptive technique for generation of data required for construction of artificial neural network-based performance model of nano-scale CMOS inverter circuit. The training data are generated from the samples through SPICE simulation. The proposed algorithm has been compared to standard progressive sampling algorithms like arithmetic sampling and geometric sampling. The advantages of the present approach over the others have been demonstrated. The ANN predicted results have been compared with actual SPICE results. A very good accuracy has been obtained.

Keywords: CMOS Inverter, Nano-scale, Adaptive Sampling, ArtificialNeural Network

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1609

Authors: Ramamurthy S, Vanaja Ranjan P

Abstract:

A DC-to-DC converter for applications involving a source with widely varying voltage conditions with loads requiring constant voltage from full load down to no load is presented. The switching regulator considered is a Buck converter with Pulse Skipping Modulation control whereby pulses applied to the switch are blocked or released on output voltage crossing a predetermined value. Results of the study on the performance of regulator circuit are presented. The regulator regulates over a wide input voltage range with slightly higher ripple content and good transient response. Input current spectrum indicates a good EMI performance with crowding of components at low frequency range.

Keywords: DC/DC Converter, Pulse Skipping Modulation, Buckregulator, Modulation Factor, Electromagnetic Interference

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2418

Authors: S. Ben Said, K. Ben Saad, M. Benrejeb

Abstract:

This paper deals with bifurcation analyses in current programmed DC/DC Boost converter and exhibition of chaotic behavior. This phenomenon occurs due to variation of a set of the studied circuit parameters (input voltage and a reference current). Two different types of bifurcation paths have been observed as part as part of another bifurcation arising from variation of suitable chosen parameter.

Keywords: Bifurcation, Chaos, Boost converter, Current- programmed control, Initial parameters.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2417

Authors: M. Zamin Khan, Yanjie Wang, R. Raut

Abstract:

A 1V, 1GHz low noise amplifier (LNA) has been designed and simulated using Spectre simulator in a standard TSMC 0.18um CMOS technology.With low power and noise optimization techniques, the amplifier provides a gain of 24 dB, a noise figure of only 1.2 dB, power dissipation of 14 mW from a 1 V power supply.

Keywords:

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2456

Authors: Mustafa Engin Basoğlu, Bekir Çakır

Abstract:

The most important component affecting the efficiency of photovoltaic power systems are solar panels. In other words, efficiency of these systems are significantly affected due to the being low efficiency of solar panel. Thus, solar panels should be operated under maximum power point conditions through a power converter. In this study, design of boost converter has been carried out with maximum power point tracking (MPPT) algorithm which is incremental conductance (Inc-Cond). By using this algorithm, importance of power converter in MPPT hardware design, impacts of MPPT operation have been shown. It is worth noting that initial operation point is the main criteria for determining the MPPT performance. In addition, it is shown that if value of load resistance is lower than critical value, failure operation is realized. For these analyzes, direct duty control is used for simplifying the control.

Keywords: Boost converter, Incremental Conductance (Inc- Cond), MPPT, Solar panel.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3653

Authors: Amin Zabihinejad, Philippe Viarouge

Abstract:

In this paper, a direct power control (DPC) strategies have been investigated in order to control a high power AC/DC converter with time variable load. This converter is composed of a three level three phase neutral point clamped (NPC) converter as rectifier and an H-bridge four quadrant current control converter. In the high power application, controller not only must adjust the desire outputs but also decrease the level of distortions which are injected to the network from the converter. Regarding to this reason and nonlinearity of the power electronic converter, the conventional controllers cannot achieve appropriate responses. In this research, the precise mathematical analysis has been employed to design the appropriate controller in order to control the time variable load. A DPC controller has been proposed and simulated using Matlab/ Simulink. In order to verify the simulation result, a real time simulator- OPAL-RT- has been employed. In this paper, the dynamic response and stability of the high power NPC with variable load has been investigated and compared with conventional types using a real time simulator. The results proved that the DPC controller is more stable and has more precise outputs in comparison with conventional controller.

Keywords: Direct Power Control, Three Level Rectifier, Real Time Simulator, High Power Application.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1970

Authors: T. Brettschneider, C. Dorrer, H. Suy, T. Braun, E. Jung, R. Hoofman, M. Bründel, R. Zengerle, F. Lärmer

Abstract:

We present an integration approach of a CMOS biosensor into a polymer based microfluidic environment suitable for mass production. It consists of a wafer-level-package for the silicon die and laser bonding process promoted by an intermediate hot melt foil to attach the sensor package to the microfluidic chip, without the need for dispensing of glues or underfiller. A very good condition of the sensing area was obtained after introducing a protection layer during packaging. A microfluidic flow cell was fabricated and shown to withstand pressures up to Δp = 780 kPa without leakage. The employed biosensors were electrically characterized in a dry environment.

Keywords: CMOS biosensor, laser bonding, silicon polymer integration, wafer level packaging.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3029

Authors: S. Douss, F. Touati, M. Loulou

Abstract:

A design flow of multi-standard down-conversion CMOS mixers for three modern standards: Global System Mobile, Digital Enhanced Cordless Telephone and Universal Mobile Telecommunication Systems is presented. Three active mixer-s structures are studied. The first is based on the Gilbert cell which gives a tolerable noise figure and linearity with a low conversion gain. The second and third structures use the current bleeding and charge injection techniques in order to increase the conversion gain. An improvement of about 2 dB of the conversion gain is achieved without a considerable degradation of the other characteristics. The models used for noise figure, conversion gain and IIP3 used are studied. This study describes the nature of trade-offs inherent in such structures and gives insights that help in identifying which structure is better for given conditions.

Keywords: Active mixer, Radio-frequency transceiver, Multistandardfront end, Gilbert cell, current bleeding, charge injection.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2490

Authors: Marinka K. Baghdasaryan, Siranush M. Muradyan, Avgen A. Gasparyan

Abstract:

Analytical expressions of the current and angular errors, as well as the frequency characteristics of an induction converter describing the relation with its structural parameters, the core and winding characteristics are obtained. Based on estimation of the dependences obtained, a mathematical problem of parametric optimization is formulated which can successfully be used for investigating and diagnosing an induction converter.

Keywords: Induction converters, magnetic circuit material, current and angular errors, frequency response, mathematical formulation, structural parameters.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1554

Authors: S. Chonsatidjamroen , K-N. Areerak, K-L. Areerak

Abstract:

This paper presents the averaging model of a buck converter derived from the generalized state-space averaging method. The sliding mode control is used to regulate the output voltage of the converter and taken into account in the model. The proposed model requires the fast computational time compared with those of the full topology model. The intensive time-domain simulations via the exact topology model are used as the comparable model. The results show that a good agreement between the proposed model and the switching model is achieved in both transient and steady-state responses. The reported model is suitable for the optimal controller design by using the artificial intelligence techniques.

Keywords: Generalized state-space averaging method, buck converter, sliding mode control, modeling, simulation.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2990

Authors: P.K. Sharma, B. Bhargava, S. Akashe

Abstract:

Power dissipation due to leakage current in the digital circuits is a biggest factor which is considered specially while designing nanoscale circuits. This paper is exploring the ideas of reducing leakage current in static CMOS circuits by stacking the transistors in increasing numbers. Clearly it means that the stacking of OFF transistors in large numbers result a significant reduction in power dissipation. Increase in source voltage of NMOS transistor minimizes the leakage current. Thus stacking technique makes circuit with minimum power dissipation losses due to leakage current. Also some of digital circuits such as full adder, D flip flop and 6T SRAM have been simulated in this paper, with the application of reduction technique on ‘cadence virtuoso tool’ using specter at 45nm technology with supply voltage 0.7V.

Keywords: Stack, 6T SRAM cell, low power, threshold voltage

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3421

Authors: Srikanta Bose, S.K. Mazumder

Abstract:

In the present simulation work, an attempt is made to study the switching dynamics of an optically controlled 4HSiC thyristor power semiconductor device with the use of GaAs optically triggered power transistor. The half-cell thyristor has the forward breakdown of 200 V and reverse breakdown of more than 1000 V. The optically controlled thyristor has a rise time of 0.14 μs and fall time of 0.065 μs. The turn-on and turn-off delays are 0.1 μs and 0.06 μs, respectively. In addition, this optically controlled thyristor is used as a control switch for the DC-DC Boost converter. The pn-diode used for the converter has the forward drop of 2.8 V and reverse breakdown of around 400 V.

Keywords: 4H-SiC, Boost converter, Optical triggering, Power semiconductor device, thyristor.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1963

Authors: Kittipong Tripetch

Abstract:

This paper proposes for the first time symbolic formula of the power spectrum of CMOS Cross Couple Oscillator and its modified circuit. Many principles existed to derived power spectrum in microwave textbook such as impedance, admittance parameters, ABCD, H parameters, etc. It can be compared by graph of power spectrum which methodology is the best from the point of view of practical measurement setup such as condition of impedance parameter which used superposition of current to derived (its current injection at the other port of the circuit is zero, which is impossible in reality). Four graphs of impedance parameters of cross couple oscillator are proposed. After that four graphs of scattering parameters of CMOS cross coupled oscillator will be shown.

Keywords: Optimization, power spectrum, impedance parameter, scattering parameter.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1547

Authors: S. S. Deswal, Ratna Dahiya, D. K. Jain

Abstract:

Process control and energy conservation are the two primary reasons for using an adjustable speed drive. However, voltage sags are the most important power quality problems facing many commercial and industrial customers. The development of boost converters has raised much excitement and speculation throughout the electric industry. Now utilities are looking to these devices for performance improvement and reliability in a variety of areas. Examples of these include sags, spikes, or transients in supply voltage as well as unbalanced voltages, poor electrical system grounding, and harmonics. In this paper, simulations results are presented for the verification of the proposed boost converter topology. Boost converter provides ride through capability during sag and swell. Further, input currents are near sinusoidal. This eliminates the need of braking resistor also.

Keywords: Adjustable speed drive, power quality, boost converter, ride through capabilities.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1696

Authors: Driss Kettani

Abstract:

In this paper, we shed light on the “Digital Divide 2.0,” which we see as COVID-19’s version of the digital divide. We believe that “fighting” against digital divide 2.0 necessitates for a country to be seriously advanced in the global digital transformation that is, naturally, a complex, delicate, costly and long-term process. We build an argument supporting our assumption and, from there, we present the foundations of a computational framework to guide and streamline digital transformation at all levels.

Keywords: Digital divide 2.0, digital transformation, ICTs for development, computational outcomes assessment.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 426

Authors: Arash Azizi Mazreah, Mohammad Reza Sahebi, Mohammad T. Manzuri Shalmani

Abstract:

To help overcome limits to the density of conventional SRAMs and leakage current of SRAM cell in nanoscaled CMOS technology, we have developed a four-transistor SRAM cell. The newly developed CMOS four-transistor SRAM cell uses one word-line and one bit-line during read/write operation. This cell retains its data with leakage current and positive feedback without refresh cycle. The new cell size is 19% smaller than a conventional six-transistor cell using same design rules. Also the leakage current of new cell is 60% smaller than a conventional sixtransistor SRAM cell. Simulation result in 65nm CMOS technology shows new cell has correct operation during read/write operation and idle mode.

Keywords: SRAM Cell, leakage current, cell area.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1765

Authors: Janos Hamar, Peter Bartal, Daniel T. Sepsi

Abstract:

Consumer electronics are pervasive. It is impossible to imagine a household or office without DVD players, digital cameras, printers, mobile phones, shavers, electrical toothbrushes, etc. All these devices operate at different voltage levels ranging from 1.8 to 20 VDC, in the absence of universal standards. The voltages available are however usually 120/230 VAC at 50/60 Hz. This situation makes an individual electrical energy conversion system necessary for each device. Such converters usually involve several conversion stages and often operate with excessive losses and poor reliability. The aim of the project presented in this paper is to design and implement a multi-channel DC/DC converter system, customizing the output voltage and current ratings according to the requirements of the load. Distributed, multi-agent techniques will be applied for the control of the DC/DC converters.

Keywords: DC/DC converter, energy efficiency, multi-agentcontrol, parallel converters.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1446

Authors: Jose A. Pomilio, Olavo Bet, Mateus P. Vieira

Abstract:

The power converter that feeds high-frequency, highvoltage transformers must be carefully designed due to parasitic components, mainly the secondary winding capacitance and the leakage inductance, that introduces resonances in relatively lowfrequency range, next to the switching frequency. This paper considers applications in which the load (resistive) has an unpredictable behavior, changing from open to short-circuit condition faster than the output voltage control loop could react. In this context, to avoid overvoltage and over current situations, that could damage the converter, the transformer or the load, it is necessary to find an operation point that assure the desired output voltage in spite of the load condition. This can done adjusting the frequency response of the transformer adding an external inductance, together with selecting the switching frequency to get stable output voltage independently of the load.

Keywords: High-voltage transformer, Resonant converter, Softcommutation.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3068

Authors: Abdelaziz Sahbani, Kamel Ben Saad, Mohamed Benrejeb

Abstract:

This paper proposes a Fuzzy Sliding Mode Control (FSMC) as a control strategy for Buck-Boost DC-DC converter. The proposed fuzzy controller specifies changes in the control signal based on the knowledge of the surface and the surface change to satisfy the sliding mode stability and attraction conditions. The performances of the proposed fuzzy sliding controller are compared to those obtained by a classical sliding mode controller. The satisfactory simulation results show the efficiency of the proposed control law which reduces the chattering phenomenon. Moreover, the obtained results prove the robustness of the proposed control law against variation of the load resistance and the input voltage of the studied converter.

Keywords: Buck Boost converter, Sliding Mode Control, Fuzzy Sliding Mode Control, robustness, chattering.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2760

Authors: Y. A. Mahmood, A. Ahmadi, R. Karim, U. Kumar, A.K. Verma, N. Fransson

Abstract:

The purpose of this paper isunavailability of the two main types of conveSwedish traction power supply (TPS) system, i.e.static converter. The number of outages and the ouused to analyze and compare the unavailability oconverters. The mean cumulative function (MCF)analyze the number of outages and the unavailabthe forced outage rate (FOR) concept has been uoutage rates. The study shows that the outagesfailure occur at a constant rate by calendar timconverter stations, while very few stations havedecreasing rate. It has also been found that the stata higher number of outages and a higher outage ratcompared to the rotary converter types. The resultsthat combining the number of outages and the fgives a better view of the converters performasupport for the maintenance decision. In fact, usingdoes not reflect reality. Comparing these two indein identifying the areas where extra resources are maintenance planning and where improvementsoutage in the TPS system.KeywordsFrequency Converter, Forced OuCumulative Function, Traction Power Supply, ESystems.

Keywords: Frequency Converter, Forced Outage Rate, Mean Cumulative Function, Traction Power Supply, Electrified Railway Systems.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2216

Authors: Rishikesh Pandey, Maneesha Gupta

Abstract:

A new low-voltage floating gate MOSFET (FGMOS) based squarer using square law characteristic of the FGMOS is proposed in this paper. The major advantages of the squarer are simplicity, rail-to-rail input dynamic range, low total harmonic distortion, and low power consumption. The proposed circuit is biased without body effect. The circuit is designed and simulated using SPICE in 0.25μm CMOS technology. The squarer is operated at the supply voltages of ±0.75V . The total harmonic distortion (THD) for the input signal 0.75Vpp at 25 KHz, and maximum power consumption were found to be less than 1% and 319μW respectively.

Keywords: Analog signal processing, floating gate MOSFETs, low-voltage, Spice, squarer.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1987

Authors: Spyridon Nikolaidis

Abstract:

A modeling approach for CMOS gates is presented based on the use of the equivalent inverter. A new model for the inverter has been developed using a simplified transistor current model which incorporates the nanoscale effects for the planar technology. Parametric expressions for the output voltage are provided as well as the values of the output and supply current to be compatible with the CCS technology. The model is parametric according the input signal slew, output load, transistor widths, supply voltage, temperature and process. The transistor widths of the equivalent inverter are determined by HSPICE simulations and parametric expressions are developed for that using a fitting procedure. Results for the NAND gate shows that the proposed approach offers sufficient accuracy with an average error in propagation delay about 5%.

Keywords: CMOS gate modeling, Inverter modeling, transistor current model, timing model.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2027

Authors: AL.AL, M. B. I. Reaz, S. M. A. Motakabber, Mohd Alauddin Mohd Ali

Abstract:

Nowadays it is a trend for electronic circuit designers to integrate all system components on a single-chip. This paper proposed the design of a single-chip proportional to absolute temperature (PTAT) sensor including a voltage reference circuit using CEDEC 0.18m CMOS Technology. It is a challenge to design asingle-chip wide range linear response temperature sensor for many applications. The channel widths between the compensation transistor and the reference transistor are critical to design the PTAT temperature sensor circuit. The designed temperature sensor shows excellent linearity between -100°C to 200° and the sensitivity is about 0.05mV/°C. The chip is designed to operate with a single voltage source of 1.6V.

Keywords: PTAT, single-chip circuit, linear temperature sensor, CMOS technology.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3431

Authors: S. Venkateswaran, C. Mallika Parveen

Abstract:

The fluid flow and the properties of the hydraulic fluid inside a torque converter are the main topics of interest in this research. The primary goal is to investigate the applicability of various viscous fluids inside the torque converter. The Taguchi optimization method is adopted to analyse the fluid flow in a torque converter from a design perspective. Calculations are conducted in maximizing the pressure since greater the pressure, greater the torque developed. Using the values of the S/N ratios obtained, graphs are plotted. Computational Fluid Dynamics (CFD) analysis is also conducted.

Keywords: Hydraulic fluid, Taguchi's method, optimization, pressure, torque.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3079

Authors: Omid Mirmotahari, Yngvar Berg, Ahmad Habibizad Navin

Abstract:

Reversible logic is becoming more and more prominent as the technology sets higher demands on heat, power, scaling and stability. Reversible gates are able at any time to "undo" the current step or function. Multiple-valued logic has the advantage of transporting and evaluating higher bits each clock cycle than binary. Moreover, we demonstrate in this paper, combining these disciplines we can construct powerful multiple-valued reversible logic structures. In this paper a reversible block implemented by pseudo floatinggate can perform AD-function and a DA-function as its reverse application.

Keywords: Reversible logic, bi-directional, Pseudo floating-gate(PFG), multiple-valued logic (MVL).

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1604

Authors: Yngvar Berg, Mehdi Azadmehr

Abstract:

In this paper we present a linear autozeroing ultra lowvoltage amplifier. The autozeroing performed by all ULV circuits is important to reduce the impact of noise and especially avoid power supply noise in mixed signal low-voltage CMOS circuits. The simulated data presented is relevant for a 90nm TSMC CMOS process.

Keywords: Low-voltage, trans conductance amplifier, linearity, floating-gate.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1384

Authors: Agord M. Pinto Jr., Yuzo Iano, Leandro T. Manera, Raphael R. N. Souza

Abstract:

This paper describes an optimization tool-based design strategy for a Current Mode Logic CML divide-by-2 circuit. Representing a building block for output frequency generation in a RFID protocol based-frequency synthesizer, the circuit was designed to minimize the power consumption for driving of multiple loads with unbalancing (at transceiver level). Implemented with XFAB XC08 180 nm technology, the circuit was optimized through MunEDA WiCkeD tool at Cadence Virtuoso Analog Design Environment ADE.

Keywords: Divide-by-2 circuit, CMOS technology, PLL phase locked-loop, optimization tool, CML current mode logic, RF transceiver.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2128