Search results for: high voltage circuit breakers

Authors: Ramamurthy S, Vanaja Ranjan P

Abstract:

A DC-to-DC converter for applications involving a source with widely varying voltage conditions with loads requiring constant voltage from full load down to no load is presented. The switching regulator considered is a Buck converter with Pulse Skipping Modulation control whereby pulses applied to the switch are blocked or released on output voltage crossing a predetermined value. Results of the study on the performance of regulator circuit are presented. The regulator regulates over a wide input voltage range with slightly higher ripple content and good transient response. Input current spectrum indicates a good EMI performance with crowding of components at low frequency range.

Keywords: DC/DC Converter, Pulse Skipping Modulation, Buckregulator, Modulation Factor, Electromagnetic Interference

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Authors: Zdeňka Dostálová, David Matoušek, Bohumil Brtnik

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As there are also graph methods of circuit analysis in addition to algebraic methods, it is, in theory, clearly possible to carry out an analysis of a whole switched circuit in two-phase switching exclusively by the graph method as well. This article deals with two methods of full-graph solving of switched circuits: by transformation graphs and by two-graphs. It deals with the circuit switched capacitors and the switched current, too. All methods are presented in an equally detailed steps to be able to compare.

Keywords: Switched capacitors of two phases, switched currents of two phases, transformation graph, two-graph, Mason's formula, voltage transfer, summary graph.

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Authors: M. A. Abd-Allah, A. Said, Ebrahim A. Badran

Abstract:

Worldwide many electrical equipment insulation failures have been reported caused by switching operations, while those equipments had previously passed all the standard tests and complied with all quality requirements. The problem is mostly associated with high-frequency overvoltages generated during opening or closing of a switching device. The transients generated during switching operations in a Gas Insulated Substation (GIS) are associated with high frequency components in the order of few tens of MHz. The frequency spectrum of the VFTO generated in the 220/66 kV Wadi-Hoff GIS is analyzed using Fast Fourier Transform technique. The main frequency with high voltage amplitude due to the operation of disconnector (DS5) is 5 to 10 MHz, with the highest amplitude at 9 MHz. The main frequency with high voltage amplitude due to the operation of circuit breaker (CB5) is 1 to 25 MHz, with the highest amplitude at 2 MHz. Mitigating techniques damped the oscillating frequencies effectively. The using of cable terminal reduced the frequency oscillation effectively than that of OHTL terminal. The using of a shunt capacitance results in vanishing the high frequency components. Ferrite rings reduces the high frequency components effectively especially in the range 2 to 7 MHz. The using of RC and RL filters results in vanishing the high frequency components.

Keywords: GIS, VFTO, Mitigation Techniques, Frequency spectrum, FFT, EMTP/ATP.

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Authors: Subir Das, Tuhin Subhra Sarkar, Badal Chakraborty

Abstract:

Differing from the structure of traditional parallel plate capacitive sensor a semi cylindrical capacitive sensor has been introduced in this present work to measure the soil moisture conveniently. Here, the numerical analysis method to evaluate the capacitance from the semi-cylindrical capacitive sensor is analyzed and discussed. The changes of capacitance with the variation of soil moisture obtained linear in the nano farad range (nF) and which converted into voltage variation by using proper signal conditioning circuit. Experimental results depict the satisfactory performance of the sensor for measurement of soil moisture in the range of 0 to 70%. We investigated the linearity of 4% of FSO and sensitivity of 70 mV/unit percentage changes in soil moisture level (DB).

Keywords: Semi cylindrical Capacitive Sensor, Capacitance to Voltage converter Circuit, Soil Moisture.

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Authors: Montree Kumngern, Kobchai Dejhan

Abstract:

Versatile dual-mode class-AB CMOS four-quadrant analog multiplier circuit is presented. The dual translinear loops and current mirrors are the basic building blocks in realization scheme. This technique provides; wide dynamic range, wide-bandwidth response and low power consumption. The major advantages of this approach are; its has single ended inputs; since its input is dual translinear loop operate in class-AB mode which make this multiplier configuration interesting for low-power applications; current multiplying, voltage multiplying, or current and voltage multiplying can be obtainable with balanced input. The simulation results of versatile analog multiplier demonstrate a linearity error of 1.2 %, a -3dB bandwidth of about 19MHz, a maximum power consumption of 0.46mW, and temperature compensated. Operation of versatile analog multiplier was also confirmed through an experiment using CMOS transistor array.

Keywords: Class-AB, dual-mode CMOS analog multiplier, CMOS analog integrated circuit, CMOS translinear integrated circuit.

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Authors: M. R. Dolatian, A. Jalilian

Abstract:

The behavior of three phase five leg transformer under voltage sag is studied in this paper. This paper proposes a simple, practical model of a three phase-five leg, saturated transformer with accurate performance. Transformer saturation is produced when the voltage sag is recovered and it causes inrush current in transformer. Effects of voltage sag depth, duration and initial point on wave have been analyzed in this paper. Initial point on wave can produce maximum inrush current in five leg transformers while comparing with three leg transformers. The magnetic circuit symmetry of five leg transformer produces the more symmetrical shape of inrush current curves versus initial point on wave and sag duration than three leg transformer. The simulations show that current peak has a periodical dependence on sag duration and linear dependence on sag depth. Inrush current that is produced in three phase five leg transformer is higher than three phase three leg transformer.

Keywords: Inrush current, three phase five leg transformer, saturation, voltage sag.

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Authors: Raj Kumar Rajak, Bharat Mishra

Abstract:

Bio-batteries represent an entirely new long-term, reasonable, reachable, and eco-friendly approach to generation of sustainable energy. In the present experimental work, we have studied the effect of the generation of power by bio-battery using different electrode pairs. The tests show that it is possible to generate electricity using cow’s urine as an electrolyte. C-Mg electrode pair shows maximum Voltage and Short Circuit Current (SCC), while C-Zn electrode pair shows less Open Circuit Voltage (OCV) and SCC. By the studies of cow urine and different electrodes, it is found that C-Zn electrode battery is more economical. The cow urine battery with C-Zn electrode provides maximum power (707.4 mW) and durability (up to 145 h). This result shows that the bio-batteries have the potency to full fill the need of electricity demand for lower energy equipment.

Keywords: Bio-batteries, cow’s urine, electrodes, non-conventional.

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Authors: Ahmed Shariful Alam, Abu Hena M. Mustafa Kamal, M. Abdul Rahman, M. Nasmus Sakib Khan Shabbir, Atiqul Islam

Abstract:

According to the rules of quantum mechanics there is a non-vanishing probability of for an electron to tunnel through a thin insulating barrier or a thin capacitor which is not possible according to the laws of classical physics. Tunneling of electron through a thin insulating barrier or tunnel junction is a random event and the magnitude of current flowing due to the tunneling of electron is very low. As the current flowing through a Single Electron Transistor (SET) is the result of electron tunneling through tunnel junctions of its source and drain the supply voltage requirement is also very low. As a result, the power consumption across a Single Electron Transistor is ultra-low in comparison to that of a MOSFET. In this paper simulations have been done with PSPICE for an inverter built with both SETs and MOSFETs. 35mV supply voltage was used for a SET built inverter circuit and the supply voltage used for a CMOS inverter was 3.5V.

Keywords: ITRS, enhancement type MOSFET, island, DC analysis, transient analysis, power consumption, background charge co-tunneling.

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Authors: Khaled M. El Naggar

Abstract:

This paper introduces a digital method for fault section identification in transmission lines. The method uses digital set of the measured short circuit current to locate faults in electrical power systems. The digitized current is used to construct a set of overdetermined system of equations. The problem is then constructed and solved using the proposed digital optimization technique to find the fault distance. The proposed optimization methodology is an application of simulated annealing optimization technique. The method is tested using practical case study to evaluate the proposed method. The accurate results obtained show that the algorithm can be used as a powerful tool in the area of power system protection.

Keywords: Optimization, estimation, faults, measurement, high voltage, simulated annealing.

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Authors: Haridas Kuruveettil, Dongning Zhao, Cheong Jia Hao, Minkyu Je

Abstract:

We present the design of Analog front end (AFE) low noise pre-amplifier implemented in a high voltage 0.18-µm CMOS technology for  a three dimensional ultrasound  bio microscope (3D UBM) application. The fabricated chip has 4X16 pre-amplifiers implemented to interface   a 2-D array of    high frequency capacitive micro-machined ultrasound transducers (CMUT). Core AFE cell consists of a high-voltage pulser in the transmit path, and a low-noise transimpedance amplifier in the receive path. Proposed system offers a high image resolution by the use of high frequency CMUTs with associated high performance imaging electronics integrated together.  Performance requirements and the design methods of the high bandwidth transimpedance amplifier are described in the paper. A single cell of transimpedance (TIA) amplifier and the bias circuit occupies a silicon area of 250X380 µm² and the full chip occupies a total silicon area of 10x6.8 mm².

Keywords: Ultrasound, analog front end, medical imaging, beam forming, biomicroscope, transimpedance gain.

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Authors: Mohsen Bagheri, Ahmad Afifi

Abstract:

This paper presents a new method for read out of the piezoresistive accelerometer sensors. The circuit works based on Instrumentation amplifier and it is useful for reducing offset In Wheatstone Bridge. The obtained gain is 645 with 1μv/°c Equivalent drift and 1.58mw power consumption. A Schmitt trigger and multiplexer circuit control output node. a high speed counter is designed in this work .the proposed circuit is designed and simulated In 0.18μm CMOS technology with 1.8v power supply.

Keywords: Piezoresistive accelerometer, zero offset, Schmitt trigger, bidirectional reversible counter

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Authors: Chih Chin Yang, Chih Yu Lee, Jing Yi Wang, Mei Zhen Xue, Chia Yueh Wu

Abstract:

A well-defined frequency multiple dividing (FMD) circuit using a resonant model is presented in this research. The basic component of a frequency multiple divider as used in a resonant model is established by compositing a well-defined resonant effect of negative differential resistance (NDR) characteristics which possesses a wider operational region and high operational current at a bias voltage of about 1.15 V. The resonant model is then applied in the frequency dividing circuit with the above division ratio (R_D) of 200 at the signal input of middle frequency. The division ratio also exists at the input of a low frequency signal.

Keywords: Divider, frequency, resonant model.

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Authors: Z. Dibi, F. Djeffal, N. Lakhdar

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In this paper, we have developed an explicit analytical drain current model comprising surface channel potential and threshold voltage in order to explain the advantages of the proposed Gate Stack Double Diffusion (GSDD) MOSFET design over the conventional MOSFET with the same geometric specifications that allow us to use the benefits of the incorporation of the high-k layer between the oxide layer and gate metal aspect on the immunity of the proposed design against the self-heating effects. In order to show the efficiency of our proposed structure, we propose the simulation of the power chopper circuit. The use of the proposed structure to design a power chopper circuit has showed that the (GSDD) MOSFET can improve the working of the circuit in terms of power dissipation and self-heating effect immunity. The results so obtained are in close proximity with the 2D simulated results thus confirming the validity of the proposed model.

Keywords: Double-Diffusion, modeling, MOSFET, power.

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Authors: Naga Brahmendra Yadav Gorla, Dr. Lakshmi Narasamma N

Abstract:

This paper proposes an active soft-switching circuit for bridge converters aiming to improve the power conversion efficiency. The proposed circuit achieves loss-less switching for both main and auxiliary switches without increasing the main switch current/voltage rating. A winding coupled to the primary of power transformer ensures ZCS for the auxiliary switches during their turn-off. A 350 W, 100 kHz phase shifted full bridge (PSFB) converter is built to validate the analysis and design. Theoretical loss calculations for proposed circuit is presented. The proposed circuit is compared with passive soft switched PSFB in terms of efficiency and loss in duty cycle.

Keywords: soft switching, passive soft switching, ZVS, ZCS, PSFB.

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Authors: G. Renuka Devi

Abstract:

This paper analyzes the experimental investigation of indirect field oriented control of Field Programmable Gate Array (FPGA) based five-phase induction motor drive. A detailed d-q modeling and Space Vector Pulse Width Modulation (SVPWM) technique of 5-phase drive is elaborated in this paper. In the proposed work, the prototype model of 1 hp 5-phase Voltage Source Inverter (VSI) fed drive is implemented in hardware. SVPWM pulses are generated in FPGA platform through Very High Speed Integrated Circuit Hardware Description Language (VHDL) coding. The experimental results are observed under different loading conditions and compared with simulation results to validate the simulation model.

Keywords: Five-phase induction motor drive, field programmable gate array, indirect field oriented control, multi-phase, space vector pulse width modulation, voltage source inverter, very high speed integrated circuit hardware description language.

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Authors: Oleksandr Krykunov

Abstract:

The source voltage of high-power fuel cell shows strong load dependence at comparatively low voltage levels. In order to provide the voltage of 750V on the DC-link for feeding electrical energy into the mains via a three phase inverter a step-up converter with a large step-up ratio is required. The output voltage of this DC/DC-converter must be stabile during variations of the load current and the voltage of the fuel cell. This paper presents the methods and results of the calculation of the efficiency and the expense for the realization for the circuits of the DC/DC-converter that meet these requirements.

Keywords: DC/DC-converter, calculation, efficiency, fuel cell.

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Authors: Arun Kumar Datta, M. A. Ansari, N. R. Mondal, B. V. Raghavaiah, Manisha Dubey, Shailendra Jain

Abstract:

This study is carried out to understand the effects of Static frequency converter (SFC) on large machine. SFC has a feature of four quadrant operations. By virtue of this it can be implemented to run a synchronous machine either as a motor or alternator. This dual mode operation helps a single machine to start & run as a motor and then it can be converted as an alternator whenever required. One such dual purpose machine is taken here for study. This machine is installed at a laboratory carrying out short circuit test on high power electrical equipment. SFC connected with this machine is broadly described in this paper. The same SFC has been modeled with the MATLAB/Simulink software. The data applied on this virtual model are the actual parameters from SFC and synchronous machine. After running the model, simulated machine voltage and current waveforms are validated with the real measurements. Processing of these waveforms is done through Fast Fourier Transformation (FFT) which reveals that the waveforms are not sinusoidal rather they contain number of harmonics. These harmonics are the major cause of generating shaft voltage. It is known that bearings of electrical machine are vulnerable to current flow through it due to shaft voltage. A general discussion on causes of shaft voltage in perspective with this machine is presented in this paper.

Keywords: Alternators, AC-DC power conversion, capacitive coupling, electric discharge machining, frequency converter, Fourier transforms, inductive coupling, simulation, Shaft voltage, synchronous machines, static excitation, thyristor.

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Authors: B. Sathyanandhi, P. M. Balasubramaniam

Abstract:

This paper presents Buck-Boost converter topology to maintain the input power factor by using the power factor stage control and regulation stage control. Suppose, if we are using the RL load the power factor will be reduced due to the presence of total harmonic distortion in the current wave. To improve the power factor the current waveform should follow the fundamental component of the voltage waveform. These can be achieved by using the high -frequency power converter. Based on the resonant circuit the converter is able to perform the function of Buck, Boost, and buck-boost converter. Here ,we have used Buck-Boost converter, because, the buck-boost converter has more advantages than the boost converter. Here the switching action of the power converter can  take place by using the external zero comparator PFC stage control. The power converter consisting of the resonant  circuit which is used to control the output voltage gain of the converter. The power converter is operated at a very high switching frequency in the range of 400KHz in order to overcome the switching losses of the power converter. Due to  presence of high switching frequency, the power factor will improve. Therefore, the total harmonics distortion present in the current waveform has also reduced. These results has generated in the form of simulation by using MATLAB/SIMULINK software.  Similar to the Buck and Boost converters, the operation of the Buck-Boost has best understood, in terms of the inductor's "reluctance" for allowing rapid change in current, which also reduces the Total Harmonic Distortion (THD) in the input current waveform, which can improve the input Power factor, based on the type of load used.

Keywords: Buck-boost converter, High switching frequency, Power factor correction, power factor correction stage Regulation stage, Total harmonic distortion (THD).

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Authors: Chih Chin Yang, Yen Chun Lin, Hsiao Hsuan Cheng

Abstract:

Three similar negative differential resistance (NDR) profiles with both high peak to valley current density ratio (PVCDR) value and high peak current density (PCD) value in unity resonant tunneling electronic circuit (RTEC) element is developed in this paper. The PCD values and valley current density (VCD) values of the three NDR curves are all about 3.5 A and 0.8 A, respectively. All PV values of NDR curves are 0.40 V, 0.82 V, and 1.35 V, respectively. The VV values are 0.61 V, 1.07 V, and 1.69 V, respectively. All PVCDR values reach about 4.4 in three NDR curves. The PCD value of 3.5 A in triple PVCDR RTEC element is better than other resonant tunneling devices (RTD) elements. The high PVCDR value is concluded the lower VCD value about 0.8 A. The low VCD value is achieved by suitable selection of resistors in triple PVCDR RTEC element. The low PV value less than 1.35 V possesses low power dispersion in triple PVCDR RTEC element. The designed multiple value logical level (MVLL) system using triple PVCDR RTEC element provides equidistant logical level. The logical levels of MVLL system are about 0.2 V, 0.8 V, 1.5 V, and 2.2 V from low voltage to high voltage and then 2.2 V, 1.3 V, 0.8 V, and 0.2 V from high voltage back to low voltage in half cycle of sinusoid wave. The output level of four levels MVLL system is represented in 0.3 V, 1.1 V, 1.7 V, and 2.6 V, which satisfies the NMP condition of traditional two-bit system. The remarkable logical characteristic of improved MVLL system with paralleled capacitor are with four significant stable logical levels about 220 mV, 223 mV, 228 mV, and 230 mV. The stability and articulation of logical levels of improved MVLL system are outstanding. The average holding time of improved MVLL system is approximately 0.14 μs. The holding time of improved MVLL system is fourfold than of basic MVLL system. The function of additional capacitor in the improved MVLL system is successfully discovered.

Keywords: Capacitance, Logical level, Constant current source

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Authors: Sudha Bansal, Lalit Mohan Saini, Dheeraj Joshi

Abstract:

The controller is used to improve the dynamic performance of DC-DC converter by achieving a robust output voltage against load disturbances. This paper presents the performance of PI and Fuzzy controller for a phase- shifted zero-voltage switched full-bridge PWM (ZVS FB- PWM) converters with a closed loop control. The proposed converter is regulated with minimum overshoot and good stability. In this paper phase-shift control method is used as an effective tool to reduce switching losses and duty cycle losses. A 1kW/100KHz dc/dc converter is simulated and analyzed using MATLAB. The circuit is simulated for static and dynamic load (DC motor). It has been observed that performance of converter with fuzzy controller is better than that of PI controller. An efficiency comparison of the converter with a reported topology has also been carried out.

Keywords: Full-bridge converter, phase-shifted, synchronous rectifier (SR), zero-voltage switching (ZVS).

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Authors: Mansour I. Abbadi, Abdel-Rahman M. Jaradat

Abstract:

In this paper, a technique is proposed to implement an artificial voltage-controlled capacitance or inductance which can replace the well-known varactor diode in many applications. The technique is based on injecting the current of a voltage-controlled current source onto a fixed capacitor or inductor. Then, by controlling the transconductance of the current source by an external bias voltage, a voltage-controlled capacitive or inductive reactance is obtained. The proposed voltage-controlled reactance devices can be designed to work anywhere in the frequency spectrum. Practical circuits for the proposed voltage-controlled reactances are suggested and simulated.

Keywords: voltage-controlled capacitance, voltage-controlled inductance, varactor diode, variable transconductance.

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Authors: Mohammed Amroune, Hadi Sebaa, Tarek Bouktir

Abstract:

Reactive power limit of power system is one of the major causes of voltage instability. The only way to save the system from voltage instability is to reduce the reactive power load or add additional reactive power to reaching the point of voltage collapse. In recent times, the application of FACTS devices is a very effective solution to prevent voltage instability due to their fast and very flexible control. In this paper, voltage stability assessment with SVC and TCSC devices is investigated and compared in the modified IEEE 30-bus test system. The fast voltage stability indicator (FVSI) is used to identify weakest bus and to assess the voltage stability of power system.

Keywords: SVC, TCSC, Voltage stability, Fast Voltage Stability Index (FVSI), Reactive power.

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Authors: Mohd. Hasan, Ajmal Kafeel, S. D. Pable

Abstract:

Ultra-low-power (ULP) circuits have received widespread attention due to the rapid growth of biomedical applications and Battery-less Electronics. Subthreshold region of transistor operation is used in ULP circuits. Major research challenge in the subthreshold operating region is to extract the ULP benefits with minimal degradation in speed and robustness. Process, Voltage and Temperature (PVT) variations significantly affect the performance of subthreshold circuits. Designed performance parameters of ULP circuits may vary largely due to temperature variations. Hence, this paper investigates the effect of temperature variation on device and circuit performance parameters at different biasing voltages in the subthreshold region. Simulation results clearly demonstrate that in deep subthreshold and near threshold voltage regions, performance parameters are significantly affected whereas in moderate subthreshold region, subthreshold circuits are more immune to temperature variations. This establishes that moderate subthreshold region is ideal for temperature immune circuits.

Keywords: Subthreshold, temperature variations, ultralow power.

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Authors: V. Pizarro-Carmona, S. Castano-Solis, M. Cortés-Carmona, J. Fraile-Ardanuy, D. Jimenez-Bermejo

Abstract:

The purpose of this article is to optimize the Equivalent Electric Circuit Model (EECM) of different orders to obtain greater precision in the modeling of Li-ion battery packs. Optimization includes considering circuits based on 1RC, 2RC and 3RC networks, with a dependent voltage source and a series resistor. The parameters are obtained experimentally using tests in the time domain and in the frequency domain. Due to the high non-linearity of the behavior of the battery pack, Genetic Algorithm (GA) was used to solve and optimize the parameters of each EECM considered (1RC, 2RC and 3RC). The objective of the estimation is to minimize the mean square error between the measured impedance in the real battery pack and those generated by the simulation of different proposed circuit models. The results have been verified by comparing the Nyquist graphs of the estimation of the complex impedance of the pack. As a result of the optimization, the 2RC and 3RC circuit alternatives are considered as viable to represent the battery behavior. These battery pack models are experimentally validated using a hardware-in-the-loop (HIL) simulation platform that reproduces the well-known New York City cycle (NYCC) and Federal Test Procedure (FTP) driving cycles for electric vehicles. The results show that using GA optimization allows obtaining EECs with 2RC or 3RC networks, with high precision to represent the dynamic behavior of a battery pack in vehicular applications.

Keywords: Li-ion battery packs modeling optimized, EECM, GA, electric vehicle applications.

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Authors: N. Ravi Kumar, R. Kamalakannan

Abstract:

The inherent nature of normal boost converter has more voltage stress across the power electronics switch and ripple. The presented formation of the front end rectifier stage for a photovoltaic (PV) organization is mainly used to give the supply. Further increasing of the solar efficiency is achieved by connecting the zero voltage soft switching boost converter. The zero voltage boost converter is used to convert the low level DC voltage to high level DC voltage. The inherent nature of zero voltage switching boost converter is used to shrink the voltage tension across the power electronics switch and ripple. The input stage allows the determined power point tracking to be used to extract supreme power from the sun when it is available. The hardware setup was implemented by using PIC Micro controller (16F877A).

Keywords: Boost converter, duty cycle, hard switching, MOSFET, maximum power point tracking, photovoltaic, soft switching, zero voltage switching.

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Authors: Ioannis Binas, Marios Moschakis

Abstract:

Electrical faults in transmission and distribution networks can have great impact on the electrical equipment used. Fault effects depend on the characteristics of the fault as well as the network itself. It is important to anticipate the network’s behavior during faults when planning a new equipment installation, as well as troubleshooting. Moreover, working backwards, we could be able to estimate the characteristics of the fault when checking the perceived effects. Different transformer winding connections dominantly used in the Greek power transfer and distribution networks and the effects of 1-phase to neutral, phase-to-phase, 2-phases to neutral and 3-phase faults on different locations of the network were simulated in order to present voltage sag characteristics. The study was performed on a generic network with three steps down transformers on two voltage level buses (one 150 kV/20 kV transformer and two 20 kV/0.4 kV). We found that during faults, there are significant changes both on voltage magnitudes and on phase angles. The simulations and short-circuit analysis were performed using the PSCAD simulation package. This paper presents voltage characteristics calculated for the simulated network, with different approaches on the transformer winding connections during symmetrical and asymmetrical faults on various locations.

Keywords: Phase angle shift, power quality, transformer winding connections, voltage sag propagation.

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Authors: Houda Bdiri Gabbouj, Néjib Hassen, Kamel Besbes

Abstract:

This paper presents a low-voltage low-power differential linear transconductor with near rail-to-rail input swing. Based on the current-mirror OTA topology, the proposed transconductor combines the Flipped Voltage Follower (FVF) technique to linearize the transconductor behavior that leads to class- AB linear operation and the virtual transistor technique to lower the effective threshold voltages of the transistors which offers an advantage in terms of low supply requirement. Design of the OTA has been discussed. It operates at supply voltages of about ±0.8V. Simulation results for 0.18μm TSMC CMOS technology show a good input range of 1Vpp with a high DC gain of 81.53dB and a total harmonic distortion of -40dB at 1MHz for an input of 1Vpp. The main aim of this paper is to present and compare new OTA design with high transconductance, which has a potential to be used in low voltage applications.

Keywords: Amplifier class AB, current mirror, flipped voltage follower, low voltage.

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Authors: Abdelghafour Galadi

Abstract:

In this paper, accurate power MOSFET models including quasi-saturation effect are presented. These models have no internal node voltages determined by the circuit simulator and use one JFET or one depletion mode MOSFET transistors controlled by an “effective” gate voltage taking into account the quasi-saturation effect. The proposed models achieve accurate simulation results with an average error percentage less than 9%, which is an improvement of 21 percentage points compared to the commonly used standard power MOSFET model. In addition, the models can be integrated in any available commercial circuit simulators by using their analytical equations. A description of the models will be provided along with the parameter extraction procedure.

Keywords: Power MOSFET, drift layer, quasi-saturation effect, SPICE model, circuit simulation.

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Authors: Yong Wang, Wang Ling Goh, Jung Hyup Lee, Kevin T. C. Chai, Minkyu Je

Abstract:

This paper presents a resonant-based read-out circuit for capacitive pressure sensors. The proposed read-out circuit consists of an LC oscillator and a counter. The circuit detects the capacitance changes of a capacitive pressure sensor by means of frequency shifts from its nominal operation frequency. The proposed circuit is designed in 0.18m CMOS with an estimated power consumption of 43.1mW. Simulation results show that the circuit has a capacitive resolution of 8.06kHz/fF, which enables it for high resolution pressure detection.

Keywords: Capacitance-to-frequency converter, Capacitive pressure sensor, Digital counter, LC oscillator.

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Authors: Shaharin A. Sulaiman, Mizuan Minhat

Abstract:

This paper presents development of an ignition system using spark electrodes for application in a research explosion vessel. A single spark is aimed to be discharged with quantifiable ignition energy. The spark electrode system would enable study of flame propagation, ignitability of fuel-air mixtures and other fundamental characteristics of flames. The principle of the capacitive spark circuit of ASTM is studied to charge an appropriate capacitance connected across the spark gap through a large resistor by a high voltage from the source of power supply until the initiation of spark. Different spark energies could be obtained mainly by varying the value of the capacitance and the supply current. The spark sizes produced are found to be affected by the spark gap, electrode size, input voltage and capacitance value.

Keywords: Ignition, Spark Electrode, Flame

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