Search results for: Threshold voltage variation.
1984 A Voltage Based Maximum Power Point Tracker for Low Power and Low Cost Photovoltaic Applications
Authors: Jawad Ahmad, Hee-Jun Kim
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This paper describes the design of a voltage based maximum power point tracker (MPPT) for photovoltaic (PV) applications. Of the various MPPT methods, the voltage based method is considered to be the simplest and cost effective. The major disadvantage of this method is that the PV array is disconnected from the load for the sampling of its open circuit voltage, which inevitably results in power loss. Another disadvantage, in case of rapid irradiance variation, is that if the duration between two successive samplings, called the sampling period, is too long there is a considerable loss. This is because the output voltage of the PV array follows the unchanged reference during one sampling period. Once a maximum power point (MPP) is tracked and a change in irradiation occurs between two successive samplings, then the new MPP is not tracked until the next sampling of the PV array voltage. This paper proposes an MPPT circuit in which the sampling interval of the PV array voltage, and the sampling period have been shortened. The sample and hold circuit has also been simplified. The proposed circuit does not utilize a microcontroller or a digital signal processor and is thus suitable for low cost and low power applications.
Keywords: Maximum power point tracker, Sample and hold amplifier, Sampling interval, Sampling period.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 27441983 Multi-threshold Approach for License Plate Recognition System
Authors: Siti Norul Huda Sheikh Abdullah, Farshid Pirahan Siah, Nor Hanisah Haji Zainal Abidin, Shahnorbanun Sahran
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The objective of this paper is to propose an adaptive multi threshold for image segmentation precisely in object detection. Due to the different types of license plates being used, the requirement of an automatic LPR is rather different for each country. The proposed technique is applied on Malaysian LPR application. It is based on Multi Layer Perceptron trained by back propagation. The proposed adaptive threshold is introduced to find the optimum threshold values. The technique relies on the peak value from the graph of the number object versus specific range of threshold values. The proposed approach has improved the overall performance compared to current optimal threshold techniques. Further improvement on this method is in progress to accommodate real time system specification.
Keywords: Multi-threshold approach, license plate recognition system.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 25021982 Threshold Stress of the Soil Subgrade Evaluation for Highway Formations
Authors: Elsa Eka Putri, N.S.V Kameswara Rao, M. A. Mannan
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The objective of this study is to evaluate the threshold stress of the clay with sand subgrade soil. Threshold stress can be defined as the stress level above which cyclic loading leads to excessive deformation and eventual failure. The thickness determination of highways formations using the threshold stress approach is a more realistic assessment of the soil behaviour because it is subjected to repeated loadings from moving vehicles. Threshold stress can be evaluated by plastic strain criterion, which is based on the accumulated plastic strain behaviour during cyclic loadings [1]. Several conditions of the all-round pressure the subgrade soil namely, zero confinement, low all-round pressure and high all-round pressure are investigated. The threshold stresses of various soil conditions are determined. Threshold stress of the soil are 60%, 31% and 38.6% for unconfined partially saturated sample, low effective stress saturated sample, high effective stress saturated sample respectively.Keywords: threshold stress, cyclic loading, pore water pressure.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 25801981 A Semi-Cylindrical Capacitive Sensor Used for Soil Moisture Measurement
Authors: Subir Das, Tuhin Subhra Sarkar, Badal Chakraborty
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Differing from the structure of traditional parallel plate capacitive sensor a semi cylindrical capacitive sensor has been introduced in this present work to measure the soil moisture conveniently. Here, the numerical analysis method to evaluate the capacitance from the semi-cylindrical capacitive sensor is analyzed and discussed. The changes of capacitance with the variation of soil moisture obtained linear in the nano farad range (nF) and which converted into voltage variation by using proper signal conditioning circuit. Experimental results depict the satisfactory performance of the sensor for measurement of soil moisture in the range of 0 to 70%. We investigated the linearity of 4% of FSO and sensitivity of 70 mV/unit percentage changes in soil moisture level (DB).
Keywords: Semi cylindrical Capacitive Sensor, Capacitance to Voltage converter Circuit, Soil Moisture.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 49091980 A Study on Unidirectional Analog Output Voltage Inverter for Capacitive Load
Authors: Sun-Ki Hong, Nam-HeeByeon, Jung-Seop Lee, Tae-Sam Kang
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For Common R or R-L load to apply arbitrary voltage, the bridge traditional inverters don’t have any difficulties by PWM method. However for driving some piezoelectric actuator, arbitrary voltage not a pulse but a steady voltage should be applied. Piezoelectric load is considered as R-C load and its voltage does not decrease even though the applied voltage decreases. Therefore it needs some special inverter with circuit that can discharge the capacitive energy. Especially for unidirectional arbitrary voltage driving like as sine wave, it becomes more difficult problem. In this paper, a charge and discharge circuit for unidirectional arbitrary voltage driving for piezoelectric actuator is proposed. The circuit has charging and discharging switches for increasing and decreasing output voltage. With the proposed simple circuit, the load voltage can have any unidirectional level with tens of bandwidth because the load voltage can be adjusted by switching the charging and discharging switch appropriately. The appropriateness is proved from the simulation of the proposed circuit.
Keywords: DC-DC converter, analog output voltage, sinusoidal drive, piezoelectric load, discharging circuit.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 25031979 Threshold Submergence of Flow over PK Weirs
Authors: A. Javaheri, A. R. Kabiri-Samani
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In this study an extensive experimental research is carried out to develop a better understanding of the effects of Piano Key (PK) weir geometry on weir flow threshold submergence. Experiments were conducted in a 12 m long, 0.4 m wide and 0.7 m deep rectangular glass wall flume. The main objectives were to investigate the effect of the PK weir geometries including the weir length, weir height, inlet-outlet key widths, upstream and downstream apex overhangs, and slopped floors on threshold submergence and study the hydraulic flow characteristics. From the experimental results, a practical formula is proposed to evaluate the flow threshold submergence over PK weirs.Keywords: Model experimentation, flow characteristics, Piano Key weir, threshold submergence.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 21621978 3D Quantum Numerical Simulation of Horizontal Rectangular Dual Metal Gate\Gate All Around MOSFETs
Authors: M. Khaouani, A. Guen-Bouazza, B. Bouazza, Z. Kourdi
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The integrity and issues related to electrostatic performance associated with scaling Si MOSFET bulk sub 10nm channel length promotes research in new device architectures such as SOI, double gate and GAA MOSFET. In this paper, we present some novel characteristic of horizontal rectangular gate\gate all around MOSFETs with dual metal of gate we obtained using SILVACO TCAD tools. We will also exhibit some simulation results we obtained relating to the influence of some parameters variation on our structure, that having a direct impact on their threshold voltage and drain current. In addition, our TFET showed reasonable ION/IOFF ratio of (104) and low drain induced barrier lowering (DIBL) of 39 mV/V.
Keywords: GAA, SILVACO, QUANTUM, MOSFETs.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 28701977 SCR-Stacking Structure with High Holding Voltage for I/O and Power Clamp
Authors: Hyun-Young Kim, Chung-Kwang Lee, Han-Hee Cho, Sang-Woon Cho, Yong-Seo Koo
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In this paper, we proposed a novel SCR (Silicon Controlled Rectifier) - based ESD (Electrostatic Discharge) protection device for I/O and power clamp. The proposed device has a higher holding voltage characteristic than conventional SCR. These characteristics enable to have latch-up immunity under normal operating conditions as well as superior full chip ESD protection. The proposed device was analyzed to figure out electrical characteristics and tolerance robustness in term of individual design parameters (D1, D2, D3). They are investigated by using the Synopsys TCAD simulator. As a result of simulation, holding voltage increased with different design parameters. The holding voltage of the proposed device changes from 3.3V to 7.9V. Also, N-Stack structure ESD device with the high holding voltage is proposed. In the simulation results, 2-stack has holding voltage of 6.8V and 3-stack has holding voltage of 10.5V. The simulation results show that holding voltage of stacking structure can be larger than the operation voltage of high-voltage application.Keywords: ESD, SCR, holding voltage, stack, power clamp.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 20461976 Analysis of SCR-Based ESD Protection Circuit on Holding Voltage Characteristics
Authors: Yong Seo Koo, Jong Ho Nam, Yong Nam Choi, Dae Yeol Yoo, Jung Woo Han
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This paper presents a silicon controller rectifier (SCR) based ESD protection circuit for IC. The proposed ESD protection circuit has low trigger voltage and high holding voltage compared with conventional SCR ESD protection circuit. Electrical characteristics of the proposed ESD protection circuit are simulated and analyzed using TCAD simulator. The proposed ESD protection circuit verified effective low voltage ESD characteristics with low trigger voltage and high holding voltage.
Keywords: ESD (Electro-Static Discharge), SCR (Silicon Controlled Rectifier), holding Voltage.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 37171975 On the Reliability of Low Voltage Network with Small Scale Distributed Generators
Authors: Rade M. Ciric, Nikola Lj.Rajakovic
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Since the 80s huge efforts have been made to utilize renewable energy sources to generate electric power. This paper reports some aspects of integration of the distributed generators into the low voltage distribution networks. An assessment of impact of the distributed generators on the reliability indices of low voltage network is performed. Results obtained from case study using low voltage network, are presented and discussed.Keywords: low voltage network, distributed generation, reliability indices
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 17791974 A Silicon Controlled Rectifier-Based ESD Protection Circuit with High Holding Voltage and High Robustness Characteristics
Authors: Kyoung-il Do, Byung-seok Lee, Hee-guk Chae, Jeong-yun Seo Yong-seo Koo
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In this paper, a Silicon Controlled Rectifier (SCR)-based Electrostatic Discharge (ESD) protection circuit with high holding voltage and high robustness characteristics is proposed. Unlike conventional SCR, the proposed circuit has low trigger voltage and high holding voltage and provides effective ESD protection with latch-up immunity. In addition, the TCAD simulation results show that the proposed circuit has better electrical characteristics than the conventional SCR. A stack technology was used for voltage-specific applications. Consequentially, the proposed circuit has a trigger voltage of 17.60 V and a holding voltage of 3.64 V.Keywords: ESD, SCR, latch-up, power clamp, holding voltage.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 8051973 Performance Enhancement of Analog Voltage Inverter with Adaptive Gain Control for Capacitive Load
Authors: Sun-Ki Hong, Yong-Ho Cho, Ki-Seok Kim, Tae-Sam Kang
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Piezoelectric actuator is treated as RC load when it is modeled electrically. For some piezoelectric actuator applications, arbitrary voltage is required to actuate. Especially for unidirectional arbitrary voltage driving like as sine wave, some special inverter with circuit that can charge and discharge the capacitive energy can be used. In this case, the difference between power supply level and the object voltage level for RC load is varied. Because the control gain is constant, the controlled output is not uniform according to the voltage difference. In this paper, for charge and discharge circuit for unidirectional arbitrary voltage driving for piezoelectric actuator, the controller gain is controlled according to the voltage difference. With the proposed simple idea, the load voltage can have controlled smoothly although the voltage difference is varied. The appropriateness is proved from the simulation of the proposed circuit.Keywords: Analog voltage inverter, Capacitive load, Gain control, DC-DC converter, Piezoelectric, Voltage waveform.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 17371972 A Temperature-Insensitive Wide-Dynamic Range Positive/Negative Full-Wave Rectifier Based on Operational Trasconductance Amplifier using Commercially Available ICs
Authors: C. Chanapromma, T. Worachak, P. Silapan
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This paper presents positive and negative full-wave rectifier. The proposed structure is based on OTA using commercially available ICs (LT1228). The features of the proposed circuit are that: it can rectify and amplify voltage signal with controllable output magnitude via input bias current: the output voltage is free from temperature variation. The circuit description merely consists of 1 single ended and 3 fully differential OTAs. The performance of the proposed circuit are investigated though PSpice. They show that the proposed circuit can function as positive/negative full-wave rectifier, where the voltage input wide-dynamic range from -5V to 5V. Furthermore, the output voltage is slightly dependent on the temperature variations.Keywords: Full-wave rectifier, Positive/negative, OTA, Electronically controllable, Wide-dynamic range
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 18081971 Reduction of Leakage Power in Digital Logic Circuits Using Stacking Technique in 45 Nanometer Regime
Authors: P.K. Sharma, B. Bhargava, S. Akashe
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Power dissipation due to leakage current in the digital circuits is a biggest factor which is considered specially while designing nanoscale circuits. This paper is exploring the ideas of reducing leakage current in static CMOS circuits by stacking the transistors in increasing numbers. Clearly it means that the stacking of OFF transistors in large numbers result a significant reduction in power dissipation. Increase in source voltage of NMOS transistor minimizes the leakage current. Thus stacking technique makes circuit with minimum power dissipation losses due to leakage current. Also some of digital circuits such as full adder, D flip flop and 6T SRAM have been simulated in this paper, with the application of reduction technique on ‘cadence virtuoso tool’ using specter at 45nm technology with supply voltage 0.7V.
Keywords: Stack, 6T SRAM cell, low power, threshold voltage
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 34001970 Comparative Study of Line Voltage Stability Indices for Voltage Collapse Forecasting in Power Transmission System
Authors: H. H. Goh, Q. S. Chua, S. W. Lee, B. C. Kok, K. C. Goh, K. T. K. Teo
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At present, the evaluation of voltage stability assessment experiences sizeable anxiety in the safe operation of power systems. This is due to the complications of a strain power system. With the snowballing of power demand by the consumers and also the restricted amount of power sources, therefore, the system has to perform at its maximum proficiency. Consequently, the noteworthy to discover the maximum ability boundary prior to voltage collapse should be undertaken. A preliminary warning can be perceived to evade the interruption of power system’s capacity. The effectiveness of line voltage stability indices (LVSI) is differentiated in this paper. The main purpose of the indices used is to predict the proximity of voltage instability of the electric power system. On the other hand, the indices are also able to decide the weakest load buses which are close to voltage collapse in the power system. The line stability indices are assessed using the IEEE 14 bus test system to validate its practicability. Results demonstrated that the implemented indices are practically relevant in predicting the manifestation of voltage collapse in the system. Therefore, essential actions can be taken to dodge the incident from arising.
Keywords: Critical line, line outage, line voltage stability indices (LVSI), maximum loadability, voltage collapse, voltage instability, voltage stability analysis.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 41221969 Comparison of SVC and STATCOM in Static Voltage Stability Margin Enhancement
Authors: Mehrdad Ahmadi Kamarposhti, Mostafa Alinezhad
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One of the major causes of voltage instability is the reactive power limit of the system. Improving the system's reactive power handling capacity via Flexible AC transmission System (FACTS) devices is a remedy for prevention of voltage instability and hence voltage collapse. In this paper, the effects of SVC and STATCOM in Static Voltage Stability Margin Enhancement will be studied. AC and DC representations of SVC and STATCOM are used in the continuation power flow process in static voltage stability study. The IEEE-14 bus system is simulated to test the increasing loadability. It is found that these controllers significantly increase the loadability margin of power systems.
Keywords: SVC, STATCOM, Voltage Collapse, Maximum Loading Point.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 63481968 A New Shock Model for Systems Subject to Random Threshold Failure
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This paper generalizes Yeh Lam-s shock model for renewal shock arrivals and random threshold. Several interesting statistical measures are explicitly obtained. A few special cases and an optimal replacement problem are also discussed.Keywords: shock model, optimal replacement, random threshold, shocks.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 15621967 Impact of Gate Insulation Material and Thickness on Pocket Implanted MOS Device
Authors: Muhibul Haque Bhuyan
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This paper reports on the impact study with the variation of the gate insulation material and thickness on different models of pocket implanted sub-100 nm n-MOS device. The gate materials used here are silicon dioxide (SiO2), aluminum silicate (Al2SiO5), silicon nitride (Si3N4), alumina (Al2O3), hafnium silicate (HfSiO4), tantalum pentoxide (Ta2O5), hafnium dioxide (HfO2), zirconium dioxide (ZrO2), and lanthanum oxide (La2O3) upon a p-type silicon substrate material. The gate insulation thickness was varied from 2.0 nm to 3.5 nm for a 50 nm channel length pocket implanted n-MOSFET. There are several models available for this device. We have studied and simulated threshold voltage model incorporating drain and substrate bias effects, surface potential, inversion layer charge, pinch-off voltage, effective electric field, inversion layer mobility, and subthreshold drain current models based on two linear symmetric pocket doping profiles. We have changed the values of the two parameters, viz. gate insulation material and thickness gradually fixing the other parameter at their typical values. Then we compared and analyzed the simulation results. This study would be helpful for the nano-scaled MOS device designers for various applications to predict the device behavior.Keywords: Linear symmetric pocket profile, pocket implanted n-MOS Device, model, impact of gate material, insulator thickness.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3701966 A Review of Control Schemes for Active Power Filters in Order to Power Quality Improvement
Authors: Mohammad Hasan Raouf, Azim Nowbakht, Mohammad Bagher Haddadi, Mohammad Reza Tabatabaei
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Power quality has become a very important issue recently due to the impact on electricity suppliers, equipment manufacturers and customers. Power quality is described as the variation of voltage, current and frequency in a power system. Voltage magnitude is one of the major factors that determine the quality of power. Indeed, custom power technology, the low-voltage counterpart of the more widely known flexible ac transmission system (FACTS) technology, aimed at high-voltage power transmission applications, has emerged as a credible solution to solve many problems relating to power quality problems. There are various power quality problems such as voltage sags, swells, flickers, interruptions and harmonics etc. Active Power Filter (APF) is one of the custom power devices and can mitigate harmonics, reactive power and unbalanced load currents originating from load side. In this study, an extensive review of APF studies, the advantages and disadvantages of each introduced methods are presented. The study also helps the researchers to choose the optimum control techniques and power circuit configuration for APF applications.
Keywords: Power Quality, Custom Power, Active Filter, Control Approach.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 34461965 Distribution Voltage Regulation Under Three- Phase Fault by Using D-STATCOM
Authors: Chaiyut Sumpavakup, Thanatchai Kulworawanichpong
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This paper presents the voltage regulation scheme of D-STATCOM under three-phase faults. It consists of the voltage detection and voltage regulation schemes in the 0dq reference. The proposed control strategy uses the proportional controller in which the proportional gain, kp, is appropriately adjusted by using genetic algorithms. To verify its use, a simplified 4-bus test system is situated by assuming a three-phase fault at bus 4. As a result, the DSTATCOM can resume the load voltage to the desired level within 1.8 ms. This confirms that the proposed voltage regulation scheme performs well under three-phase fault events.Keywords: D-STATCOM, proportional controller, genetic algorithms.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 17641964 Voltage Stability Assessment and Enhancement Using STATCOM - A Case Study
Authors: Puneet Chawla, Balwinder Singh
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Recently, increased attention has been devoted to the voltage instability phenomenon in power systems. Many techniques have been proposed in the literature for evaluating and predicting voltage stability using steady state analysis methods. In this paper P-V and Q-V curves have been generated for a 57 bus Patiala Rajpura circle of India. The power-flow program is developed in MATLAB using Newton Raphson method. Using Q-V curves the weakest bus of the power system and the maximum reactive power change permissible on that bus is calculated. STATCOMs are placed on the weakest bus to improve the voltage and hence voltage stability and also the power transmission capability of the line.
Keywords: Voltage stability, Reactive power, power flow, weakest bus, STATCOM.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 30051963 The Impact of Process Parameters on the Output Characteristics of an LDMOS Device
Authors: M. A. Malakoutian, V. Fathipour, M. Fathipour, A. Mojab, M. M. Allame, M. Moradinasab
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In this paper, we have examined the effect of process parameter variation on the electrical characteristics of an LDMOS device. The rate of change in the electrical parameters such as cut off frequency, breakdown voltage and drain saturation current as a function of the process parameters is investigatedKeywords: LDMOS, Process Parameters, characteristics, parameter variation.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 19401962 Threshold Concepts in TESOL: A Thematic Analysis of Disciplinary Guiding Principles
Authors: Neil Morgan
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The notion of Threshold Concepts has offered a fertile new perspective on the transformative effects of mastery of particular concepts on student understanding of subject matter and their developing identities as inductees into disciplinary discourse communities. Only by successfully traversing essential knowledge thresholds can neophytes achieve the more sophisticated understandings of subject matter possessed by mature members of a discipline. This paper uses thematic analysis of disciplinary guiding principles to identify nine candidate Threshold Concepts that appear to underpin effective TESOL practice. The relationship between these candidate TESOL Threshold Concepts, TESOL principles, and TESOL instructional techniques appears to be amenable to a schematic representation based on superordinate categories of TESOL practitioner concern and, as such, offers an alternative to the view of Threshold Concepts as a privileged subset of disciplinary core concepts. The paper concludes by exploring the potential of a Threshold Concepts framework to productively inform TESOL initial teacher education (ITE) and in-service education and training (INSET).
Keywords: TESOL, threshold concepts, TESOL principles, TESOL ITE/INSET, community of practice.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 7051961 Internal Node Stabilization for Voltage Sense Amplifiers in Multi-Channel Systems
Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn
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This paper discusses the undesirable charge transfer by the parasitic capacitances of the input transistors in a voltage sense amplifier. Due to its intrinsic rail-to-rail voltage transition, the input sides are inevitably disturbed. It can possible disturb the stabilities of the reference voltage levels. Moreover, it becomes serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the systems. In order to alleviate the internal node voltage transition, the internal node stabilization technique is proposed by utilizing an additional biasing circuit. It achieves 47% and 43% improvements for node stabilization and input referred disturbance, respectively.
Keywords: Voltage sense amplifier, voltage transition, node stabilization, and biasing circuits.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 27621960 Frequency-Variation Based Method for Parameter Estimation of Transistor Amplifier
Authors: Akash Rathee, Harish Parthasarathy
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In this paper, a frequency-variation based method has been proposed for transistor parameter estimation in a commonemitter transistor amplifier circuit. We design an algorithm to estimate the transistor parameters, based on noisy measurements of the output voltage when the input voltage is a sine wave of variable frequency and constant amplitude. The common emitter amplifier circuit has been modelled using the transistor Ebers-Moll equations and the perturbation technique has been used for separating the linear and nonlinear parts of the Ebers-Moll equations. This model of the amplifier has been used to determine the amplitude of the output sinusoid as a function of the frequency and the parameter vector. Then, applying the proposed method to the frequency components, the transistor parameters have been estimated. As compared to the conventional time-domain least squares method, the proposed method requires much less data storage and it results in more accurate parameter estimation, as it exploits the information in the time and frequency domain, simultaneously. The proposed method can be utilized for parameter estimation of an analog device in its operating range of frequencies, as it uses data collected from different frequencies output signals for parameter estimation.Keywords: Perturbation Technique, Parameter estimation, frequency-variation based method.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 17381959 Balanced and Unbalanced Voltage Sag Mitigation Using DSTATCOM with Linear and Nonlinear Loads
Authors: H. Nasiraghdam, A. Jalilian
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DSTATCOM is one of the equipments for voltage sag mitigation in power systems. In this paper a new control method for balanced and unbalanced voltage sag mitigation using DSTATCOM is proposed. The control system has two loops in order to regulate compensator current and load voltage. Delayed signal cancellation has been used for sequence separation. The compensator should protect sensitive loads against different types of voltage sag. Performance of the proposed method is investigated under different types of voltage sags for linear and nonlinear loads. Simulation results show appropriate operation of the proposed control system.Keywords: Custom power, power quality, voltage sagmitigation, current vector control.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 28231958 Dynamic Voltage Stability Estimation using Particle Filter
Authors: Osea Zebua, Norikazu Ikoma, Hiroshi Maeda
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Estimation of voltage stability based on optimal filtering method is presented. PV curve is used as a tool for voltage stability analysis. Dynamic voltage stability estimation is done by using particle filter method. Optimum value (nose point) of PV curve can be estimated by estimating parameter of PV curve equation optimal value represents critical voltage and condition at specified point of measurement. Voltage stability is then estimated by analyzing loading margin condition c stimating equation. This maximum loading ecified dynamically.Keywords: normalized PV curve, optimal filtering method particle filter, voltage stability.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 17811957 Effects of Tap Changing Transformer and Shunt Capacitor on Voltage Stability Enhancement of Transmission Networks
Authors: Pyone Lai Swe, Wanna Swe, Kyaw Myo Lin
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Voltage stability has become an important issue to many power systems around the world due to the weak systems and long line on power system networks. In this paper, MATLAB load flow program is applied to obtain the weak points in the system combined with finding the voltage stability limit. The maximum permissible loading of a system, within the voltage stability limit, is usually determined. The methods for varying tap ratio (using tap changing transformer) and applying different values of shunt capacitor injection to improve the voltage stability within the limit are also provided.
Keywords: Load flow, Voltage stability, Tap changingtransformer, Shunt capacitor injection, Voltage stability limit
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 59571956 Design of AC Electronics Load Surge Protection
Authors: N. Mungkung, S. Wongcharoen, C. Sukkongwari, Somchai Arunrungrasmi
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This study examines the design and construction of AC Electronics load surge protection in order to carry electric surge load arisen from faults in low voltage electricity system (single phase/220V) by using the principle of electronics load clamping voltage during induction period so that electric voltage could go through to safe load and continue to work. The qualification of the designed device could prevent both transient over voltage and voltage swell. Both will work in cooperation, resulting in the ability to improve and modify the quality of electrical power in Thailand electricity distribution system more effective than the past and help increase the lifetime of electric appliances, electric devices, and electricity protection equipments.Keywords: Electronics Load, Transient Over Voltage, Voltage Swell.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 26531955 Self Compensating ON Chip LDO Voltage Regulator in 180nm
Authors: SreehariRao Patri, K. S. R. KrishnaPrasad
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An on chip low drop out voltage regulator that employs elegant compensation scheme is presented in this paper. The novelty in this design is that the device parasitic capacitances are exploited for compensation at different loads. The proposed LDO is designed to provide a constant voltage of 1.2V and is implemented in UMC 180 nano meter CMOS technology. The voltage regulator presented improves stability even at lighter loads and enhances line and load regulation. Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2523