Search results for: circuit analysis.
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 9022

Search results for: circuit analysis.

8842 Higher Frequency Modeling of Synchronous Exciter Machines by Equivalent Circuits and Transfer Functions

Authors: Marcus Banda

Abstract:

In this article the influence of higher frequency effects in addition to a special damper design on the electrical behavior of a synchronous generator main exciter machine is investigated. On the one hand these machines are often highly stressed by harmonics from the bridge rectifier thus facing additional eddy current losses. On the other hand the switching may cause the excitation of dangerous voltage peaks in resonant circuits formed by the diodes of the rectifier and the commutation reactance of the machine. Therefore modern rotating exciters are treated like synchronous generators usually modeled with a second order equivalent circuit. Hence the well known Standstill Frequency Response Test (SSFR) method is applied to a test machine in order to determine parameters for the simulation. With these results it is clearly shown that higher frequencies have a strong impact on the conventional equivalent circuit model. Because of increasing field displacement effects in the stranded armature winding the sub-transient reactance is even smaller than the armature leakage at high frequencies. As a matter of fact this prevents the algorithm to find an equivalent scheme. This issue is finally solved using Laplace transfer functions fully describing the transient behavior at the model ports.

Keywords: Synchronous exciter machine, Linear transfer function, SSFR, Equivalent Circuit

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8841 Low Power Circuit Architecture of AES Crypto Module for Wireless Sensor Network

Authors: MooSeop Kim, Juhan Kim, Yongje Choi

Abstract:

Recently, much research has been conducted for security for wireless sensor networks and ubiquitous computing. Security issues such as authentication and data integrity are major requirements to construct sensor network systems. Advanced Encryption Standard (AES) is considered as one of candidate algorithms for data encryption in wireless sensor networks. In this paper, we will present the hardware architecture to implement low power AES crypto module. Our low power AES crypto module has optimized architecture of data encryption unit and key schedule unit which could be applicable to wireless sensor networks. We also details low power design methods used to design our low power AES crypto module.

Keywords: Algorithm, Low Power Crypto Circuit, AES, Security.

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8840 Studies on the Feasibility of Cow’s Urine as Non-Conventional Energy Sources

Authors: Raj Kumar Rajak, Bharat Mishra

Abstract:

Bio-batteries represent an entirely new long-term, reasonable, reachable, and eco-friendly approach to generation of sustainable energy. In the present experimental work, we have studied the effect of the generation of power by bio-battery using different electrode pairs. The tests show that it is possible to generate electricity using cow’s urine as an electrolyte. C-Mg electrode pair shows maximum Voltage and Short Circuit Current (SCC), while C-Zn electrode pair shows less Open Circuit Voltage (OCV) and SCC. By the studies of cow urine and different electrodes, it is found that C-Zn electrode battery is more economical. The cow urine battery with C-Zn electrode provides maximum power (707.4 mW) and durability (up to 145 h). This result shows that the bio-batteries have the potency to full fill the need of electricity demand for lower energy equipment.

Keywords: Bio-batteries, cow’s urine, electrodes, non-conventional.

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8839 Evaluation of Torsional Efforts on Thermal Machines Shaft with Gas Turbine resulting of Automatic Reclosing

Authors: Alvaro J. P. Ramos, Wellington S. Mota, Yendys S. Dantas

Abstract:

This paper analyses the torsional efforts in gas turbine-generator shafts caused by high speed automatic reclosing of transmission lines. This issue is especially important for cases of three phase short circuit and unsuccessful reclosure of lines in the vicinity of the thermal plant. The analysis was carried out for the thermal plant TERMOPERNAMBUCO located on Northeast region of Brazil. It is shown that stress level caused by lines unsuccessful reclosing can be several times higher than terminal three-phase short circuit. Simulations were carried out with detailed shaft torsional model provided by machine manufacturer and with the “Alternative Transient Program – ATP" program [1]. Unsuccessful three phase reclosing for selected lines in the area closed to the plant indicated most critical cases. Also, reclosing first the terminal next to the gas turbine gererator will lead also to the most critical condition. Considering that the values of transient torques are very sensible to the instant of reclosing, simulation of unsuccessful reclosing with statistics ATP switch were carried out for determination of most critical transient torques for each section of the generator turbine shaft.

Keywords: Torsional Efforts, Thermal Machine, GasTurbine, Automatic Reclosing.

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8838 Film Sensors for the Harsh Environment Application

Authors: Wenmin Qu

Abstract:

A capacitance level sensor with a segmented film electrode and a thin-film volume flow sensor with an innovative by-pass sleeve is presented as industrial products for the application in a harsh environment. The working principle of such sensors is well known; however, the traditional sensors show some limitations for certain industrial measurements. The two sensors presented in this paper overcome this limitation and enlarge the application spectrum. The problem is analyzed, and the solution is given. The emphasis of the paper is on developing the problem-solving concepts and the realization of the corresponding measuring circuits. These should give advice and encouragement, how we can still develop electronic measuring products in an almost saturated market.

Keywords: By-pass sleeve, charge transfer circuit, fixed ΔT circuit, harsh environment, industrial application, segmented electrode.

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8837 Design Calculation and Performance Testing of Heating Coil in Induction Surface Hardening Machine

Authors: Soe Sandar Aung, Han Phyo Wai, Nyein Nyein Soe

Abstract:

The induction hardening machines are utilized in the industries which modify machine parts and tools needed to achieve high ware resistance. This paper describes the model of induction heating process design of inverter circuit and the results of induction surface hardening of heating coil. In the design of heating coil, the shape and the turn numbers of the coil are very important design factors because they decide the overall operating performance of induction heater including resonant frequency, Q factor, efficiency and power factor. The performance will be tested by experiments in some cases high frequency induction hardening machine.

Keywords: Induction Heating, Resonant Circuit, InverterCircuit, Coil Design, Induction Hardening Machine.

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8836 A Novel Application of Network Equivalencing Method in Time Domain to Precise Calculation of Dead Time in Power Transmission Title

Authors: J. Moshtagh, L. Eslami

Abstract:

Various studies have showed that about 90% of single line to ground faults occurred on High voltage transmission lines have transient nature. This type of faults is cleared by temporary outage (by the single phase auto-reclosure). The interval between opening and reclosing of the faulted phase circuit breakers is named “Dead Time” that is varying about several hundred milliseconds. For adjustment of traditional single phase auto-reclosures that usually are not intelligent, it is necessary to calculate the dead time in the off-line condition precisely. If the dead time used in adjustment of single phase auto-reclosure is less than the real dead time, the reclosing of circuit breakers threats the power systems seriously. So in this paper a novel approach for precise calculation of dead time in power transmission lines based on the network equivalencing in time domain is presented. This approach has extremely higher precision in comparison with the traditional method based on Thevenin equivalent circuit. For comparison between the proposed approach in this paper and the traditional method, a comprehensive simulation by EMTP-ATP is performed on an extensive power network.

Keywords: Dead Time, Network Equivalencing, High Voltage Transmission Lines, Single Phase Auto-Reclosure.

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8835 ANN Models for Microstrip Line Synthesis and Analysis

Authors: Dr.K.Sri Rama Krishna, J.Lakshmi Narayana, Dr.L.Pratap Reddy

Abstract:

Microstrip lines, widely used for good reason, are broadband in frequency and provide circuits that are compact and light in weight. They are generally economical to produce since they are readily adaptable to hybrid and monolithic integrated circuit (IC) fabrication technologies at RF and microwave frequencies. Although, the existing EM simulation models used for the synthesis and analysis of microstrip lines are reasonably accurate, they are computationally intensive and time consuming. Neural networks recently gained attention as fast and flexible vehicles to microwave modeling, simulation and optimization. After learning and abstracting from microwave data, through a process called training, neural network models are used during microwave design to provide instant answers to the task learned.This paper presents simple and accurate ANN models for the synthesis and analysis of Microstrip lines to more accurately compute the characteristic parameters and the physical dimensions respectively for the required design specifications.

Keywords: Neural Models, Algorithms, Microstrip Lines, Analysis, Synthesis

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8834 A 5-V to 30-V Current-Mode Boost Converter with Integrated Current Sensor and Power-on Protection

Authors: Jun Yu, Yat-Hei Lam, Boris Grinberg, Kevin Chai Tshun Chuan

Abstract:

This paper presents a 5-V to 30-V current-mode boost converter for powering the drive circuit of a micro-electro-mechanical sensor. The design of a transconductance amplifier and an integrated current sensing circuit are presented. In addition, essential building blocks for power-on protection such as a soft-start and clamp block and supply and clock ready block are discussed in details. The chip is fabricated in a 0.18-μm CMOS process. Measurement results show that the soft-start and clamp block can effectively limit the inrush current during startup and protect the boost converter from startup failure.

Keywords: Boost Converter, Current Sensing, Power-on protection, Step-up Converter, Soft-start.

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8833 The Frequency Graph for the Traveling Salesman Problem

Authors: Y. Wang

Abstract:

Traveling salesman problem (TSP) is hard to resolve when the number of cities and routes become large. The frequency graph is constructed to tackle the problem. A frequency graph maintains the topological relationships of the original weighted graph. The numbers on the edges are the frequencies of the edges emulated from the local optimal Hamiltonian paths. The simplest kind of local optimal Hamiltonian paths are computed based on the four vertices and three lines inequality. The search algorithm is given to find the optimal Hamiltonian circuit based on the frequency graph. The experiments show that the method can find the optimal Hamiltonian circuit within several trials.

Keywords: Traveling salesman problem, frequency graph, local optimal Hamiltonian path, four vertices and three lines inequality.

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8832 Micropower Fuzzy Linguistic-Hedges Circuit in Current-Mode Approach

Authors: E. Farshidi

Abstract:

In this paper, based on a novel synthesis, a set of new simplified circuit design to implement the linguistic-hedge operations for adjusting the fuzzy membership function set is presented. The circuits work in current-mode and employ floating-gate MOS (FGMOS) transistors that operate in weak inversion region. Compared to the other proposed circuits, these circuits feature severe reduction of the elements number, low supply voltage (0.7V), low power consumption (<200nW), immunity from body effect and wide input dynamic range (>60dB). In this paper, a set of fuzzy linguistic hedge circuits, including absolutely, very, much more, more, plus minus, more or less and slightly, has been implemented in 0.18 mm CMOS process. Simulation results by Hspice confirm the validity of the proposed design technique and show high performance of the circuits.

Keywords: Current-mode, Linguistic-Hedge, Fuzzy Logic, lowpower

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8831 Three-phases Model of the Induction Machine Taking Account the Stator Faults

Authors: Djalal Eddine Khodja, Aissa Kheldoun

Abstract:

In this work we present the modelling of the induction machine, taking into consideration the stator defects of the induction machine. It is based on the theory of electromagnetic coupling of electrical circuits. In fact, for the modelling of stationary defects such as short circuit between turns in the same phase, we introduce only in the matrix the coefficients of resistance and inductance of stator and in the mutual inductance stator-rotor. These coefficients take account the number of turns in short-circuit deducted from the total number of turns in the same phase; in this way we obtain the number of useful turns. In addition, all these faults involved, will be used for the creation of the database that will be used to develop an automated system failures of the induction machine.

Keywords: Asynchronous machine, Indicatory Values Statorfaults, Multi-turns Model, Three-phases Model.

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8830 A Pipelined FSBM Hardware Architecture for HTDV-H.26x

Authors: H. Loukil, A. Ben Atitallah, F. Ghozzi, M. A. Ben Ayed, N. Masmoudi

Abstract:

In MPEG and H.26x standards, to eliminate the temporal redundancy we use motion estimation. Given that the motion estimation stage is very complex in terms of computational effort, a hardware implementation on a re-configurable circuit is crucial for the requirements of different real time multimedia applications. In this paper, we present hardware architecture for motion estimation based on "Full Search Block Matching" (FSBM) algorithm. This architecture presents minimum latency, maximum throughput, full utilization of hardware resources such as embedded memory blocks, and combining both pipelining and parallel processing techniques. Our design is described in VHDL language, verified by simulation and implemented in a Stratix II EP2S130F1020C4 FPGA circuit. The experiment result show that the optimum operating clock frequency of the proposed design is 89MHz which achieves 160M pixels/sec.

Keywords: SAD, FSBM, Hardware Implementation, FPGA.

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8829 Central Pattern Generator Incorporating the Actuator Dynamics for a Hexapod Robot

Authors: Valeri A. Makarov, Ezequiel Del Rio, Manuel G. Bedia, Manuel G. Velarde, Werner Ebeling

Abstract:

We proposed the use of a Toda-Rayleigh ring as a central pattern generator (CPG) for controlling hexapodal robots. We show that the ring composed of six Toda-Rayleigh units coupled to the limb actuators reproduces the most common hexapodal gaits. We provide an electrical circuit implementation of the CPG and test our theoretical results obtaining fixed gaits. Then we propose a method of incorporation of the actuator (motor) dynamics in the CPG. With this approach we close the loop CPG – environment – CPG, thus obtaining a decentralized model for the leg control that does not require higher level intervention to the CPG during locomotion in a nonhomogeneous environments. The gaits generated by the novel CPG are not fixed, but adapt to the current robot bahvior.

Keywords: Central pattern generator, electrical circuit, hexapod robot

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8828 Comprehensive Nonlinearity Simulation of Different Types and Modes of HEMTs with Respect to Biasing Conditions

Authors: M. M. Karkhanehchi, A. Ammani

Abstract:

A simple analytical model has been developed to optimize biasing conditions for obtaining maximum linearity among lattice-matched, pseudomorphic and metamorphic HEMT types as well as enhancement and depletion HEMT modes. A nonlinear current-voltage model has been simulated based on extracted data to study and select the most appropriate type and mode of HEMT in terms of a given gate-source biasing voltage within the device so as to employ the circuit for the highest possible output current or voltage linear swing. Simulation results can be used as a basis for the selection of optimum gate-source biasing voltage for a given type and mode of HEMT with regard to a circuit design. The consequences can also be a criterion for choosing the optimum type or mode of HEMT for a predetermined biasing condition.

Keywords: Biasing, characteristic, linearity, simulation.

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8827 Active Power Filtering Implementation Using Photovoltaic System with Reduced Energy Storage Capacitor

Authors: Horng-Yuan Wu, Chin-Yuan Hsu, Tsair-Fwu Lee

Abstract:

A novel three-phase active power filter (APF) circuit with photovoltaic (PV) system to improve the quality of service and to reduce the capacity of energy storage capacitor is presented. The energy balance concept and sampling technique were used to simplify the calculation algorithm for the required utility source current and to control the voltage of the energy storage capacitor. The feasibility was verified by using the Pspice simulations and experiments. When the APF mode was used during non-operational period, not only the utilization rate, power factor and power quality could be improved, but also the capacity of energy storage capacitor could sparing. As the results, the advantages of the APF circuit are simplicity of control circuits, low cost, and good transient response.

Keywords: active power filter, sampling, energy-storagecapacitor, harmonic current, energy balance.

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8826 Model Order Reduction of Linear Time Variant High Speed VLSI Interconnects using Frequency Shift Technique

Authors: J.V.R.Ravindra, M.B.Srinivas,

Abstract:

Accurate modeling of high speed RLC interconnects has become a necessity to address signal integrity issues in current VLSI design. To accurately model a dispersive system of interconnects at higher frequencies; a full-wave analysis is required. However, conventional circuit simulation of interconnects with full wave models is extremely CPU expensive. We present an algorithm for reducing large VLSI circuits to much smaller ones with similar input-output behavior. A key feature of our method, called Frequency Shift Technique, is that it is capable of reducing linear time-varying systems. This enables it to capture frequency-translation and sampling behavior, important in communication subsystems such as mixers, RF components and switched-capacitor filters. Reduction is obtained by projecting the original system described by linear differential equations into a lower dimension. Experiments have been carried out using Cadence Design Simulator cwhich indicates that the proposed technique achieves more % reduction with less CPU time than the other model order reduction techniques existing in literature. We also present applications to RF circuit subsystems, obtaining size reductions and evaluation speedups of orders of magnitude with insignificant loss of accuracy.

Keywords: Model order Reduction, RLC, crosstalk

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8825 High Efficiency Class-F Power Amplifier Design

Authors: Abdalla Mohamed Eblabla

Abstract:

Due to the high increase in and demand for a wide assortment of applications that require low-cost, high-efficiency, and compact systems, RF power amplifiers are considered the most critical design blocks and power consuming components in wireless communication, TV transmission, radar, and RF heating. Therefore, much research has been carried out in order to improve the performance of power amplifiers. Classes-A, B, C, D, E and F are the main techniques for realizing power amplifiers.

An implementation of high efficiency class-F power amplifier with Gallium Nitride (GaN) High Electron Mobility Transistor (HEMT) was realized in this paper. The simulation and optimization of the class-F power amplifier circuit model was undertaken using Agilent’s Advanced Design system (ADS). The circuit was designed using lumped elements.

Keywords: Power Amplifier (PA), Gallium Nitride (GaN), Agilent’s Advanced Design system (ADS) and lumped elements.

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8824 Low Cost Surface Electromyographic Signal Amplifier Based On Arduino Microcontroller

Authors: Igor Luiz Bernardes de Moura, Luan Carlos de Sena Monteiro Ozelim, Fabiano Araujo Soares

Abstract:

The development of an low cost acquisition system of S-EMG signals which are reliable, comfortable for the user and with high mobility shows to be a relevant proposition in modern biomedical engineering scenario. In the study, the sampling capacity of the Arduino microcontroller Atmel Atmega328 with an A / D converter with 10-bit resolution and its reconstructing capability of a signal of surface electromyography is analyzed. An electronic circuit to capture the signal through two differential channels was designed, signals from Biceps Brachialis of a healthy man of 21 years was acquired to test the system prototype. ARV, MDF, MNF and RMS estimators were used to compare de acquired signals with physiological values. The Arduino was configured with a sampling frequency of 1.5kHz for each channel, and the tests with the circuit designed offered a SNR of 20.57dB.

Keywords: Eletromyography, Arduino, Low-Cost, Atmel Atmega328 microcontroller.

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8823 The Effect of Global Solar Variations on the Performance of n-AlGaAs/p-GaAs Solar Cells

Authors: A. Guechi, M. Chegaar

Abstract:

This study investigates how AlGaAs/GaAs thin film solar cells perform under varying global solar spectrum due to the changes of environmental parameters such as the air mass and the atmospheric turbidity. The solar irradiance striking the solar cell is simulated using the spectral irradiance model SMARTS2 (Simple Model of the Atmospheric Radiative Transfer of Sunshine) for clear skies on the site of Setif (Algeria). The results show a reduction in the short circuit current due to increasing atmospheric turbidity, it is 63.09% under global radiation. However increasing air mass leads to a reduction in the short circuit current of 81.73%. The efficiency decreases with increasing atmospheric turbidity and air mass.

Keywords: AlGaAs/GaAs, Solar Cells, Environmental parameters, Spectral Variation, SMARTS.

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8822 Design of a Novel Inclination Sensor Utilizing Grayscale Image

Authors: Tuhin Subhra Sarkar, Subir Das

Abstract:

Several research works have been done in recent times utilizing grayscale image for the measurement of many physical phenomena. In this present paper, we have designed an embedded based inclination sensor utilizing the grayscale image with a resolution of 0.3º. The sensor module consists of a circular shaped metal disc, laminated with grayscale image and an optical transreceiver. The sensor principle is based on temporal changes in light intensity by the movement of grayscale image with the inclination of the target surface and the variation of light intensity has been detected in terms of voltage by the signal processing circuit (SPC).The output of SPC is fed to a microcontroller program to display the inclination angel digitally. The experimental results are shown a satisfactory performance of the sensor in a small inclination measuring range of -40º to + 40º with a sensitivity of 62 mV/°.

Keywords: Grayscale image, Inclination Sensor, Microcontroller Program, Signal Processing Circuit.

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8821 Enhancement of Performance Utilizing Low Complexity Switched Beam Antenna

Authors: P. Chaipanya, R. Keawchai, W. Sombatsanongkhun, S. Jantaramporn

Abstract:

To manage the demand of wireless communication that has been dramatically increased, switched beam antenna in smart antenna system is focused. Implementation of switched beam antennas at mobile terminals such as notebook or mobile handset is a preferable choice to increase the performance of the wireless communication systems. This paper proposes the low complexity switched beam antenna using single element of antenna which is suitable to implement at mobile terminal. Main beam direction is switched by changing the positions of short circuit on the radiating patch. There are four cases of switching that provide four different directions of main beam. Moreover, the performance in terms of Signal to Interference Ratio when utilizing the proposed antenna is compared with the one using omni-directional antenna to confirm the performance improvable.

Keywords: Switched beam, shorted circuit, single element, signal to interference ratio.

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8820 An Efficient Digital Baseband ASIC for Wireless Biomedical Signals Monitoring

Authors: Kah-Hyong Chang, Xin Liu, Jia Hao Cheong, Saisundar Sankaranarayanan, Dexing Pang, Hongzhao Zheng

Abstract:

A digital baseband Application-Specific Integrated Circuit (ASIC) (yclic Redundancy Checkis developed for a microchip transponder to transmit signals and temperature levels from biomedical monitoring devices. The transmission protocol is adapted from the ISO/IEC 11784/85 standard. The module has a decimation filter that employs only a single adder-subtractor in its datapath. The filtered output is coded with cyclic redundancy check and transmitted through backscattering Load Shift Keying (LSK) modulation to a reader. Fabricated using the 0.18-μm CMOS technology, the module occupies 0.116 mm2 in chip area (digital baseband: 0.060 mm2, decimation filter: 0.056 mm2), and consumes a total of less than 0.9 μW of power (digital baseband: 0.75 μW, decimation filter: 0.14 μW).

Keywords: Biomedical sensor, decimation filter, Radio Frequency Integrated Circuit (RFIC) baseband, temperature sensor.

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8819 Analysis and Experimentation of Interleaved Boost Converter with Ripple Steering for Power Factor Correction

Authors: A. Inba Rexy, R. Seyezhai

Abstract:

Through the fast growing technologies, design of power factor correction (PFC) circuit is facing several challenges. In this paper, a two-phase interleaved boost converter with ripple steering technique is proposed. Among the various topologies, Interleaved Boost converter (IBC) is considered as superior due to enriched performance, lower ripple content, compact weight and size. A thorough investigation is presented here for the proposed topology. Simulation study for the IBC has been carried out using MATLAB/SIMULINK. Theoretical analysis and hardware prototype has been performed to validate the results.

Keywords: Interleaved Boost Converter (IBC), Power Factor Correction (PFC), Ripple Steering Technique, Ripple, and Simulation.

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8818 Application of Genetic Algorithms for Evolution of Quantum Equivalents of Boolean Circuits

Authors: Swanti Satsangi, Ashish Gulati, Prem Kumar Kalra, C. Patvardhan

Abstract:

Due to the non- intuitive nature of Quantum algorithms, it becomes difficult for a classically trained person to efficiently construct new ones. So rather than designing new algorithms manually, lately, Genetic algorithms (GA) are being implemented for this purpose. GA is a technique to automatically solve a problem using principles of Darwinian evolution. This has been implemented to explore the possibility of evolving an n-qubit circuit when the circuit matrix has been provided using a set of single, two and three qubit gates. Using a variable length population and universal stochastic selection procedure, a number of possible solution circuits, with different number of gates can be obtained for the same input matrix during different runs of GA. The given algorithm has also been successfully implemented to obtain two and three qubit Boolean circuits using Quantum gates. The results demonstrate the effectiveness of the GA procedure even when the search spaces are large.

Keywords: Ancillas, Boolean functions, Genetic algorithm, Oracles, Quantum circuits, Scratch bit

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8817 Learning Monte Carlo Data for Circuit Path Length

Authors: Namal A. Senanayake, A. Beg, Withana C. Prasad

Abstract:

This paper analyzes the patterns of the Monte Carlo data for a large number of variables and minterms, in order to characterize the circuit path length behavior. We propose models that are determined by training process of shortest path length derived from a wide range of binary decision diagram (BDD) simulations. The creation of the model was done use of feed forward neural network (NN) modeling methodology. Experimental results for ISCAS benchmark circuits show an RMS error of 0.102 for the shortest path length complexity estimation predicted by the NN model (NNM). Use of such a model can help reduce the time complexity of very large scale integrated (VLSI) circuitries and related computer-aided design (CAD) tools that use BDDs.

Keywords: Monte Carlo data, Binary decision diagrams, Neural network modeling, Shortest path length estimation.

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8816 Investigation of Transmission Line Overvoltages and their Deduction Approach

Authors: A. Hayati Soloot, A. Gholami, E. Agheb, A. Ghorbandaeipour, P. Mokhtari

Abstract:

The two significant overvoltages in power system, switching overvoltage and lightning overvoltage, are investigated in this paper. Firstly, the effect of various power system parameters on Line Energization overvoltages is evaluated by simulation in ATP. The dominant parameters include line parameters; short-circuit impedance and circuit breaker parameters. Solutions to reduce switching overvoltages are reviewed and controlled closing using switchsync controllers is proposed as proper method. This paper also investigates lightning overvoltages in the overhead-cable transition. Simulations are performed in PSCAD/EMTDC. Surge arresters are applied in both ends of cable to fulfill the insulation coordination. The maximum amplitude of overvoltages inside the cable is surveyed which should be of great concerns in insulation coordination studies.

Keywords: Switching Overvoltage, Lightning Overvoltage, Insulation Coordination, ATP, PSCAD/EMTDC.

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8815 Stability Issues on an Implemented All-Pass Filter Circuitry

Authors: Ákos Pintér, István Dénes

Abstract:

The so-called all-pass filter circuits are commonly used in the field of signal processing, control and measurement. Being connected to capacitive loads, these circuits tend to loose their stability; therefore the elaborate analysis of their dynamic behavior is necessary. The compensation methods intending to increase the stability of such circuits are discussed in this paper, including the socalled lead-lag compensation technique being treated in detail. For the dynamic modeling, a two-port network model of the all-pass filter is being derived. The results of the model analysis show, that effective lead-lag compensation can be achieved, alone by the optimization of the circuit parameters; therefore the application of additional electric components are not needed to fulfill the stability requirement.

Keywords: all-pass filter, frequency compensation, stability, linear modeling

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8814 A Unity Gain Fully-Differential 10bit and 40MSps Sample-And-Hold Amplifier in 0.18um CMOS

Authors: Sanaz Haddadian, Rahele Hedayati

Abstract:

A 10bit, 40 MSps, sample and hold, implemented in 0.18-μm CMOS technology with 3.3V supply, is presented for application in the front-end stage of an analog-to-digital converter. Topology selection, biasing, compensation and common mode feedback are discussed. Cascode technique has been used to increase the dc gain. The proposed opamp provides 149MHz unity-gain bandwidth (wu), 80 degree phase margin and a differential peak to peak output swing more than 2.5v. The circuit has 55db Total Harmonic Distortion (THD), using the improved fully differential two stage operational amplifier of 91.7dB gain. The power dissipation of the designed sample and hold is 4.7mw. The designed system demonstrates relatively suitable response in different process, temperature and supply corners (PVT corners).

Keywords: Analog Integrated Circuit Design, Sample & Hold Amplifier and CMOS Technology.

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8813 Subthreshold Circuit Performance Investigation under Temperature Variations

Authors: Mohd. Hasan, Ajmal Kafeel, S. D. Pable

Abstract:

Ultra-low-power (ULP) circuits have received widespread attention due to the rapid growth of biomedical applications and Battery-less Electronics. Subthreshold region of transistor operation is used in ULP circuits. Major research challenge in the subthreshold operating region is to extract the ULP benefits with minimal degradation in speed and robustness. Process, Voltage and Temperature (PVT) variations significantly affect the performance of subthreshold circuits. Designed performance parameters of ULP circuits may vary largely due to temperature variations. Hence, this paper investigates the effect of temperature variation on device and circuit performance parameters at different biasing voltages in the subthreshold region. Simulation results clearly demonstrate that in deep subthreshold and near threshold voltage regions, performance parameters are significantly affected whereas in moderate subthreshold region, subthreshold circuits are more immune to temperature variations. This establishes that moderate subthreshold region is ideal for temperature immune circuits.

Keywords: Subthreshold, temperature variations, ultralow power.

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