A Unity Gain Fully-Differential 10bit and 40MSps Sample-And-Hold Amplifier in 0.18um CMOS

Authors: Sanaz Haddadian, Rahele Hedayati

Abstract:

A 10bit, 40 MSps, sample and hold, implemented in 0.18-μm CMOS technology with 3.3V supply, is presented for application in the front-end stage of an analog-to-digital converter. Topology selection, biasing, compensation and common mode feedback are discussed. Cascode technique has been used to increase the dc gain. The proposed opamp provides 149MHz unity-gain bandwidth (wu), 80 degree phase margin and a differential peak to peak output swing more than 2.5v. The circuit has 55db Total Harmonic Distortion (THD), using the improved fully differential two stage operational amplifier of 91.7dB gain. The power dissipation of the designed sample and hold is 4.7mw. The designed system demonstrates relatively suitable response in different process, temperature and supply corners (PVT corners).

Keywords: Analog Integrated Circuit Design, Sample & Hold Amplifier and CMOS Technology.

Digital Object Identifier (DOI): doi.org/10.5281/zenodo.1060086

References:

[1] P.R. Gray, J. Hursr, S.H Lewis, R.G Meyer, "Analysis and design of analog integrated circuit", John Wiley & sons, 2001.
[2] d. Johns, K. Martin, "Analog integrated circuit design", 1997.
[3] B. Razavi, "Design of Analog CMOS Integrated Circuits", MacGrewHil, 2001.
[4] A. Loloee, A. Zanchi, H. Jin, S. Shehata, E. Bartolome, "A 12b 80MSps Pipelined ADC Core with 190mV Consumption from 3 V in 0.18um Digital CMOS--, ESSCIRC, 2002.
[5] O. Choksi, L.Richard Carley, "Analysis of Switched-capacitor Common- Mode Feedback Circuit" IEEE, 2003.
[6] M. Dessouky, M. Louerat, A. Kaiser "Switch Sizing for Very Low- Voltage Switched Capacitor Circuits", IEEE, 2001.
[7] Dessouky, Kaiser " Input Switch Configuration Suitable for rail to rail operation of switched opamp circuits-- IEEE, Electronics letter, 1999.
[8] R. Lotfi, "Design of High speed, High resolution and low power Analog-to-Digital Converters-- PhD dissertation, 2005.
[9] R.Van de Plassche," CMOS Integrated Analog-to-Digital and Digital to Analog Converters, 2nd Edition, 2003.
[10] Abo, Gray "A 1.5V, 10b 14.3MSpsCMOS Pipeline Analog-to-Digital Converter--, IEEE, Solid State circuits, 1999.
[11] P.E Allen, D.R Holberg, "CMOS Analog Circuit Design", OXFORD University Press, 2002.