**Commenced**in January 2007

**Frequency:**Monthly

**Edition:**International

**Paper Count:**1067

# Search results for: Boolean functions

##### 1067 The Bent and Hyper-Bent Properties of a Class of Boolean Functions

**Authors:**
Yu Lou,
Chunming Tang,
Yanfeng Qi,
Maozhi Xu

**Abstract:**

This paper considers the bent and hyper-bent properties of a class of Boolean functions. For one case, we present a detailed description for them to be hyper-bent functions, and give a necessary condition for them to be bent functions for another case.

**Keywords:**
Boolean functions,
bent functions,
hyper-bent functions,
character sums.

##### 1066 BDD Package Based on Boolean NOR Operation

**Authors:**
M. Raseen,
A.Assi,
P.W. C. Prasad,
A. Harb

**Abstract:**

**Keywords:**
Binary Decision Diagram (BDD),
ITE Operation,
Boolean Function,
NOR operation.

##### 1065 Power-Efficient AND-EXOR-INV Based Realization of Achilles' heel Logic Functions

**Authors:**
Padmanabhan Balasubramanian,
R. Chinnadurai

**Abstract:**

This paper deals with a power-conscious ANDEXOR- Inverter type logic implementation for a complex class of Boolean functions, namely Achilles- heel functions. Different variants of the above function class have been considered viz. positive, negative and pure horn for analysis and simulation purposes. The proposed realization is compared with the decomposed implementation corresponding to an existing standard AND-EXOR logic minimizer; both result in Boolean networks with good testability attribute. It could be noted that an AND-OR-EXOR type logic network does not exist for the positive phase of this unique class of logic function. Experimental results report significant savings in all the power consumption components for designs based on standard cells pertaining to a 130nm UMC CMOS process The simulations have been extended to validate the savings across all three library corners (typical, best and worst case specifications).

**Keywords:**
Achilles' heel functions,
AND-EXOR-Inverter logic,
CMOS technology,
low power design.

##### 1064 Integrating Fast Karnough Map and Modular Neural Networks for Simplification and Realization of Complex Boolean Functions

**Authors:**
Hazem M. El-Bakry

**Abstract:**

**Keywords:**
Boolean Functions,
Simplification,
KarnoughMap,
Implementation of Logic Functions,
Modular NeuralNetworks.

##### 1063 Integrating Fast Karnough Map and Modular Neural Networks for Simplification and Realization of Complex Boolean Functions

**Authors:**
Hazem M. El-Bakry

**Abstract:**

In this paper a new fast simplification method is presented. Such method realizes Karnough map with large number of variables. In order to accelerate the operation of the proposed method, a new approach for fast detection of group of ones is presented. Such approach implemented in the frequency domain. The search operation relies on performing cross correlation in the frequency domain rather than time one. It is proved mathematically and practically that the number of computation steps required for the presented method is less than that needed by conventional cross correlation. Simulation results using MATLAB confirm the theoretical computations. Furthermore, a powerful solution for realization of complex functions is given. The simplified functions are implemented by using a new desigen for neural networks. Neural networks are used because they are fault tolerance and as a result they can recognize signals even with noise or distortion. This is very useful for logic functions used in data and computer communications. Moreover, the implemented functions are realized with minimum amount of components. This is done by using modular neural nets (MNNs) that divide the input space into several homogenous regions. Such approach is applied to implement XOR function, 16 logic functions on one bit level, and 2-bit digital multiplier. Compared to previous non- modular designs, a clear reduction in the order of computations and hardware requirements is achieved.

**Keywords:**
Boolean functions,
simplification,
Karnough map,
implementation of logic functions,
modular neural networks.

##### 1062 Problems of Boolean Reasoning Based Biclustering Parallelization

**Authors:**
Marcin Michalak

**Abstract:**

**Keywords:**
Boolean reasoning,
biclustering,
parallelization,
prime
implicant.

##### 1061 Binary Decision Diagrams: An Improved Variable Ordering using Graph Representation of Boolean Functions

**Authors:**
P.W. C. Prasad,
A. Assi,
A. Harb,
V.C. Prasad

**Abstract:**

This paper presents an improved variable ordering method to obtain the minimum number of nodes in Reduced Ordered Binary Decision Diagrams (ROBDD). The proposed method uses the graph topology to find the best variable ordering. Therefore the input Boolean function is converted to a unidirectional graph. Three levels of graph parameters are used to increase the probability of having a good variable ordering. The initial level uses the total number of nodes (NN) in all the paths, the total number of paths (NP) and the maximum number of nodes among all paths (MNNAP). The second and third levels use two extra parameters: The shortest path among two variables (SP) and the sum of shortest path from one variable to all the other variables (SSP). A permutation of the graph parameters is performed at each level for each variable order and the number of nodes is recorded. Experimental results are promising; the proposed method is found to be more effective in finding the variable ordering for the majority of benchmark circuits.

**Keywords:**
Binary decision diagrams,
graph representation,
Boolean functions representation,
variable ordering.

##### 1060 Application of Genetic Algorithms for Evolution of Quantum Equivalents of Boolean Circuits

**Authors:**
Swanti Satsangi,
Ashish Gulati,
Prem Kumar Kalra,
C. Patvardhan

**Abstract:**

**Keywords:**
Ancillas,
Boolean functions,
Genetic algorithm,
Oracles,
Quantum circuits,
Scratch bit

##### 1059 Systholic Boolean Orthonormalizer Network in Wavelet Domain for Microarray Denoising

**Authors:**
Mario Mastriani

**Abstract:**

We describe a novel method for removing noise (in wavelet domain) of unknown variance from microarrays. The method is based on the following procedure: We apply 1) Bidimentional Discrete Wavelet Transform (DWT-2D) to the Noisy Microarray, 2) scaling and rounding to the coefficients of the highest subbands (to obtain integer and positive coefficients), 3) bit-slicing to the new highest subbands (to obtain bit-planes), 4) then we apply the Systholic Boolean Orthonormalizer Network (SBON) to the input bit-plane set and we obtain two orthonormal otput bit-plane sets (in a Boolean sense), we project a set on the other one, by means of an AND operation, and then, 5) we apply re-assembling, and, 6) rescaling. Finally, 7) we apply Inverse DWT-2D and reconstruct a microarray from the modified wavelet coefficients. Denoising results compare favorably to the most of methods in use at the moment.

**Keywords:**
Bit-Plane,
Boolean Orthonormalization Process,
Denoising,
Microarrays,
Wavelets

##### 1058 Library Aware Power Conscious Realization of Complementary Boolean Functions

**Authors:**
Padmanabhan Balasubramanian,
C. Ardil

**Abstract:**

In this paper, we consider the problem of logic simplification for a special class of logic functions, namely complementary Boolean functions (CBF), targeting low power implementation using static CMOS logic style. The functions are uniquely characterized by the presence of terms, where for a canonical binary 2-tuple, D(mj) ∪ D(mk) = { } and therefore, we have | D(mj) ∪ D(mk) | = 0 [19]. Similarly, D(Mj) ∪ D(Mk) = { } and hence | D(Mj) ∪ D(Mk) | = 0. Here, 'mk' and 'Mk' represent a minterm and maxterm respectively. We compare the circuits minimized with our proposed method with those corresponding to factored Reed-Muller (f-RM) form, factored Pseudo Kronecker Reed-Muller (f-PKRM) form, and factored Generalized Reed-Muller (f-GRM) form. We have opted for algebraic factorization of the Reed-Muller (RM) form and its different variants, using the factorization rules of [1], as it is simple and requires much less CPU execution time compared to Boolean factorization operations. This technique has enabled us to greatly reduce the literal count as well as the gate count needed for such RM realizations, which are generally prone to consuming more cells and subsequently more power consumption. However, this leads to a drawback in terms of the design-for-test attribute associated with the various RM forms. Though we still preserve the definition of those forms viz. realizing such functionality with only select types of logic gates (AND gate and XOR gate), the structural integrity of the logic levels is not preserved. This would consequently alter the testability properties of such circuits i.e. it may increase/decrease/maintain the same number of test input vectors needed for their exhaustive testability, subsequently affecting their generalized test vector computation. We do not consider the issue of design-for-testability here, but, instead focus on the power consumption of the final logic implementation, after realization with a conventional CMOS process technology (0.35 micron TSMC process). The quality of the resulting circuits evaluated on the basis of an established cost metric viz., power consumption, demonstrate average savings by 26.79% for the samples considered in this work, besides reduction in number of gates and input literals by 39.66% and 12.98% respectively, in comparison with other factored RM forms.

**Keywords:**
Reed-Muller forms,
Logic function,
Hammingdistance,
Algebraic factorization,
Low power design.

##### 1057 I-Vague Groups

**Authors:**
Zelalem Teshome Wale

**Abstract:**

**Keywords:**
Involutary dually residuated lattice ordered semigroup,
I-vague set and I-vague group.

##### 1056 I-Vague Normal Groups

**Authors:**
Zelalem Teshome Wale

**Abstract:**

**Keywords:**
Involutary dually residuated lattice ordered semigroup,
I-vague set,
I-vague group and I-vague normal group.

##### 1055 Groebner Bases Computation in Boolean Rings is P-SPACE

**Authors:**
Quoc-Nam Tran

**Abstract:**

**Keywords:**
Algorithm,
Complexity,
Groebner basis,
Applications of Computer Science.

##### 1054 Heuristic Set-Covering-Based Postprocessing for Improving the Quine-McCluskey Method

**Authors:**
Miloš Šeda

**Abstract:**

Finding the minimal logical functions has important applications in the design of logical circuits. This task is solved by many different methods but, frequently, they are not suitable for a computer implementation. We briefly summarise the well-known Quine-McCluskey method, which gives a unique procedure of computing and thus can be simply implemented, but, even for simple examples, does not guarantee an optimal solution. Since the Petrick extension of the Quine-McCluskey method does not give a generally usable method for finding an optimum for logical functions with a high number of values, we focus on interpretation of the result of the Quine-McCluskey method and show that it represents a set covering problem that, unfortunately, is an NP-hard combinatorial problem. Therefore it must be solved by heuristic or approximation methods. We propose an approach based on genetic algorithms and show suitable parameter settings.

**Keywords:**
Boolean algebra,
Karnaugh map,
Quine-McCluskey method,
set covering problem,
genetic algorithm.

##### 1053 New Classes of Salagean type Meromorphic Harmonic Functions

**Authors:**
Hakan Bostancı,
Metin Öztürk

**Abstract:**

In this paper, a necessary and sufficient coefficient are given for functions in a class of complex valued meromorphic harmonic univalent functions of the form f = h + g using Salagean operator. Furthermore, distortion theorems, extreme points, convolution condition and convex combinations for this family of meromorphic harmonic functions are obtained.

**Keywords:**
Harmonic mappings,
Meromorphic functions,
Salagean
operator.

##### 1052 Zeros of Bargmann Analytic Representation in the Complex Plane

**Authors:**
Muna Tabuni

**Abstract:**

The paper contains an investigation of zeros Of Bargmann analytic representation. A brief introduction to Harmonic oscillator formalism is given. The Bargmann analytic representation has been studied. The zeros of Bargmann analytic function are considered. The Q or Husimi functions are introduced. The The Bargmann functions and the Husimi functions have the same zeros. The Bargmann functions f(z) have exactly q zeros. The evolution time of the zeros μn are discussed. Various examples have been given.

**Keywords:**
Bargmann functions,
Husimi functions,
zeros.

##### 1051 Compact Binary Tree Representation of Logic Function with Enhanced Throughput

**Authors:**
Padmanabhan Balasubramanian,
C. Ardil

**Abstract:**

An effective approach for realizing the binary tree structure, representing a combinational logic functionality with enhanced throughput, is discussed in this paper. The optimization in maximum operating frequency was achieved through delay minimization, which in turn was possible by means of reducing the depth of the binary network. The proposed synthesis methodology has been validated by experimentation with FPGA as the target technology. Though our proposal is technology independent, yet the heuristic enables better optimization in throughput even after technology mapping for such Boolean functionality; whose reduced CNF form is associated with a lesser literal cost than its reduced DNF form at the Boolean equation level. For cases otherwise, our method converges to similar results as that of [12]. The practical results obtained for a variety of case studies demonstrate an improvement in the maximum throughput rate for Spartan IIE (XC2S50E-7FT256) and Spartan 3 (XC3S50-4PQ144) FPGA logic families by 10.49% and 13.68% respectively. With respect to the LUTs and IOBUFs required for physical implementation of the requisite non-regenerative logic functionality, the proposed method enabled savings to the tune of 44.35% and 44.67% respectively, over the existing efficient method available in literature [12].

**Keywords:**
Binary logic tree,
FPGA based design,
Boolean
function,
Throughput rate,
CNF,
DNF.

##### 1050 Bilinear and Bilateral Generating Functions for the Gauss’ Hypergeometric Polynomials

**Authors:**
Manoj Singh,
Mumtaz Ahmad Khan,
Abdul Hakim Khan

**Abstract:**

The object of the present paper is to investigate several general families of bilinear and bilateral generating functions with different argument for the Gauss’ hypergeometric polynomials.

**Keywords:**
Appell’s functions,
Gauss hypergeometric functions,
Heat polynomials,
Kampe’ de Fe’riet function,
Laguerre polynomials,
Lauricella’s function,
Saran’s functions.

##### 1049 A Set Theory Based Factoring Technique and Its Use for Low Power Logic Design

**Authors:**
Padmanabhan Balasubramanian,
Ryuta Arisaka

**Abstract:**

Factoring Boolean functions is one of the basic operations in algorithmic logic synthesis. A novel algebraic factorization heuristic for single-output combinatorial logic functions is presented in this paper and is developed based on the set theory paradigm. The impact of factoring is analyzed mainly from a low power design perspective for standard cell based digital designs in this paper. The physical implementation of a number of MCNC/IWLS combinational benchmark functions and sub-functions are compared before and after factoring, based on a simple technology mapping procedure utilizing only standard gate primitives (readily available as standard cells in a technology library) and not cells corresponding to optimized complex logic. The power results were obtained at the gate-level by means of an industry-standard power analysis tool from Synopsys, targeting a 130nm (0.13μm) UMC CMOS library, for the typical case. The wire-loads were inserted automatically and the simulations were performed with maximum input activity. The gate-level simulations demonstrate the advantage of the proposed factoring technique in comparison with other existing methods from a low power perspective, for arbitrary examples. Though the benchmarks experimentation reports mixed results, the mean savings in total power and dynamic power for the factored solution over a non-factored solution were 6.11% and 5.85% respectively. In terms of leakage power, the average savings for the factored forms was significant to the tune of 23.48%. The factored solution is expected to better its non-factored counterpart in terms of the power-delay product as it is well-known that factoring, in general, yields a delay-efficient multi-level solution.

**Keywords:**
Factorization,
Set theory,
Logic function,
Standardcell based design,
Low power.

##### 1048 A P-SPACE Algorithm for Groebner Bases Computation in Boolean Rings

**Authors:**
Quoc-Nam Tran

**Abstract:**

**Keywords:**
Algorithm,
Complexity,
Groebner basis,
Applications
of Computer Science.

##### 1047 Subclasses of Bi-Univalent Functions Associated with Hohlov Operator

**Authors:**
Rashidah Omar,
Suzeini Abdul Halim,
Aini Janteng

**Abstract:**

The coefficients estimate problem for Taylor-Maclaurin series is still an open problem especially for a function in the subclass of bi-univalent functions. A function *f *ϵ* A *is said to be bi-univalent in the open unit disk *D* if both *f *and *f ^{-1}* are univalent in

*D*. The symbol

*A*denotes the class of all analytic functions

*f*in

*D*and it is normalized by the conditions

*f*(0) =

*f’*(0) – 1=0. The class of bi-univalent is denoted by The subordination concept is used in determining second and third Taylor-Maclaurin coefficients. The upper bound for second and third coefficients is estimated for functions in the subclasses of bi-univalent functions which are subordinated to the function φ. An analytic function

*f*is subordinate to an analytic function

*g*if there is an analytic function

*w*defined on

*D*with

*w*(0) = 0 and |

*w*(z)| < 1 satisfying

*f*(

*z*) =

*g*[

*w*(

*z*)]. In this paper, two subclasses of bi-univalent functions associated with Hohlov operator are introduced. The bound for second and third coefficients of functions in these subclasses is determined using subordination. The findings would generalize the previous related works of several earlier authors.

**Keywords:**
Analytic functions,
bi-univalent functions,
Hohlov operator,
subordination.

##### 1046 Unconventional Calculus Spreadsheet Functions

**Authors:**
Chahid K. Ghaddar

**Abstract:**

**Keywords:**
Calculus functions,
nonlinear systems,
differential algebraic equations,
solvers,
spreadsheet.

##### 1045 Geometric Properties and Neighborhood for Certain Subclasses of Multivalent Functions

**Authors:**
Hesam Mahzoon

**Abstract:**

By using the two existing operators, we have defined an operator, which is an extension for them. In this paper, first the operator is introduced. Then, using this operator, the subclasses of multivalent functions are defined. These subclasses of multivalent functions are utilized in order to obtain coefficient inequalities, extreme points, and integral means inequalities for functions belonging to these classes.

**Keywords:**
Coefficient inequalities,
extreme points,
integral means,
multivalent functions,
Al-Oboudi operator,
and Sãlãgean operator.

##### 1044 Hardware Stream Cipher Based On LFSR and Modular Division Circuit

**Authors:**
Deepthi P.P.,
P.S. Sathidevi

**Abstract:**

Proposal for a secure stream cipher based on Linear Feedback Shift Registers (LFSR) is presented here. In this method, shift register structure used for polynomial modular division is combined with LFSR keystream generator to yield a new keystream generator with much higher periodicity. Security is brought into this structure by using the Boolean function to combine state bits of the LFSR keystream generator and taking the output through the Boolean function. This introduces non-linearity and security into the structure in a way similar to the Non-linear filter generator. The security and throughput of the suggested stream cipher is found to be much greater than the known LFSR based structures for the same key length.

**Keywords:**
Linear Feedback Shift Register,
Stream Cipher,
Filter generator,
Keystream generator,
Modular division circuit

##### 1043 Design of MBMS Client Functions in the Mobile

**Authors:**
Jaewook Shin,
Aesoon Park

**Abstract:**

**Keywords:**
BM-SC,
Broadcast,
MBMS,
Mobile,
Multicast.

##### 1042 Power and Delay Optimized Graph Representation for Combinational Logic Circuits

**Authors:**
Padmanabhan Balasubramanian,
Karthik Anantha

**Abstract:**

**Keywords:**
AND-Inverter Graph,
OR-Inverter Graph,
DirectedAcyclic Graph,
Low power design,
Delay optimization.

##### 1041 Properties and Approximation Distribution Reductions in Multigranulation Rough Set Model

**Authors:**
Properties,
Approximation Distribution Reductions in Multigranulation Rough Set Model

**Abstract:**

Some properties of approximation sets are studied in multi-granulation optimist model in rough set theory using maximal compatible classes. The relationships between or among lower and upper approximations in single and multiple granulation are compared and discussed. Through designing Boolean functions and discernibility matrices in incomplete information systems, the lower and upper approximation sets and reduction in multi-granulation environments can be found. By using examples, the correctness of computation approach is consolidated. The related conclusions obtained are suitable for further investigating in multiple granulation RSM.

**Keywords:**
Incomplete information system,
maximal compatible class,
multi-granulation rough set model,
reduction.

##### 1040 Performance Evaluation of Complex Valued Neural Networks Using Various Error Functions

**Authors:**
Anita S. Gangal,
P. K. Kalra,
D. S. Chauhan

**Abstract:**

**Keywords:**
Complex backpropagation algorithm,
complex errorfunctions,
complex valued neural network,
split activation function.

##### 1039 Performance Evaluation of Popular Hash Functions

**Authors:**
Sheena Mathew,
K. Poulose Jacob

**Abstract:**

**Keywords:**
Cryptography,
Hash function,
JERIM-320,
Messageintegrity

##### 1038 Operational Representation of Certain Hypergeometric Functions by Means of Fractional Derivatives and Integrals

**Authors:**
Manoj Singh,
Mumtaz Ahmad Khan,
Abdul Hakim Khan

**Abstract:**

The investigation in the present paper is to obtain certain types of relations for the well known hypergeometric functions by employing the technique of fractional derivative and integral.

**Keywords:**
Fractional Derivatives and Integrals,
Hypergeometric
functions.