Search results for: Saisundar Sankaranarayanan

6 An Efficient Digital Baseband ASIC for Wireless Biomedical Signals Monitoring

Authors: Kah-Hyong Chang, Xin Liu, Jia Hao Cheong, Saisundar Sankaranarayanan, Dexing Pang, Hongzhao Zheng

Abstract:

A digital baseband Application-Specific Integrated Circuit (ASIC) (yclic Redundancy Checkis developed for a microchip transponder to transmit signals and temperature levels from biomedical monitoring devices. The transmission protocol is adapted from the ISO/IEC 11784/85 standard. The module has a decimation filter that employs only a single adder-subtractor in its datapath. The filtered output is coded with cyclic redundancy check and transmitted through backscattering Load Shift Keying (LSK) modulation to a reader. Fabricated using the 0.18-μm CMOS technology, the module occupies 0.116 mm² in chip area (digital baseband: 0.060 mm², decimation filter: 0.056 mm²), and consumes a total of less than 0.9 μW of power (digital baseband: 0.75 μW, decimation filter: 0.14 μW).

Keywords: Biomedical sensor, decimation filter, Radio Frequency Integrated Circuit (RFIC) baseband, temperature sensor.

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5 Transformerless AC-DC Converter

Authors: Saisundar. S., I Made Darmayuda, Zhou Jun, Krishna Mainali, Simon Ng Sheung Yan, Eran Ofek

Abstract:

This paper compares the recent transformerless ACDC power converter architectures and provides an assessment of each. A prototype of one of the transformerless AC-DC converter architecture is also presented depicting the feasibility of a small form factor, power supply design. In this paper component selection guidelines to achieve high efficiency AC-DC power conversion are also discussed.

Keywords: AC-DC converter, digitally controlled, switched mode power supply, transformerless.

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4 14-Bit 1MS/s Cyclic-Pipelined ADC

Authors: S. Saisundar, Shan Jiang, Kevin T. C. Chai, David Nuttman, Minkyu Je

Abstract:

This paper presents a 14-bit cyclic-pipelined Analog to digital converter (ADC) running at 1 MS/s. The architecture is based on a 1.5-bit per stage structure utilizing digital correction for each stage. The ADC consists of two 1.5-bit stages, one shift register delay line, and digital error correction logic. Inside each 1.5-bit stage, there is one gain-boosting op-amp and two comparators. The ADC was implemented in 0.18µm CMOS process and the design has an area of approximately 0.2 mm². The ADC has a differential input range of 1.2 Vpp. The circuit has an average power consumption of 3.5mA with 10MHz sampling clocks. The post-layout simulations of the design satisfy 12-bit SNDR with a full-scale sinusoid input.

Keywords: Analog to digital converter, cyclic, gain-boosting, pipelined.

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3 Secure Resource Selection in Computational Grid Based on Quantitative Execution Trust

Authors: G.Kavitha, V.Sankaranarayanan

Abstract:

Grid computing provides a virtual framework for controlled sharing of resources across institutional boundaries. Recently, trust has been recognised as an important factor for selection of optimal resources in a grid. We introduce a new method that provides a quantitative trust value, based on the past interactions and present environment characteristics. This quantitative trust value is used to select a suitable resource for a job and eliminates run time failures arising from incompatible user-resource pairs. The proposed work will act as a tool to calculate the trust values of the various components of the grid and there by improves the success rate of the jobs submitted to the resource on the grid. The access to a resource not only depend on the identity and behaviour of the resource but also upon its context of transaction, time of transaction, connectivity bandwidth, availability of the resource and load on the resource. The quality of the recommender is also evaluated based on the accuracy of the feedback provided about a resource. The jobs are submitted for execution to the selected resource after finding the overall trust value of the resource. The overall trust value is computed with respect to the subjective and objective parameters.

Keywords: access control, feedback, grid computing, reputation, security, trust, trust parameter.

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2 Ultra Fast Solid State Ground Fault Isolator

Authors: I Made Darmayuda, Zhou Jun, Krishna Mainali, Simon Ng Sheung Yan, Saisundar S, Eran Ofek

Abstract:

Personnel protection devices are cardinal in safety hazard applications. They are widely used in home, office and in industry environments to reduce the risk of lethal shock to human being and equipment safety. This paper briefly reviews various personnel protection devices also describes the basic working principle of conventional ground fault circuit interrupter (GFCI) or ground fault isolator (GFI), its disadvantages and ways to overcome the disadvantages with solid-state relay (SSR) based GFI with ultrafast response up on fault implemented in printed circuit board. This solid state GFI comprises discrete MOSFET based alternating current (AC) switches, linear optical amplifier, photovoltaic isolator and sense resistor. In conventional GFI, current transformer is employed as a sensing element to detect the difference in current flow between live and neutral conductor. If there is no fault in equipment powered through GFI, due to insulation failure of internal wires and windings of motors, both live and neutral currents will be equal in magnitude and opposite in phase.

Keywords: current transformer, electrocution, GFCI, GFI

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1 A Content Analysis of Sustainability Reporting to Frame the Heterogeneity in Corporate Environment Sustainability Practices

Authors: Venkataraman Sankaranarayanan, Sougata Ray

Abstract:

While extant research has examined many aspects of differential corporate environmental outcomes and behavior, a holistic and integrated view of heterogeneity in corporate environment sustainability (CES) practices remains a puzzle to be fully unraveled – its extent and nature, its relationship to macro or micro level influences, or strategic orientations. Such a perspective would be meaningful for the field given notable strides in CES practices and the corporate social responsibility agenda over the last two decades, in the backdrop of altered global socio-political sensitivities and technological advances. To partly address this gap, this exploratory research adopted a content analysis approach to code patterns in the sustainability disclosures of the 160 largest global firms spread over 8 years. The sample of firms spanned seven industries, nine countries and three continents thereby presenting data rich and diverse enough in several dimensions to be representative of global heterogeneity in CES practices. Through a factor analysis of the coded data, four strategic CES orientations were extracted through the analysis, that effectively straddles most of the variation observed in current CES practices – one that seeks to reduce environmental damage on account of the firm’s operations, another that prioritizes minimalism, a third that focuses on broader ecological status quo, and a final one that champions the ‘business of green’, extending the CES agenda beyond the firm’s boundaries. These environment sustainability strategy orientations are further examined to elicit prominent patterns and explore plausible antecedents.

Keywords: Corporate sustainability, corporate social responsibility, corporate environmental management, environmental strategy.

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