Search results for: impact of gate material

Authors: Gustavo Rodrigues, Hans Weber, Larissa Driemeier

Abstract:

The prevision of post-impact conditions and the behavior of the bodies during the impact have been object of several collision models. The formulation from Hertz’s theory is generally used dated from the 19^th century. These models consider the repulsive force as proportional to the deformation of the bodies under contact and may consider it proportional to the rate of deformation. The objective of the present work is to analyze the behavior of the bodies during impact using the Finite Element Method (FEM) with elastic and plastic material models. The main parameters to evaluate are, the contact force, the time of contact and the deformation of the bodies. An advantage of using the FEM approach is the possibility to apply a plastic deformation to the model according to the material definition: there will be used Johnson–Cook plasticity model whose parameters are obtained through empirical tests of real materials. This model allows analyzing the permanent deformation caused by impact, phenomenon observed in real world depending on the forces applied to the body. These results are compared between them and with the model-based Hertz theory.

Keywords: Collision, finite element method, Hertz’s Theory, impact models.

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Authors: Florian Gschösser, Walter Purrer

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The paper shows examples for the (environmental) optimization of production processes for asphalt mixtures applied for typical road pavements in Austria and Switzerland. The conducted “from-cradle-to-gate” LCA firstly analyzes the production one cubic meter of asphalt and secondly all material production processes for exemplary highway pavements applied in Austria and Switzerland. It is shown that environmental impacts can be reduced by the application of reclaimed asphalt pavement (RAP) and by the optimization of specific production characteristics, e.g. the reduction of the initial moisture of the mineral aggregate and the reduction of the mixing temperature by the application of low-viscosity and foam bitumen. The results of the LCA study demonstrate reduction potentials per cubic meter asphalt of up to 57 % (Global Warming Potential–GWP) and 77 % (Ozone depletion–ODP). The analysis per square meter of asphalt pavement determined environmental potentials of up to 40 % (GWP) and 56 % (ODP).

Keywords: Asphalt mixtures, environmental potentials, life cycle assessment, material production.

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Authors: Bachir Kacimi, Fatiha Teklal, Arezki Djebbar

Abstract:

Forming processes induce residual deformations on the reinforcement and sometimes lead to mesoscopic defects, which are more recurrent than macroscopic defects during the manufacture of complex structural parts. This study deals with the influence of the fabric shear and buckles defects, which appear during draping processes of composite, on the impact behavior of a glass fiber reinforced polymer. To achieve this aim, we produced several specimens with different amplitude of deformations (shear) and defects on the fabric using a specific bench. The specimens were manufactured using the contact molding and tested with several impact energies. The results and measurements made on tested specimens were compared to those of the healthy material. The results showed that the buckle defects have a negative effect on elastic parameters and revealed a larger damage with significant out-of-plane mode relatively to the healthy composite material. This effect is the consequence of a local fiber impoverishment and a disorganization of the fibrous network, with a reorientation of the fibers following the out-of-plane buckling of the yarns, in the area where the defects are located. For the material with calibrated shear of the reinforcement, the increased local fiber rate due to the shear deformations and the contribution to stiffness of the transverse yarns led to an increase in mechanical properties.

Keywords: Defects, forming, impact, induced properties, textiles.

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Authors: Xiang Li, Zhixian Chen, Zheng Fang, Aashit Kamath, Xinpeng Wang, Navab Singh, Guo-Qiang Lo, Dim-Lee Kwong

Abstract:

We integrate TiN/Ni/HfO2/Si RRAM cell with a vertical gate-all-around (GAA) nanowire transistor to achieve compact 4F2 footprint in a 1T1R configuration. The tip of the Si nanowire (source of the transistor) serves as bottom electrode of the memory cell. Fabricated devices with nanowire diameter ~ 50nm demonstrate ultra-low current/power switching; unipolar switching with 10μA/30μW SET and 20μA/30μW RESET and bipolar switching with 20nA/85nW SET and 0.2nA/0.7nW RESET. Further, the switching current is found to scale with nanowire diameter making the architecture promising for future scaling.

Keywords: RRAM, 1T1R, gate-all-around FET, nanowire FET, vertical MOSFETs

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Authors: Jae-Chang Kwak, Yong-Seo Koo

Abstract:

The high efficiency power management IC (PMIC) with switching device is presented in this paper. PMIC is controlled with PFM control method in order to have high power efficiency at high current level. Dynamic Threshold voltage CMOS (DT-CMOS) with low on-resistance is designed to decrease conduction loss. The threshold voltage of DT-CMOS drops as the gate voltage increase, resulting in a much higher current handling capability than standard MOSFET. PFM control circuits consist of a generator, AND gate and comparator. The generator is made to have 1.2MHz oscillation voltage. The DC-DC converter based on PFM control circuit and low on-resistance switching device is presented in this paper.

Keywords: DT-CMOS, PMIC, PFM, DC-DC converter.

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Authors: V. Tawiwat, S. Sarawut

Abstract:

Applied a mouse-s roller with a gripper to increase the efficiency for a gripper can learn to a material handling without slipping. To apply a gripper, we use the optimize principle to develop material handling by use a signal for checking a roller mouse that rotate or not. In case of the roller rotates means that the material slips. A gripper will slide to material handling until the roller will not rotate. As this experiment has test material handling for comparing a grip force that uses to material handling of the 10-human with the applied gripper. We can summarize that human exert the material handling more than the applied gripper. Because of the gripper can exert more befit to material handling than human and may be a minimum force to lift a material without slipping.

Keywords: Optimize, Gripper, Mouse's Roller, Minimum Force.

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Authors: G. Renuka Devi

Abstract:

This paper analyzes the experimental investigation of indirect field oriented control of Field Programmable Gate Array (FPGA) based five-phase induction motor drive. A detailed d-q modeling and Space Vector Pulse Width Modulation (SVPWM) technique of 5-phase drive is elaborated in this paper. In the proposed work, the prototype model of 1 hp 5-phase Voltage Source Inverter (VSI) fed drive is implemented in hardware. SVPWM pulses are generated in FPGA platform through Very High Speed Integrated Circuit Hardware Description Language (VHDL) coding. The experimental results are observed under different loading conditions and compared with simulation results to validate the simulation model.

Keywords: Five-phase induction motor drive, field programmable gate array, indirect field oriented control, multi-phase, space vector pulse width modulation, voltage source inverter, very high speed integrated circuit hardware description language.

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Authors: Sahil, Rajeev Saha, Sanjeev Kumar

Abstract:

Material selection is one of the key issues for the production of reliable and quality products in industries. A number of materials are available for a single product due to which material selection become a difficult task. The aim of this paper is to select appropriate material for gear used in fuel pump by using Graph Theory and Matrix Approach (GTMA). GTMA is a logical and systematic approach that can be used to model and analyze various engineering systems. In present work, four alternative material and their seven attributes are used to identify the best material for given product.

Keywords: Material, GTMA, MADM, digraph, decision making.

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Authors: C. Worakitjaroenphon, A. Oonsivilai

Abstract:

The study of piezoelectric material in the past was in T-Domain form; however, no one has studied piezoelectric material in the S-Domain form. This paper will present the piezoelectric material in the transfer function or S-Domain model. S-Domain is a well known mathematical model, used for analyzing the stability of the material and determining the stability limits. By using S-Domain in testing stability of piezoelectric material, it will provide a new tool for the scientific world to study this material in various forms.

Keywords: Piezoelectric, Stability, S-Domain, Transfer function

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Authors: Shobha Sharma, Amita Dev

Abstract:

This research paper presents highly optimized barrel shifter at 22nm Hi K metal gate strained Si technology node. This barrel shifter is having a unique combination of static and dynamic body bias which gives lowest power delay product. This power delay product is compared with the same circuit at same technology node with static forward biasing at ‘supply/2’ and also with normal reverse substrate biasing and still found to be the lowest. The power delay product of this barrel sifter is .39362X10-17J and is lowered by approximately 78% to reference proposed barrel shifter at 32nm bulk CMOS technology. Power delay product of barrel shifter at 22nm Hi K Metal gate technology with normal reverse substrate bias is 2.97186933X10-17J and can be compared with this design’s PDP of .39362X10-17J. This design uses both static and dynamic substrate biasing and also has approximately 96% lower power delay product compared to only forward body biased at half of supply voltage. The NMOS model used are predictive technology models of Arizona state university and the simulations to be carried out using HSPICE simulator.

Keywords: Dynamic body biasing, highly optimized barrel shifter, PDP, Static body biasing.

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Authors: Farid Moshgelani, Dhamin Al-Khalili, Côme Rozon

Abstract:

In this paper, FinFET devices are analyzed with emphasis on sub-threshold leakage current control. This is achieved through proper biasing of the back gate, and through the use of asymmetric work functions for the four terminal FinFET devices. We are also examining different configurations of multiplexers and XOR gates using transistors of symmetric and asymmetric work functions. Based on extensive characterization data for MUX circuits, our proposed configuration using symmetric devices lead to leakage current and delay improvements of 65% and 47% respectively compared to results in the literature. For XOR gates, a 90% improvement in the average leakage current is achieved by using asymmetric devices. All simulations are based on a 25nm FinFET technology using the University of Florida UFDG model.

Keywords: FinFET, logic functions, asymmetric workfunction devices, back gate biasing, sub-threshold leakage current.

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Authors: Rehab Abdullah Shendi

Abstract:

The use of customised soft-core processors in which instructions can be integrated into a system in application hardware is increasing in the Field Programmable Gate Array (FPGA) field. Specifically, the partial run-time reconfiguration of FPGAs in specialised processors for a particular domain can be very beneficial. In this report, the design and implementation for the customisation of a soft-core MIPS processor using an FPGA and partial reconfiguration (PR) of FPGA technology will be addressed to achieve efficient resource use. This can be achieved using a PR design flow that helps the design fit into a smaller device. Moreover, the impact of static power consumption could be reduced due to runtime reconfiguration. This will be done by configurable custom instructions implemented in the hardware as an extension on the MIPS CPU. The aim of this project is to investigate the PR of FPGAs for run-time adaptations of the instruction set of a soft-core CPU, including the integration of custom instructions and the exploration of the potential to use the MultiBoot feature available in Xilinx FPGAs to carry out the PR process. The system will be evaluated and tested on a Nexus 3 development board featuring a Xilinx Spartran-6 FPGA. The system will be able to load reconfigurable custom instructions dynamically into user programs with the help of the trap handler when the custom instruction is called by the MIPS CPU. The results of this experiment demonstrate that custom instructions in hardware can speed up a certain function and many instructions can be saved when compared to a software implementation of the same function. Implementing custom instructions in hardware is perfectly possible and worth exploring.

Keywords: Customisation, FPGA, MIPS, partial reconfiguration.

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Authors: M. M. Karkhanehchi, A. Ammani

Abstract:

A simple analytical model has been developed to optimize biasing conditions for obtaining maximum linearity among lattice-matched, pseudomorphic and metamorphic HEMT types as well as enhancement and depletion HEMT modes. A nonlinear current-voltage model has been simulated based on extracted data to study and select the most appropriate type and mode of HEMT in terms of a given gate-source biasing voltage within the device so as to employ the circuit for the highest possible output current or voltage linear swing. Simulation results can be used as a basis for the selection of optimum gate-source biasing voltage for a given type and mode of HEMT with regard to a circuit design. The consequences can also be a criterion for choosing the optimum type or mode of HEMT for a predetermined biasing condition.

Keywords: Biasing, characteristic, linearity, simulation.

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Authors: W. V. W. H. Wickramaarachchi, S. Walpalage, S. M. Egodage

Abstract:

Thermoplastic elastomer (TPE) is a multifunctional polymeric material which possesses a combination of excellent properties of parent materials. Basically, TPE has a rubber phase and a thermoplastic phase which gives processability as thermoplastics. When the rubber phase is partially or fully crosslinked in the thermoplastic matrix, TPE is called as thermoplastic elastomer vulcanizate (TPV). If the rubber phase is non-crosslinked, it is called as thermoplastic elastomer olefin (TPO). Nowadays TPEs are introduced into the commercial market with different products. However, the application of TPE as a roofing material is limited. Out of the commercially available roofing products from different materials, only single ply roofing membranes and plastic roofing sheets are produced from rubbers and plastics. Natural rubber (NR) and high density polyethylene (HDPE) are used in various industrial applications individually with some drawbacks. Therefore, this study was focused to develop both TPO and TPV blends from NR and HDPE at different compositions and then to identify the best blend composition to use as a roofing material. A series of blends by varying NR loading from 10 wt% to 50 wt%, at 10 wt% intervals, were prepared using a twin screw extruder. Dicumyl peroxide was used as a crosslinker for TPV. The standard properties for a roofing material like tensile properties tear strength, hardness, impact strength, water absorption, swell/gel analysis and thermal characteristics of the blends were investigated. Change of tensile strength after exposing to UV radiation was also studied. Tensile strength, hardness, tear strength, melting temperature and gel content of TPVs show higher values compared to TPOs at every loading studied, while water absorption and swelling index show lower values, suggesting TPVs are more suitable than TPOs for roofing applications. Most of the optimum properties were shown at 10/90 (NR/HDPE) composition. However, high impact strength and gel content were shown at 20/80 (NR/HDPE) composition. Impact strength, as being an energy absorbing property, is the most important for a roofing material in order to resist impact loads. Therefore, 20/80 (NR/HDPE) is identified as the best blend composition. UV resistance and other properties required for a roofing material could be achieved by incorporating suitable additives to TPVs.

Keywords: Thermoplastic elastomer, natural rubber, high density polyethylene, roofing material.

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Authors: M. Arockia Jaswin, D. Mohan Lal

Abstract:

Cryogenic treatment is the process of cooling a material to extremely low temperatures to generate enhanced mechanical and physical properties. The purpose of this study is to examine the effect of cryogenic treatment on the impact behavior of En 52 and 21-4N valve steels. The valve steels are subjected to shallow (193 K) and deep cryogenic treatment (85 K), and the impact behavior is compared with the valve steel materials subjected to conventional heat treatment. The impact test is carried out in accordance with the ASTM E 23-02a standard. The results show an improvement of 23 % in the impact energy for the En 52 deep cryo-treated samples when compared to that of the conventionally heat treated samples. It is revealed that during cryogenic treatment fine platelets of martensite are formed from the retained austenite, and these platelets promote the precipitation of fine carbides by a diffusion mechanism during tempering.

Keywords: Cryogenic treatment, valve steel, Fractograph, carbides, impact strength.

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Authors: Spyridon Nikolaidis

Abstract:

A modeling approach for CMOS gates is presented based on the use of the equivalent inverter. A new model for the inverter has been developed using a simplified transistor current model which incorporates the nanoscale effects for the planar technology. Parametric expressions for the output voltage are provided as well as the values of the output and supply current to be compatible with the CCS technology. The model is parametric according the input signal slew, output load, transistor widths, supply voltage, temperature and process. The transistor widths of the equivalent inverter are determined by HSPICE simulations and parametric expressions are developed for that using a fitting procedure. Results for the NAND gate shows that the proposed approach offers sufficient accuracy with an average error in propagation delay about 5%.

Keywords: CMOS gate modeling, Inverter modeling, transistor current model, timing model.

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Authors: Hai-Qing Xie, Yun Zeng, Yong-Hong Yan, Jian-Ping Zeng, Tai-Hong Wang

Abstract:

Photo-BJMOSFET (Bipolar Junction Metal-Oxide- Semiconductor Field Effect Transistor) fabricated on SOI film was proposed. ITO film is adopted in the device as gate electrode to reduce light absorption. Depletion region but not inversion region is formed in film by applying gate voltage (but low reverse voltage) to achieve high photo-to-dark-current ratio. Comparisons of photoelectriccharacteristics executed among VGK=0V, 0.3V, 0.6V, 0.9V and 1.0V (reverse voltage VAK is equal to 1.0V for total area of 10×10μm2). The results indicate that the greatest improvement in photo-to-dark-current ratio is achieved up to 2.38 at VGK=0.6V. In addition, photo-BJMOSFET is compatible with CMOS integration due to big input resistance

Keywords: Photo-BJMOSFET, Responsivity, Sensitivity, Spectral response.

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Authors: C. Kumjeera, T. Unchim, B. Marungsri, A. Oonsivilai

Abstract:

The study of piezoelectric material in the past was in T-Domain form; however, no one has studied piezoelectric material in the S-Domain form. This paper will present the piezoelectric material in the transfer function or S-Domain model. S-Domain is a well known mathematical model, used for analyzing the stability of the material and determining the stability limits. By using S-Domain in testing stability of piezoelectric material, it will provide a new tool for the scientific world to study this material in various forms.

Keywords: Hard disk drive, failure analysis, tool, time

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Authors: N. Massoum, A. Guen. Bouazza, B. Bouazza, A. El Ouchdi

Abstract:

The progress of industry integrated circuits in recent years has been pushed by continuous miniaturization of transistors. With the reduction of dimensions of components at 0.1 micron and below, new physical effects come into play as the standard simulators of two dimensions (2D) do not consider. In fact the third dimension comes into play because the transverse and longitudinal dimensions of the components are of the same order of magnitude. To describe the operation of such components with greater fidelity, we must refine simulation tools and adapted to take into account these phenomena. After an analytical study of the static characteristics of the component, according to the different operating modes, a numerical simulation is performed of field-effect transistor with submicron gate MESFET GaInP. The influence of the dimensions of the gate length is studied. The results are used to determine the optimal geometric and physical parameters of the component for their specific applications and uses.

Keywords: Monte Carlo simulation, transient electron transport, MESFET device.

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Authors: Cheng-Hsien Chang, Jyi-Tsong Lin, Po-Hsieh Lin, Hung-Pei Hsu, Chan-Hsiang Chang, Ming-Tsung Shih, Shih-Chuan Tseng, Min-Yan Lin

Abstract:

In this paper, we have proposed a novel FinFET with extended body under the poly gate, which is called EB-FinFET, and its characteristic is demonstrated by using three-dimensional (3-D) numerical simulation. We have analyzed and compared it with conventional FinFET. The extended body height dependence on the drain induced barrier lowering (DIBL) and subthreshold swing (S.S) have been also investigated. According to the 3-D numerical simulation, the proposed structure has a firm structure, an acceptable short channel effect (SCE), a reduced series resistance, an increased on state drain current (I on) and a large normalized I DS. Furthermore, the structure can also improve corner effect and reduce self-heating effect due to the extended body. Our results show that the EBFinFET is excellent for nanoscale device.

Keywords: SOI, FinFET, tri-gate, self-heating effect.

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Authors: Hung-Pei Hsu, Jyi-Tsong Lin, Po-Hsieh Lin, Cheng-Hsien Chang, Ming-Tsung Shih, Chan-Hsiang Chang, Shih-Chuan Tseng, Min-Yan Lin, Shih-Wen Hsu

Abstract:

In this paper, we propose a novel metal oxide semiconductor field effect transistor with L-shaped channel structure (LMOS), and several type of L-shaped structures are also designed, studied and compared with the conventional MOSFET device for the same average gate length (Lavg). The proposed device electrical characteristics are analyzed and evaluated by three dimension (3-D) ISE-TCAD simulator. It can be confirmed that the LMOS devices have higher on-state drain current and both lower drain-induced barrier lowering (DIBL) and subthreshold swing (S.S.) than its conventional counterpart has. In addition, the transconductance and voltage gain properties of the LMOS are also improved.

Keywords: Average gate length (Lavg), drain-induced barrier lowering (DIBL), L-shaped channel MOSFET (LMOS), subthreshold swing (S.S.).

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Authors: Wei Zhang

Abstract:

With the rapid development of deep learning, neural network and deep learning algorithms play a significant role in various practical applications. Due to the high accuracy and good performance, Convolutional Neural Networks (CNNs) especially have become a research hot spot in the past few years. However, the size of the networks becomes increasingly large scale due to the demands of the practical applications, which poses a significant challenge to construct a high-performance implementation of deep learning neural networks. Meanwhile, many of these application scenarios also have strict requirements on the performance and low-power consumption of hardware devices. Therefore, it is particularly critical to choose a moderate computing platform for hardware acceleration of CNNs. This article aimed to survey the recent advance in Field Programmable Gate Array (FPGA)-based acceleration of CNNs. Various designs and implementations of the accelerator based on FPGA under different devices and network models are overviewed, and the versions of Graphic Processing Units (GPUs), Application Specific Integrated Circuits (ASICs) and Digital Signal Processors (DSPs) are compared to present our own critical analysis and comments. Finally, we give a discussion on different perspectives of these acceleration and optimization methods on FPGA platforms to further explore the opportunities and challenges for future research. More helpfully, we give a prospect for future development of the FPGA-based accelerator.

Keywords: Deep learning, field programmable gate array, FPGA, hardware acceleration, convolutional neural networks, CNN.

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Authors: Abdelouahab Bouttout, Mohamed Amara

Abstract:

The present paper examines the impact noise transmission through some floor building assemblies. The Acoubat software numerical simulation has been used to simulate the impact noise transmission through different floor configurations used in Algerian construction mode. The results are compared with the available measurements. We have developed two experimental methods, i) field method, and ii) laboratory method using Brüel and Kjær equipments. The results show that the different cases of floor configurations need some improvement to ensure the acoustic comfort in the receiving apartment. The recommended value of the impact sound level in the receiving room should not exceed 58 dB. The important results obtained in this paper can be used as platform to improve the Algerian building acoustic regulation aimed at the construction of the multi-storey residential building.

Keywords: Impact noise, building acoustic, floor insulation, resilient material.

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Authors: Sachin Kamble, Shradha Gawankar

Abstract:

This paper presents the findings of successful implementation of Business Process Reengineering (BPR) of cement dispatch activities in a cement manufacturing plant located in India. Simulation model was developed for the purpose of identifying and analyzing the areas for improvement. The company was facing a problem of low throughput rate and subsequent forced stoppages of the plant leading to a high production loss of 15000MT per month. It was found from the study that the present systems and procedures related to the in-plant logistics plant required significant changes. The major recommendations included process improvement at the entry gate, reducing the cycle time at the security gate and installation of an additional weigh bridge. This paper demonstrates how BPR can be implemented for improving the in-plant logistics process. Various recommendations helped the plant to increase its throughput by 14%.

Keywords: Business process reengineering, simulation modeling, in-plant logistics, distribution process, cement industry.

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Authors: Dong Wook Lee

Abstract:

This paper describes a method for analyzing penetration for composite material using an explicit nonlinear Finite Element Analysis (FEA). This method may be used in the early stage of design for the protection of military vehicles, aircraft engines and nuclear power plant structures made of composite materials. This paper deals with simple ballistic penetration tests for composite materials and the FEA modeling method and results. The FEA was performed to interpret the ballistic field test phenomenon regarding the damage propagation in the structure subjected to local foreign object impact.

Keywords: Computer Aided Engineering, CAE, Finite Element Analysis, FEA, impact analysis, penetration analysis, composite material.

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Authors: D. Kliaugaitė, J. K, Staniškis

Abstract:

In this study tree types of multilayer gas barrier plastic packaging films were compared using life cycle assessment as a tool for resource efficient and environmentally low-impact materials selection. The first type of multilayer packaging film (PET-AlOx/LDPE) consists of polyethylene terephthalate with barrier layer AlOx (PET-AlOx) and low density polyethylene (LDPE). The second type of polymer film (PET/PE-EVOH-PE) is made of polyethylene terephthalate (PET) and co-extrusion film PE-EVOH-PE as barrier layer. And the third one type of multilayer packaging film (PET-PVOH/LDPE) is formed from polyethylene terephthalate with barrier layer PVOH (PET-PVOH) and low density polyethylene (LDPE).

All of analyzed packaging has significant impact to resource depletion, because of raw materials extraction and energy use and production of different kind of plastics. Nevertheless the impact generated during life cycle of functional unit of II type of packaging (PET/PE-EVOH-PE) was about 25% lower than impact generated by I type (PET-AlOx/LDPE) and III type (PET-PVOH/LDPE) of packaging.

Result revealed that the contribution of different gas barrier type to the overall environmental problem of packaging is not significant. The impact are mostly generated by using energy and materials during raw material extraction and production of different plastic materials as plastic polymers material as PE, LDPE and PET, but not gas barrier materials as AlOx, PVOH and EVOH.

The LCA results could be useful in different decision-making processes, for selecting resource efficient and environmentally low-impact materials.

Keywords: Polymer packaging, life cycle assessment, resource efficiency.

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Authors: C. Kalamani, V. Abishek Karthick, S. Anitha, K. Kavin Kumar

Abstract:

The fault tolerant system plays a crucial role in the critical applications which are being used in the present scenario. A fault may change the functionality of circuits. Aim of this paper is to design multiplier using fault tolerant hybrid full adder. Fault tolerant hybrid full adder is designed to check and repair any fault in the circuit using self-checking circuit and the self-repairing circuit. Further, the use of conventional logic circuits may result in more area, delay as well as power consumption. In order to reduce these parameters of the circuit, GDI (Gate Diffusion Input) techniques with less number of transistors are used compared to conventional full adder circuit. This reduces the area, delay and power consumption. The proposed method solves the major problems occurring in the most crucial and critical applications.

Keywords: Gate diffusion input, hybrid full adder, self-checking, fault tolerant.

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Authors: Robert J. Thomas, Colton Bedke, Andrew Sorensen

Abstract:

The exemplary mechanical performance and durability of ultra-high performance concrete (UHPC) has led to its rapid emergence as an advanced cementitious material. The uncharacteristically high mechanical strength and ductility of UHPC makes it a promising potential material for defense structures which may be subject to highly dynamic loads like impact or blast. However, the mechanical response of UHPC under dynamic loading has not been fully characterized. In particular, there is a need to characterize the energy absorption of UHPC under high-frequency shear loading. This paper presents preliminary results from a parametric study of the dynamic shear energy absorption of UHPC using the Charpy impact test. UHPC mixtures with compressive strengths in the range of 100-150 MPa exhibited dynamic shear energy absorption in the range of 0.9-1.5 kJ/m. Energy absorption is shown to be sensitive to the water/cement ratio, silica fume content, and aggregate gradation. Energy absorption was weakly correlated to compressive strength. Results are highly sensitive to specimen preparation methods, and there is a demonstrated need for a standardized test method for high frequency shear in cementitious composites.

Keywords: Charpy impact test, dynamic shear, impact loading, ultra-high performance concrete.

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Authors: David M. Lucas, Charles W. Jarrett

Abstract:

In the culture of Thailand, the Yak serve as a mediated icon representing strength, power, and mystical protection not only for the Buddha, but for population of worshipers. Originating from the forests of China, the Yak continues to stand guard at the gates of Buddhist temples. The Yak represents Thai culture in the hearts of Thai people. This paper presents a qualitative study regarding the curious mix of media, culture, and religion that projects the Yak of Thailand as a larger than life message throughout the political, cultural, and religious spheres. The gate guardians, or gods as they are sometimes called, appear throughout the religious temples of Asian cultures. However, the Asian cultures demonstrate differences in artistic renditions (or presentations) of such sentinels. Thailand gate guards (the Yak) stand in front of many Buddhist temples, and these iconic figures display unique features with varied symbolic significance. The temple (or wat), plays a vital role in every community; and, for many people, Thailand’s temples are the country’s most endearing sights. The authors applied folknography as a methodology to illustrate the importance of the Thai Yak in serving as meaningful icons that transcend not only time, but the culture, religion, and mass media. The Yak represents mythical, religious, artistic, cultural, and militaristic significance for the Thai people. Data collection included interviews, focus groups, and natural observations. This paper summarizes the perceptions of the Thai people concerning their gate sentries and the relationship, communication, connection, and the enduring respect that Thai people hold for their guardians of the gates.

Keywords: Communication, Culture, Folknography, Icon, Image, Media, Protection, Religion, Yak.

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Authors: Muhammad H. Rais,

Abstract:

Truncated multiplier is a good candidate for digital signal processing (DSP) applications including finite impulse response (FIR) and discrete cosine transform (DCT). Through truncated multiplier a significant reduction in Field Programmable Gate Array (FPGA) resources can be achieved. This paper presents for the first time a comparison of resource utilization of Spartan-3AN and Virtex-5 implementation of standard and truncated multipliers using Very High Speed Integrated Circuit Hardware Description Language (VHDL). The Virtex-5 FPGA shows significant improvement as compared to Spartan-3AN FPGA device. The Virtex-5 FPGA device shows better performance with a percentage ratio of number of occupied slices for standard to truncated multipliers is increased from 40% to 73.86% as compared to Spartan- 3AN is decreased from 68.75% to 58.78%. Results show that the anomaly in Spartan-3AN FPGA device average connection and maximum pin delay have been efficiently reduced in Virtex-5 FPGA device.

Keywords: Digital Signal Processing (DSP), FieldProgrammable Gate Array (FPGA), Spartan-3AN, TruncatedMultiplier, Virtex-5, VHDL.

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