Search results for: electrical circuit

Authors: Azam Beg, P. W. Chandana Prasad, S.M.N.A Senenayake

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When binary decision diagrams are formed from uniformly distributed Monte Carlo data for a large number of variables, the complexity of the decision diagrams exhibits a predictable relationship to the number of variables and minterms. In the present work, a neural network model has been used to analyze the pattern of shortest path length for larger number of Monte Carlo data points. The neural model shows a strong descriptive power for the ISCAS benchmark data with an RMS error of 0.102 for the shortest path length complexity. Therefore, the model can be considered as a method of predicting path length complexities; this is expected to lead to minimum time complexity of very large-scale integrated circuitries and related computer-aided design tools that use binary decision diagrams.

Keywords: Monte Carlo circuit simulation data, binary decision diagrams, neural network modeling, shortest path length estimation

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Authors: V. Suresh Babu, Haseena P. S., Varun P. Gopi, M. R. Baiju

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In this paper a scheme is proposed for generating a programmable current reference which can be implemented in the CMOS technology. The current can be varied over a wide range by changing an external voltage applied to one of the control gates of FGMOS (Floating Gate MOSFET). For a range of supply voltages and temperature, CMOS current reference is found to be dependent, this dependence is compensated by subtracting two current outputs with the same dependencies on the supply voltage and temperature. The system performance is found to improve with the use of FGMOS. Mathematical analysis of the proposed circuit is done to establish supply voltage and temperature independence. Simulation and performance evaluation of the proposed current reference circuit is done using TANNER EDA Tools. The current reference shows the supply and temperature dependencies of 520 ppm/V and 312 ppm/oC, respectively. The proposed current reference can operate down to 0.9 V supply.

Keywords: Floating Gate MOSFET, current reference, self bias scheme, temperature independency, supply voltage independency.

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Authors: Mawahib Gafare Abdalrahman Ahmed, Abdallah Belal Adam, John Ojur Dennis

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Air bubbles have been detected in human circulation of end-stage renal disease patients who are treated by hemodialysis. The consequence of air embolism, air bubbles, is under recognized and usually overlooked in daily practice. This paper shows results of a capacitor based detection method that capable of detecting the presence of air bubbles in the blood stream in different frequencies. The method is based on a parallel plates capacitor made of platinum with an area of 1.5 cm2 and a distance between the two plates is 1cm. The dielectric material used in this capacitor is Dextran70 solution which mimics blood rheology. Simulations were carried out using RC circuit at two frequencies 30Hz and 3 kHz and results compared with experiments and theory. It is observed that by injecting air bubbles of different diameters into the device, there were significant changes in the capacitance of the capacitor. Furthermore, it is observed that the output voltage from the circuit increased with increasing air bubble diameter. These results demonstrate the feasibility of this approach in improving air bubble detection in Hemodialysis.

Keywords: Air bubbles, Hemodialysis, Capacitor, Dextran70, Air bubbles diameters.

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Authors: B. R. Faleye, M. I. Titocan, M. P. Ibitola

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Investigation was carried out at Opic Estate in Isheri-Osun River Basin environment using Electrical Resistivity method to study saltwater intrusion into a fresh water aquifer system from the proximal estuarine water body. The investigation is aimed at aquifer characterisation using electrical resistivity method in order to provide the depth to which fresh water fit for both domestic and industrial consumption. The 2D Electrical Resistivity and Vertical Electrical Resistivity techniques alongside Laboratory analysis of water samples obtained from the boreholes were adopted. Three traverses were investigated using Wenner and Pole-Dipole array with multi-electrode system consisting of 84 electrodes and a spread of 581 m, 664 m and 830 m were attained on the traverses. The main lithologies represented in the study area are Sand, Clay and Clayey Sand of which Sand constitutes the aquifer in the study area. Vertical Electrical Sounding data obtained at different lateral distance on the traverses have indicated that the water in the aquifer in the subsurface is brackish. Brackish water is represented by lowelectrical resistivity value signature while fresh water is characterized by relatively high electrical resistivity and in some regionfresh water is existent at depth greater than 200 m. Results of laboratory analysis of samples showed that the pH, Salinity, Total Dissolved Solid and Conductivity indicated existence of water with poor quality, indicating that salinity, TDS and Conductivity is higher in the Northern part of the study area. The 2D electrical resistivity and Vertical Electrical Sounding methods indicate that fresh water region is at ≥200m depth. Aquifers not fit for domestic use in the study area occur downwards to about 200 m in depth. In conclusion, it is recommended that wells should be sunkbeyond 220 m for the possible procurement of portable fresh water.

Keywords: 2D electrical resistivity, aquifer, brackish water, lithologies, freshwater, opic estate.

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Authors: Divyanka Sontakke, Arpit Thakre, D. K Shinde, Sujata Parmeshwaran

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Electrospinning is the most widely utilized method to create nanofibers because of the direct setup, the capacity to mass-deliver consistent nanofibers from different polymers, and the ability to produce ultrathin fibers with controllable diameters. Smooth and much arranged ultrafine Polyacrylonitrile (PAN) nanofibers with diameters going from submicron to nanometer were delivered utilizing Electrospinning technique. PAN powder was used as a precursor to prepare the solution utilized as a part of this process. At the point when the electrostatic repulsion contradicted surface tension, a charged stream of polymer solution was shot out from the head of the spinneret and along these lines ultrathin nonwoven fibers were created. The effect of electrospinning parameter such as applied voltage, feed rate, concentration of polymer solution and tip to collector distance on the morphology of electrospun PAN nanofibers were investigated. The nanofibers were heat treated for carbonization to examine the changes in properties and composition to make for electrical application. Scanning Electron Microscopy (SEM) was performed before and after carbonization to study electrical conductivity and morphological characterization. The SEM images have shown the uniform fiber diameter and no beads formation. The average diameter of the PAN fiber observed 365nm and 280nm for flat plat and rotating drum collector respectively. The four probe strategy was utilized to inspect the electrical conductivity of the nanofibers and the electrical conductivity is significantly improved with increase in oxidation temperature exposed.

Keywords: Electrospinning, polyacrylonitrile carbon nanofibres, heat treatment, electrical conductivity.

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Authors: Aye Sandar Win

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This paper demonstrates design and construction of microcontroller-based telephone exchange system and the aims of this paper is to study telecommunication, connection with PIC16F877A and DTMF MT8870D. In microcontroller system, PIC 16F877 microcontroller is used to control the call processing. Dial tone, busy tone and ring tone are provided during call progress. Instead of using ready made tone generator IC, oscillator based tone generator is used. The results of this telephone exchange system are perfect for homes and small businesses needing the extensions. It requires the phone operation control system, the analog interface circuit and the switching circuit. This exchange design will contain eight channels. It is the best low cost, good quality telephone exchange for today-s telecommunication needs. It offers the features available in much more expensive PBX units without using high-priced phones. It is for long distance telephone services.

Keywords: Control software, DTMF receiver and decoder, hooksensing, microcontroller system, power supply, ring generator andoscillator based tone generator.

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Authors: B. Tayebani, N. Hosseinibalam, D. Mostofinejad

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Interest in using bacteria in cement materials due to its positive influences has been increased. Cement materials such as mortar and concrete basically suffer from higher porosity and water absorption compared to other building materials such as steel materials. Because of the negative side-effects of certain chemical techniques, biological methods have been proposed as a desired and environmentally friendly strategy for reducing concrete porosity and diminishing water absorption. This paper presents the results of an experimental investigation carried out to evaluate the influence of Sporosarcina pasteurii bacteria on the behaviour of two types of concretes (light weight aggregate concrete and normal weight concrete). The resistance of specimens to water penetration by testing water absorption and evaluating the electrical resistance of those concretes was examined and compared. As a conclusion, 20% increase in electrical resistance and 10% reduction in water absorption of lightweight aggregate concrete (LWAC) and for normal concrete the results show 7% decrease in water absorption and almost 10% increase in electrical resistance.

Keywords: Bacteria, biological method, normal weight concrete, lightweight aggregate concrete, water absorption, electrical resistance.

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Authors: R. Thiamsri, N. Ruangkajonmathee, A. Oonsivilaiand B. Marungsri

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This paper presents the experimental results on effect of applied voltage stress frequency to the occurrence of electrical treeing in 22 kV cross linked polyethylene (XLPE) insulated cable.Hallow disk of XLPE insulating material with thickness 5 mm taken from unused high voltage cable was used as the specimen in this study. Stainless steel needle was inserted gradually into the specimen to give a tip to earth plane electrode separation of 2.5
0.2 mm at elevated temperature 105-110°C. The specimen was then annealed for 5 minute to minimize any mechanical stress build up around the needle-plane region before it was cooled down to room temperature. Each specimen were subjected to the same applied voltage stress level at 8 kV AC rms, with various frequency, 50, 100, 500, 1000 and 2000 Hz. Initiation time, propagation speed and pattern of electrical treeing were examined in order to study the effect of applied voltage stress frequency. By the experimental results, initial time of visible treeing decreases with increasing in applied voltage frequency. Also, obviously, propagation speed of electrical treeing increases with increasing in applied voltage frequency.Furthermore, two types of electrical treeing, bush-like and branch-like treeing were observed.The experimental results confirmed the effect of voltage stress frequency as well.

Keywords: Voltage stress frequency, cross-linked polyethylene, electrical treeing, treeing propagation, treeing pattern

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Authors: Wei-Da Toh, Yuan Gao, Minkyu Je

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In this paper, an energy efficient digital baseband circuit for piezoelectric (PE) harvester powered batteryless remote control system is presented. Pulse mode PE harvester, which provides short duration of energy, is adopted to replace conventional chemical battery in wireless remote controller. The transmitter digital baseband repeats the control command transmission once the digital circuit is initiated by the power-on-reset. A power efficient data frame format is proposed to maximize the transmission repetition time. By using the proposed frame format and receiver clock and data recovery method, the receiver baseband is able to decode the command even when the received data has 20% error. The proposed transmitter and receiver baseband are implemented using FPGA and simulation results are presented.

Keywords: Clock and Data Recovery (CDR), Correlator, Digital Baseband, Gold Code, Power-On-Reset.

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Authors: M.Hosseinghadiry, H. Mohammadi, M.Nadisenejani

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with increasing circuits- complexity and demand to use portable devices, power consumption is one of the most important parameters these days. Full adders are the basic block of many circuits. Therefore reducing power consumption in full adders is very important in low power circuits. One of the most powerconsuming modules in full adders is XOR/XNOR circuit. This paper presents two new full adders based on two new logic approaches. The proposed logic approaches use one XOR or XNOR gate to implement a full adder cell. Therefore, delay and power will be decreased. Using two new approaches and two XOR and XNOR gates, two new full adders have been implemented in this paper. Simulations are carried out by HSPICE in 0.18μm bulk technology with 1.8V supply voltage. The results show that the ten-transistors proposed full adder has 12% less power consumption and is 5% faster in comparison to MB12T full adder. 9T is more efficient in area and is 24% better than similar 10T full adder in term of power consumption. The main drawback of the proposed circuits is output threshold loss problem.

Keywords: Full adder, XNOR, Low power, High performance, Very Large Scale Integrated Circuit.

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Authors: Vinod Kumar Khera, R. K. Sharma, A. K. Gupta

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Power dissipation increases exponentially during test mode as compared to normal operation of the circuit. In extreme cases, test power is more than twice the power consumed during normal operation mode. Test vector generation scheme is key component in deciding the power hungriness of a circuit during testing. Test vector count and consequent leakage current are functions of test vector generation scheme. Fault based test vector count optimization has been presented in this work. It helps in reducing test vector count and the leakage current. In the presented scheme, test vectors have been reduced by extracting essential child vectors. The scheme has been tested experimentally using stuck at fault models and results ensure the reduction in test vector count.

Keywords: Low power VLSI testing, independent fault, essential faults, test vector reduction.

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Authors: Mohini Polimetla, Rajat Mahapatra

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There is need to explore emerging technologies based on carbon nanotube electronics as the MOS technology is approaching its limits. As MOS devices scale to the nano ranges, increased short channel effects and process variations considerably effect device and circuit designs. As a promising new transistor, the Carbon Nanotube Field Effect Transistor(CNTFET) avoids most of the fundamental limitations of the Traditional MOSFET devices. In this paper we present the analysis and comparision of a Carbon Nanotube FET(CNTFET) based 10(A current mirror with MOSFET for 32nm technology node. The comparision shows the superiority of the former in terms of 97% increase in output resistance,24% decrease in power dissipation and 40% decrease in minimum voltage required for constant saturation current. Furthermore the effect on performance of current mirror due to change in chirality vector of CNT has also been investigated. The circuit simulations are carried out using HSPICE model.

Keywords: Carbon Nanotube Field Effect Transistor, Chirality Vector, Current Mirror

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Authors: Guang Sun, Yong Li, Yuanyuan Zhang, Shijun Lin, Li Su, Depeng Jin, Lieguang zeng

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Network on Chip (NoC) has emerged as a promising on chip communication infrastructure. Three Dimensional Integrate Circuit (3D IC) provides small interconnection length between layers and the interconnect scalability in the third dimension, which can further improve the performance of NoC. Therefore, in this paper, a hierarchical cluster-based interconnect architecture is merged with the 3D IC. This interconnect architecture significantly reduces the number of long wires. Since this architecture only has approximately a quarter of routers in 3D mesh-based architecture, the average number of hops is smaller, which leads to lower latency and higher throughput. Moreover, smaller number of routers decreases the area overhead. Meanwhile, some dual links are inserted into the bottlenecks of communication to improve the performance of NoC. Simulation results demonstrate our theoretical analysis and show the advantages of our proposed architecture in latency, throughput and area, when compared with 3D mesh-based architecture.

Keywords: Network on Chip (NoC), interconnect architecture, performance, area, Three Dimensional Integrate Circuit (3D IC).

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Authors: M.R.Shabgard, R.M.Shotorbani

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FW4 is a newly developed hot die material widely used in Forging Dies manufacturing. The right selection of the machining conditions is one of the most important aspects to take into consideration in the Electrical Discharge Machining (EDM) of FW4. In this paper an attempt has been made to develop mathematical models for relating the Material Removal Rate (MRR), Tool Wear Ratio (TWR) and surface roughness (Ra) to machining parameters (current, pulse-on time and voltage). Furthermore, a study was carried out to analyze the effects of machining parameters in respect of listed technological characteristics. The results of analysis of variance (ANOVA) indicate that the proposed mathematical models, can adequately describe the performance within the limits of the factors being studied.

Keywords: Electrical Discharge Machining (EDM), linearregression technique, Response Surface Methodology (RSM)

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Authors: Adamu Mudi, Fawole Wahab Ibrahim, Abubakar Abba Kolo

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In this paper, we present a microcontroller-based liquid level controller which identifies the various levels of a liquid, carries out certain actions and is capable of communicating with the human being and other devices through the GSM network. This project is useful in ensuring that a liquid is not wasted. It also contributes to the internet of things paradigm, which is the future of the internet. The method used in this work includes designing the circuit and simulating it. The circuit is then implemented on a solderless breadboard after which it is implemented on a strip board. A C++ computer program is developed and uploaded into the microcontroller. This program instructs the microcontroller on how to carry out its actions. In other to determine levels of the liquid, an ultrasonic wave is sent to the surface of the liquid similar to radar or the method for detecting the level of sea bed. Message is sent to the phone of the user similar to the way computers send messages to phones of GSM users. It is concluded that the routine of observing the levels of a liquid in a tank, refilling the tank when the liquid level is too low can be entirely handled by a programmable device without wastage of the liquid or bothering a human being with such tasks.

Keywords: Arduino Uno, HC-SR04 ultrasonic sensor, Internet of Things, IoT, SIM900 GSM Module.

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Authors: Chi-Yan Chu, Kai-Chi Chuang, Huang-Chung Cheng

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In this study, the RRAM devices with the TiN/Ti/HfO_x/TiN structure were fabricated, then the electrical characteristics of the devices without annealing and after 400 °C and 500 °C of the furnace annealing (FA) temperature processes were compared. The RRAM devices after the FA’s 400 °C showed the lower forming, set and reset voltages than the other devices without annealing. However, the RRAM devices after the FA’s 500 °C did not show any electrical characteristics because the TiN/Ti/HfO_x/TiN device was oxidized, as shown in the XPS analysis. From these results, the RRAM devices after the FA’s 400 °C showed the best electrical characteristics.

Keywords: RRAM, furnace annealing, forming, set and reset voltages, XPS.

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Authors: Nur Syarafina Binti Othman, Tsubasa Jindo, Makato Yamada, Miho Tsuyama, Hitoshi Nakano

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A novel method to produce a fast high voltage solid states switch using Insulated Gate Bipolar Transistors (IGBTs) is presented for discharge-pumped gas lasers. The IGBTs are connected in series to achieve a high voltage rating. An avalanche transistor is used as the gate driver. The fast pulse generated by the avalanche transistor quickly charges the large input capacitance of the IGBT, resulting in a switch out of a fast high-voltage pulse. The switching characteristic of fast-high voltage solid state switch has been estimated in the multi-stage series-connected IGBT with the applied voltage of several tens of kV. Electrical circuit diagram and the mythology of fast-high voltage solid state switch as well as experimental results obtained are presented.

Keywords: High voltage, IGBT, Solid states switch.

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Authors: Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert

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The evolution of logic circuits, which falls under the heading of evolvable hardware, is carried out by evolutionary algorithms. These algorithms are able to automatically configure reconfigurable devices. One of main difficulties in developing evolvable hardware with the ability to design functional electrical circuits is to choose the most favourable EA features such as fitness function, chromosome representations, population size, genetic operators and individual selection. Until now several researchers from the evolvable hardware community have used and tuned these parameters and various rules on how to select the value of a particular parameter have been proposed. However, to date, no one has presented a study regarding the size of the chromosome representation (circuit layout) to be used as a platform for the evolution in order to increase the evolvability, reduce the number of generations and optimize the digital logic circuits through reducing the number of logic gates. In this paper this topic has been thoroughly investigated and the optimal parameters for these EA features have been proposed. The evolution of logic circuits has been carried out by an extrinsic evolvable hardware system which uses (1+λ) evolution strategy as the core of the evolution.

Keywords: Evolvable hardware, genotype size, computational intelligence, design of logic circuits.

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Authors: N. Nandan A. M. Nagaraj, L. Sanjeev Kumar

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In the rapidly growing population, the requirement of electrical power is increasing day by day. In order to meet the needs, we need to generate the power using alternate method. In this paper, a presentable approach is developed by analysis and can be implemented by utilizing heat energy, which is generated in numerous ways in some of the rural areas in India. The thermoelectric generator unit will be developed by combing with control circuits and converts, which is used to light the LED lamps. The temperature difference which is available in the kitchens, especially the exhaust pipes/chimneys of wooden fire stoves, where more heat is dissipated into the atmosphere, can be utilized for electrical power generation. Hence, the temperature rise of surroundings atmosphere can be reduced.

Keywords: Thermoelectric generator, LED, converts, temperature.

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Authors: Sheela Tiwari, R. Naresh, R. Jha

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The paper presents an investigation in to the effect of neural network predictive control of UPFC on the transient stability performance of a multimachine power system. The proposed controller consists of a neural network model of the test system. This model is used to predict the future control inputs using the damped Gauss-Newton method which employs ‘backtracking’ as the line search method for step selection. The benchmark 2 area, 4 machine system that mimics the behavior of large power systems is taken as the test system for the study and is subjected to three phase short circuit faults at different locations over a wide range of operating conditions. The simulation results clearly establish the robustness of the proposed controller to the fault location, an increase in the critical clearing time for the circuit breakers, and an improved damping of the power oscillations as compared to the conventional PI controller.

Keywords: Identification, Neural networks, Predictive control, Transient stability, UPFC.

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Authors: Towfeeq Fairooz, Salim Istyaq

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The passive electrical properties of a tissue depends on the intrinsic constituents and its structure, therefore by measuring the complex electrical impedance of the tissue it might be possible to obtain indicators of the tissue state or physiological activity [1]. Complete bio-impedance information relative to physiology and pathology of a human body and functional states of the body tissue or organs can be extracted by using a technique containing a fourelectrode measurement setup. This work presents the estimation measurement setup based on the four-electrode technique. First, the complex impedance is estimated by three different estimation techniques: Fourier, Sine Correlation and Digital De-convolution and then estimation errors for the magnitude, phase, reactance and resistance are calculated and analyzed for different levels of disturbances in the observations. The absolute values of relative errors are plotted and the graphical performance of each technique is compared.

Keywords: Electrical Impedance, Fast Fourier Transform, Additive White Gaussian Noise, Total Least Square, Digital De-Convolution, Sine-Correlation.

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Authors: Ahmed Shariful Alam, Abu Hena M. Mustafa Kamal, M. Abdul Rahman, M. Nasmus Sakib Khan Shabbir, Atiqul Islam

Abstract:

According to the rules of quantum mechanics there is a non-vanishing probability of for an electron to tunnel through a thin insulating barrier or a thin capacitor which is not possible according to the laws of classical physics. Tunneling of electron through a thin insulating barrier or tunnel junction is a random event and the magnitude of current flowing due to the tunneling of electron is very low. As the current flowing through a Single Electron Transistor (SET) is the result of electron tunneling through tunnel junctions of its source and drain the supply voltage requirement is also very low. As a result, the power consumption across a Single Electron Transistor is ultra-low in comparison to that of a MOSFET. In this paper simulations have been done with PSPICE for an inverter built with both SETs and MOSFETs. 35mV supply voltage was used for a SET built inverter circuit and the supply voltage used for a CMOS inverter was 3.5V.

Keywords: ITRS, enhancement type MOSFET, island, DC analysis, transient analysis, power consumption, background charge co-tunneling.

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Authors: M. Nageswara Rao, N. Sumathi, V. S. N. K. Chaitanya

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In electrical power system, high voltage insulators are necessary for consistent performance. All insulators are exposed to different mechanical and electrical stresses. Mechanical stresses occur due to various loads such as wind load, hardware and conductors weight. Electrical stresses are due to over voltages and operating voltages. The performance analysis of polymer insulators is an essential, as most of the electrical utility companies are employing polymer insulators for new and updated transmission lines. In this paper, electric field is analyzed for 400 kV silicone (SiR) composite insulator by COULOMB 3D software based on boundary element method. The field results are compared with EPRI reference values. Our results proved that values at critical regions are very less compared to EPRI reference values. And also experimentally 400 kV single V suspension string is evaluated as per IEC standards.

Keywords: Electric field analysis, silicone composite insulator, boundary element method, RIV, Corona.

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Authors: Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert

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Evolvable hardware (EHW) refers to a selfreconfiguration hardware design, where the configuration is under the control of an evolutionary algorithm (EA). A lot of research has been done in this area several different EA have been introduced. Every time a specific EA is chosen for solving a particular problem, all its components, such as population size, initialization, selection mechanism, mutation rate, and genetic operators, should be selected in order to achieve the best results. In the last three decade a lot of research has been carried out in order to identify the best parameters for the EA-s components for different “test-problems". However different researchers propose different solutions. In this paper the behaviour of mutation rate on (1+λ) evolution strategy (ES) for designing logic circuits, which has not been done before, has been deeply analyzed. The mutation rate for an EHW system modifies values of the logic cell inputs, the cell type (for example from AND to NOR) and the circuit output. The behaviour of the mutation has been analyzed based on the number of generations, genotype redundancy and number of logic gates used for the evolved circuits. The experimental results found provide the behaviour of the mutation rate to be used during evolution for the design and optimization of logic circuits. The researches on the best mutation rate during the last 40 years are also summarized.

Keywords: Evolvable hardware, mutation rate, evolutionarycomputation, design of logic circuit.

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Authors: A. Karsenty, A. Chelly

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Ultrathin (UTD) and Nanoscale (NSD) SOI-MOSFET devices, sharing a similar W/L but with a channel thickness of 46nm and 1.6nm respectively, were fabricated using a selective “gate recessed” process on the same silicon wafer. The electrical transport characterization at room temperature has shown a large difference between the two kinds of devices and has been interpreted in terms of a huge unexpected series resistance. Electrical characteristics of the Nanoscale device, taken in the linear region, can be analytically derived from the ultrathin device ones. A comparison of the structure and composition of the layers, using advanced techniques such as Focused Ion Beam (FIB) and High Resolution TEM (HRTEM) coupled with Energy Dispersive X-ray Spectroscopy (EDS), contributes an explanation as to the difference of transport between the devices.

Keywords: Nanoscale Devices, SOI MOSFET, Analytical Model, Electron Transport.

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Authors: Yue-Der Lin, Ya-Hsueh Chien, Yen-Ting Lin, Shih-Fan Wang, Cheng-Lun Tsai, Ching-Che Tsai

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Capacitive electrocardiogram (ECG) measurement is an attractive approach for long-term health monitoring. However, there is little literature available on its implementation, especially for multichannel system in standard ECG leads. This paper begins from the design criteria for capacitive ECG measurement and presents a multichannel limb-lead capacitive ECG system with conductive fabric tapes pasted on a double layer PCB as the capacitive sensors. The proposed prototype system incorporates a capacitive driven-body (CDB) circuit to reduce the common-mode power-line interference (PLI). The presented prototype system has been verified to be stable by theoretic analysis and practical long-term experiments. The signal quality is competitive to that acquired by commercial ECG machines. The feasible size and distance of capacitive sensor have also been evaluated by a series of tests. From the test results, it is suggested to be greater than 60 cm2 in sensor size and be smaller than 1.5 mm in distance for capacitive ECG measurement.

Keywords: capacitive driven-body (CDB) circuit, capacitive electrocardiogram (ECG) measurement, capacitive sensor, conductive fabric tape, power-line interference (PLI).

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Authors: Himanshu Payal, Sachin Maheshwari, Pushpendra S. Bharti

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Electrical discharge machining (EDM), a non-conventional machining process, finds wide applications for shaping difficult-to-cut alloys. Process modeling of EDM is required to exploit the process to the fullest. Process modeling of EDM is a challenging task owing to involvement of so many electrical and non-electrical parameters. This work is an attempt to model the EDM process using artificial neural network (ANN). Experiments were carried out on die-sinking EDM taking Inconel 825 as work material. ANN modeling has been performed using experimental data. The prediction ability of trained network has been verified experimentally. Results indicate that ANN can predict the values of performance measures of EDM satisfactorily.

Keywords: Artificial neural network, EDM, metal removal rate, modeling, surface roughness.

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Authors: Kamran Yousefpour, Mojtaba Rostaghi-Chalaki, Jason Warden, David Wallace, Chanyeop Park

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There has been a rising trend in using impulse current generators to investigate the lightning strike protection of materials including aluminum and composites in structures such as wind turbine blade and aircraft body. The focus of this research is to present an impulse current generator built in the High Voltage Lab at Mississippi State University. The generator is capable of producing component A and D of the natural lightning discharges in accordance with the Society of Automotive Engineers (SAE) standard, which is widely used in the aerospace industry. The generator can supply lightning impulse energy up to 400 kJ with the capability of producing impulse currents with magnitudes greater than 200 kA. The electrical circuit and physical components of an improved impulse current generator are described and several lightning strike waveforms with different amplitudes is presented for comparing with the standard waveform. The results of this study contribute to the fundamental understanding the functionality of the impulse current generators and present an impulse current generator developed at the High Voltage Lab of Mississippi State University.

Keywords: impulse current generator, lightning, society of automotive engineers, capacitor

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Authors: Yu-Fu Chen, Zih-Jyun Dai, Chen-Te Chiu, Shiue-Chen Chiou, Yung-Wei Chen, Yu-Ming Lin, Kuan-Yu Chen, Hung-Wei Wu, Hsin-Ying Lee, Yan-Kuin Su, Shoou-Jinn Chang

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This paper presents a compact dual-band bandpass filter that involves using the quarter wavelength stepped impedance resonators (SIRs) for achieving simultaneously compact circuit size and good dual-band performance. The filter is designed at 2.4 / 3.5 GHz and constructed by two pairs of quarter wavelength SIRs and source-load lines. By properly tuning the impedance ratio, length ratio and radius of via hole of the SIRs, dual-passbands performance can be easily determined. To improve the passband selectivity, the use of source-load lines is to increase coupling energy between the resonators. The filter is showing simple configuration, effective design method and small circuit size. The measured results are in good agreement with the simulation results.

Keywords: Dual-band, bandpass filter, stepped impedance resonators, SIR.

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Authors: Ming-Ta Yang, Jyh-Cherng Gu, Chun-Wei Huang, Jin-Lung Guan

Abstract:

Time base maintenance (TBM) is conventionally applied by the power utilities to maintain circuit breakers (CBs), transformers, bus bars and cables, which may result in under maintenance or over maintenance. As information and communication technology (ICT) industry develops, the maintenance policies of many power utilities have gradually changed from TBM to condition base maintenance (CBM) to improve system operating efficiency, operation cost and power supply reliability. This paper discusses the feasibility of using intelligent electronic devices (IEDs) to construct a CB CBM management platform. CBs in power substations can be monitored using IEDs with additional logic configuration and wire connections. The CB monitoring data can be sent through intranet to a control center and be analyzed and integrated by the Elipse Power Studio software. Finally, a human-machine interface (HMI) of supervisory control and data acquisition (SCADA) system can be designed to construct a CBM management platform to provide maintenance decision information for the maintenance personnel, management personnel and CB manufacturers.

Keywords: Circuit breaker, Condition base maintenance, Intelligent electronic device, Time base maintenance, SCADA.

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