Search results for: analog circuits

Authors: A. Ramdane, F.Naceri, S. Ramdane

Abstract:

in this work, we present a new strategy of direct adaptive control denoted: Extended minimal controller synthesis (EMCS). This algorithm is designed for an induction motor, which includes both electrical and mechanical dynamics under the assumptions of linear magnetic circuits. The main motivation of the EMCS control is to enhance the robustness of the MRAC algorithms, i.e. the rejection of bounded effects of rapidly varying external disturbances.

Keywords: Adaptive Control, Simple model reference adaptive control (SMRAC), Extended Minimal Controller synthesis (EMCS), Induction Motor (IM)

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Authors: Phuoc Si Nguyen

Abstract:

Frequency transformation with Pascal matrix equations is a method for transforming an electronic filter (analogue or digital) into another filter. The technique is based on frequency transformation in the s-domain, bilinear z-transform with pre-warping frequency, inverse bilinear transformation and a very useful application of the Pascal’s triangle that simplifies computing and enables calculation by hand when transforming from one filter to another. This paper will introduce two methods to transform a filter into a digital filter: frequency transformation from the s-domain into the z-domain; and frequency transformation in the z-domain. Further, two Pascal matrix equations are derived: an analogue to digital filter Pascal matrix equation and a digital to digital filter Pascal matrix equation. These are used to design a desired digital filter from a given filter.

Keywords: Frequency transformation, Bilinear z-transformation, Pre-warping frequency, Digital filters, Analog filters, Pascal’s triangle.

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Authors: S. Woothipatanapan, S. Prakobkit

Abstract:

This paper presents a model for analysis the induced voltage of transmission lines (energized) acting on neighboring distribution lines (de-energized). From environmental restrictions, 22 kV distribution lines need to be installed under 115 kV transmission lines. With the installation of the two parallel circuits like this, they make the induced voltage which can cause harm to operators. This work was performed with the ATP-EMTP modeling to analyze such phenomenon before field testing. Simulation results are used to find solutions to prevent danger to operators who are on the pole.

Keywords: Transmission system, distribution system, induced voltage, off-line operation.

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Authors: Yong-Seo Koo, Jin-Woo Jung, Byung-Seok Lee, Dong-Su Kim, Yil-Suk Yang

Abstract:

In this paper, a novel LVTSCR-based device for electrostatic discharge (ESD) protection of integrated circuits (ICs) is designed, fabricated and characterized. The proposed device is similar to the conventional LVTSCR but it has an embedded PMOSFET in the anode n-well to enhance the turn on speed, the clamping capability and the robustness. This is possible because the embedded PMOSFET provides the sub-path of ESD discharge current. The TLP, HBM and MM testing are carried out to verify the ESD performance of the proposed devices, which are fabricated in 0.35um (Bipolar-CMOS-DMOS) BCDMOS process. The device has the robustness of 70mA/um that is higher about 60mA/um than the LVTSCR, approximately.

Keywords: ESD Protection, grounded gate NMOS (GGNMOS), low trigger voltage SCR (LVTSCR)

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Authors: Georgios C. Dogiamis, Bedrich J. Hosticka, Anton Grabmaier

Abstract:

In this work the effects of uniaxial mechanical stress on a pixel readout circuit are theoretically analyzed. It is the effects of mechanical stress on the in-pixel transistors do not arise at the output, when a correlated double sampling circuit is used. However, mechanical stress effects on the photodiode will directly appear at the readout chain output. Therefore, compensation techniques are needed to overcome this situation. Moreover simulation technique of mechanical stress is proposed and diverse layout as well as design recommendations are put forward, in order to minimize stress related effects on the output of a circuit. he shown, that wever, Moreover, a out

Keywords: mechanical uniaxial stress, pixel readout circuit

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Authors: Soon Jai Yi, Sun-Hong Kim, Hang-Geun Jeong, Seong-Ik Cho

Abstract:

This paper presents a method of reducing the feedback delay time of DWA(Data Weighted Averaging) used in sigma-delta modulators. The delay time reduction results from the elimination of the latch at the quantizer output and also from the falling edge operation. The designed sigma-delta modulator improves the timing margin about 16%. The sub-circuits of sigma-delta modulator such as SC(Switched Capacitor) integrator, 9-level quantizer, comparator, and DWA are designed with the non-ideal characteristics taken into account. The sigma-delta modulator has a maximum SNR (Signal to Noise Ratio) of 84 dB or 13 bit resolution.

Keywords: Sigma-delta modulator, multibit, DWA

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Authors: S. Zouari, H. Daoud, M. Loulou, P. Loumeau, N. Masmoudi

Abstract:

A wideband 2-1-1 cascaded ΣΔ modulator with a single-bit quantizer in the two first stages and a 4-bit quantizer in the final stage is developed. To reduce sensitivity of digital-to-analog converter (DAC) nonlinearities in the feedback of the last stage, dynamic element matching (DEM) is introduced. This paper presents two modelling approaches: The first is MATLAB description and the second is VHDL-AMS modelling of the proposed architecture and exposes some high-level-simulation results allowing a behavioural study. The detail of both ideal and non-ideal behaviour modelling are presented. Then, the study of the effect of building blocks nonidealities is presented; especially the influences of nonlinearity, finite operational amplifier gain, amplifier slew rate limitation and capacitor mismatch. A VHDL-AMS description presents a good solution to predict system-s performances and can provide sensitivity curves giving the impact of nonidealities on the system performance.

Keywords: behavioural study, DAC nonlinearity, DEM, ΣΔ modulator, VHDL-AMS modelling.

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Authors: Yeon-kug Moon, Kang-Yoon Lee, Yun-Jae Won, Seung-Ok Lim

Abstract:

This paper describes a low-voltage and low-power channel selection analog front end with continuous-time low pass filters and highly linear programmable gain amplifier (PGA). The filters were realized as balanced Gm-C biquadratic filters to achieve a low current consumption. High linearity and a constant wide bandwidth are achieved by using a new transconductance (Gm) cell. The PGA has a voltage gain varying from 0 to 65dB, while maintaining a constant bandwidth. A filter tuning circuit that requires an accurate time base but no external components is presented. With a 1-Vrms differential input and output, the filter achieves -85dB THD and a 78dB signal-to-noise ratio. Both the filter and PGA were implemented in a 0.18um 1P6M n-well CMOS process. They consume 3.2mW from a 1.8V power supply and occupy an area of 0.19mm2.

Keywords: component ; Channel selection filters, DC offset, programmable gain amplifier, tuning circuit

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Authors: Seyed Ali Sedigh Zyabari, A. Zarifkar

Abstract:

Single photon detectors have been fabricated NbN nano wire. These detectors are fabricated from high quality, ultra high vacuum sputtered NbN thin films on a sapphire substrate. In this work a typical schematic of the nanowire Single Photon Detector structure and then driving and measurement electronic circuit are shown. The response of superconducting nanowire single photon detectors during a photo detection event, is modeled by a special electrical circuits (two circuit). Finally, current through the wire is calculated by solving equations of models.

Keywords: NbN, nanowire meander, superconducting single photon detector, kinetic inductance.

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Authors: K. Diwakar, K. Aanandha Saravanan, C. Senthilpari

Abstract:

Higher order ΔΣ Modulator (DSM) is basically an unstable system. The approximate conditions for stability cannot be used for the design of a DSM for industrial applications where risk is involved. The existing second order, single stage, single bit, unity feedback gain , discrete DSM cannot be used for the normalized full range (-1 to +1) of an input signal since the DSM becomes unstable when the input signal is above ±0.55. The stability is also not guaranteed for input signals of amplitude less than ±0.55. In the present paper, the above mentioned second order DSM is modified with input signal dependent forward path gain. The proposed DSM is suitable for industrial applications where one needs the digital representation of the analog input signal, during each sampling period. The proposed DSM can operate almost for the full range of input signals (-0.95 to +0.95) without causing instability, assuming that the second integrator output should not exceed the circuit supply voltage, ±15 Volts.

Keywords: DSM, stability, SNR, state variables.

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Authors: Kelvin Rozier, Vladimir E. Bondarenko

Abstract:

It is known that an analog Hopfield neural network with time delay can generate the outputs which are similar to the human electroencephalogram. To gain deeper insights into the mechanisms of rhythm generation by the Hopfield neural networks and to study the effects of noise on their activities, we investigated the behaviors of the networks with symmetric and asymmetric interneuron connections. The neural network under the study consists of 10 identical neurons. For symmetric (fully connected) networks all interneuron connections aij = +1; the interneuron connections for asymmetric networks form an upper triangular matrix with non-zero entries aij = +1. The behavior of the network is described by 10 differential equations, which are solved numerically. The results of simulations demonstrate some remarkable properties of a Hopfield neural network, such as linear growth of outputs, dependence of synchronization properties on the connection type, huge amplification of oscillation by the external uniform noise, and the capability of the neural network to transform one type of noise to another.

Keywords: Chaos, Hopfield neural network, noise, synchronization

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Authors: Hossein Khademolhosseini, Mehdi Hosseinzadeh

Abstract:

The residue number system (RNS), due to its properties, is used in applications in which high performance computation is needed. The carry free nature, which makes the arithmetic, carry bounded as well as the paralleling facility is the reason of its capability of high speed rendering. Since carry is not propagated between the moduli in this system, the performance is only restricted by the speed of the operations in each modulus. In this paper a novel method of number representation by use of redundancy is suggested in which {rn- 2,rn-1,rn} is the reference moduli set where r=2k+1 and k =1, 2,3,.. This method achieves fast computations and conversions and makes the circuits of them much simpler.

Keywords: Binary to RNS converter, Carry save adder, Computer arithmetic, Residue number system.

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Authors: Nasir Mehmood, Jens Ogniewski, Vinodh Ravinath

Abstract:

This paper describes the design of a real-time audiorange digital oscilloscope and its implementation in 90nm CMOS FPGA platform. The design consists of sample and hold circuits, A/D conversion, audio and video processing, on-chip RAM, clock generation and control logic. The design of internal blocks and modules in 90nm devices in an FPGA is elaborated. Also the key features and their implementation algorithms are presented. Finally, the timing waveforms and simulation results are put forward.

Keywords: CMOS, VLSI, Oscilloscope, Field Programmable Gate Array (FPGA), VHDL, Video Graphics Array (VGA)

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Authors: K. Diwakar, N. Vasudevan, C. Senthilpari

Abstract:

This paper presents MOSFET based analog to digital converter which is simple in design, has high resolution, and conversion rate better than dual slope ADC. It has no DAC which will limit the performance, no error in conversion, can operate for wide range of inputs and never become unstable. One of the industrial applications, where the proposed high resolution MOSFET ADC can be used is, for the positioning of control valves in a multi channel data acquisition and control system (DACS), using stepper motors as actuators of control valves. It is observed that in a DACS having ten control valves, 0.02% of positional accuracy of control valves can be achieved with the data update period of 250ms and with stepper motors of maximum pulse rate 20 Kpulses per sec. and minimum pulse width of 2.5 μsec. The reported accuracy so far by other authors is 0.2%, with update period of 255 ms and with 8 bit DAC. The accuracy in the proposed configuration is limited by the available precision stepper motor and not by the MOSFET based ADC.

Keywords: MOSFET based ADC, Actuators, Positional accuracy, Stepper Motors.

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Authors: Z. Bottyán, F. Wantuch, A. Z. Gyöngyösi, Z. Tuba, K. Hadobács, P. Kardos, R. Kurunczi

Abstract:

The sensitivity of UAVs to the atmospheric effects are apparent. All the same the meteorological support for the UAVs missions is often non-adequate or partly missing. In our paper we show a new complex meteorological support system for different types of UAVs pilots, specialists and decision makers, too. The mentioned system has two important parts with different forecasts approach such as the statistical and dynamical ones. The statistical prediction approach is based on a large climatological data base and the special analog method which is able to select similar weather situations from the mentioned data base to apply them during the forecasting procedure. The applied dynamic approach uses the specific WRF model runs twice a day and produces 96 hours, high resolution weather forecast for the UAV users over the Hungary. An easy to use web-based system can give important weather information over the Carpathian basin in Central-Europe. The mentioned products can be reached via internet connection.

Keywords: Aviation meteorology, statistical weather prediction, unmanned aerial systems, WRF.

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Authors: José Peralta, Gabriela Peretti, Eduardo Romero, Carlos Marqués

Abstract:

This paper proposes a new performance characterization for the test strategy intended for second order filters denominated Transient Analysis Method (TRAM). We evaluate the ability of the addressed test strategy for detecting deviation faults under simultaneous statistical fluctuation of the non-faulty parameters. For this purpose, we use Monte Carlo simulations and a fault model that considers as faulty only one component of the filter under test while the others components adopt random values (within their tolerance band) obtained from their statistical distributions. The new data reported here show (for the filters under study) the presence of hard-to-test components and relatively low fault coverage values for small deviation faults. These results suggest that the fault coverage value obtained using only nominal values for the non-faulty components (the traditional evaluation of TRAM) seem to be a poor predictor of the test performance.

Keywords: testing, fault analysis, analog filter test, parametric faults detection.

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Authors: Venkatesh C., K. Shanti Swarup

Abstract:

This paper investigates the impact on operating time delay and relay maloperation when 1st,2nd and 3rd order analog antialiasing filters are used in numerical distance protection. RC filter with cut-off frequency 90 Hz is used. Simulations are carried out for different SIR (Source to line Impedance Ratio), load, fault type and fault conditions using SIMULINK, where the voltage and current signals are fed online to the developed numerical distance relay model. Matlab is used for plotting the impedance trajectory. Investigation results shows that, about 75 % of the simulated cases, numerical distance relay operating time is not increased even-though there is a time delay when higher order filters are used. Relay maloperation (selectivity) also reduces (increases) when higher order filters are used in numerical distance protection.

Keywords: Antialiasing, capacitive voltage transformers, delay estimation, discrete Fourier transform (DFT), distance measurement, low-pass filters, source to line impedance ratio (SIR), protective relaying.

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Authors: Aye Sandar Win

Abstract:

This paper demonstrates design and construction of microcontroller-based telephone exchange system and the aims of this paper is to study telecommunication, connection with PIC16F877A and DTMF MT8870D. In microcontroller system, PIC 16F877 microcontroller is used to control the call processing. Dial tone, busy tone and ring tone are provided during call progress. Instead of using ready made tone generator IC, oscillator based tone generator is used. The results of this telephone exchange system are perfect for homes and small businesses needing the extensions. It requires the phone operation control system, the analog interface circuit and the switching circuit. This exchange design will contain eight channels. It is the best low cost, good quality telephone exchange for today-s telecommunication needs. It offers the features available in much more expensive PBX units without using high-priced phones. It is for long distance telephone services.

Keywords: Control software, DTMF receiver and decoder, hooksensing, microcontroller system, power supply, ring generator andoscillator based tone generator.

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Authors: Young Wook Lee, Sun-Jae Kim, Soo-Yeon Lee, Moon-Kyu Song, Woo-Geun Lee Min-Koo Han

Abstract:

We have fabricated a-IGZO TFT and investigated the stability under positive DC and AC bias stress. The threshold voltage of a-IGZO TFT shifts positively under those biases, and that reduces on-current. For this reason, conventional shift-register circuit employing TFTs which stressed by positive bias will be unstable, may do not work properly. We have designed a new 6-transistor shift-register, which has less transistors than prior circuits. The TFTs of the proposed shift-register are not suffering from positive DC or AC stress, mainly kept unbiased. Despite the compact design, the stable output signal was verified through the SPICE simulation even under RC delay of clock signal.

Keywords: Indium Gallium Zinc Oxide (IGZO), Thin FilmTransistor (TFT), shift-register

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Authors: M. Mashayekhi, H. H. Ardakani, A. Omidian

Abstract:

Among various testing methodologies, Built-in Self- Test (BIST) is recognized as a low cost, effective paradigm. Also, full adders are one of the basic building blocks of most arithmetic circuits in all processing units. In this paper, an optimized testable 2- bit full adder as a test building block is proposed. Then, a BIST procedure is introduced to scale up the building block and to generate a self testable n-bit full adders. The target design can achieve 100% fault coverage using insignificant amount of hardware redundancy. Moreover, Overall test time is reduced by utilizing polymorphic gates and also by testing full adder building blocks in parallel.

Keywords: BIST, Full Adder, Polymorphic Gate

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Authors: Sharief F. Babiker, Abdelkareem Bedri, Rania Naeem

Abstract:

The implementation of single-electron tunneling (SET) simulators based on the master-equation (ME) formalism requires the efficient and accurate identification of an exhaustive list of active states and related tunnel events. Dynamic simulations also require the control of the emerging states and guarantee the safe elimination of decaying states. This paper describes algorithms for use in the stationary and dynamic control of the lists of active states and events. The paper presents results obtained using these algorithms with different SET structures.

Keywords: Active state, Coulomb blockade, Master Equation, Single electron devices

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Authors: M. Tarafdar Haque, A. Taheri

Abstract:

Application of neural networks in execution of programmed pulse width modulation (PPWM) of a voltage source inverter (VSI) is studied in this paper. Using the proposed method it is possible to cancel out the desired harmonics in output of VSI in addition to control the magnitude of fundamental harmonic, contineously. By checking the non-trained values and a performance index, the most appropriate neural network is proposed. It is shown that neural networks may solve the custom difficulties of practical utilization of PPWM such as large size of memory, complex digital circuits and controlling the magnitude of output voltage in a discrete manner.

Keywords: Neural Network, Inverter, PPWM.

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Authors: Pelaez Verdet, Antonio, Loscertales Sanchez, Pilar

Abstract:

One of the mayor problems of programming a cruise circuit is to decide which destinations to include and which don-t. Thus a decision problem emerges, that might be solved using a linear and goal programming approach. The problem becomes more complex if several boats in the fleet must be programmed in a limited schedule, trying their capacity matches best a seasonal demand and also attempting to minimize the operation costs. Moreover, the programmer of the company should consider the time of the passenger as a limited asset, and would like to maximize its usage. The aim of this work is to design a method in which, using linear and goal programming techniques, a model to design circuits for the cruise company decision maker can achieve an optimal solution within the fleet schedule.

Keywords: Itinerary design, cruise programming, goalprogramming, linear programming

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Authors: N. Nandan A. M. Nagaraj, L. Sanjeev Kumar

Abstract:

In the rapidly growing population, the requirement of electrical power is increasing day by day. In order to meet the needs, we need to generate the power using alternate method. In this paper, a presentable approach is developed by analysis and can be implemented by utilizing heat energy, which is generated in numerous ways in some of the rural areas in India. The thermoelectric generator unit will be developed by combing with control circuits and converts, which is used to light the LED lamps. The temperature difference which is available in the kitchens, especially the exhaust pipes/chimneys of wooden fire stoves, where more heat is dissipated into the atmosphere, can be utilized for electrical power generation. Hence, the temperature rise of surroundings atmosphere can be reduced.

Keywords: Thermoelectric generator, LED, converts, temperature.

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Authors: M. N. Moschakis, I. G. Andritsos, V. V. Dafopoulos, J. M. Prousalidis, E. S. Karapidakis

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This paper deals with the evaluation of different detection strategies used in power electronic devices as a critical element for an effective mitigation of voltage disturbances. The effectiveness of those detection schemes in the mitigation of disturbances such as voltage sags by a Solid-State Transfer Switch is evaluated through simulations. All critical parameters affecting their performance is analytically described and presented. Moreover, the effect of fast detection of sags on the overall performance of STS is analyzed and investigated.

Keywords: Faults (short-circuits), industrial engineering, power electronics, power quality, static transfer switch, voltage sags (or dips).

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Authors: N. Benabdeslam, N. Bouzidi, F. Atmani, R. Boucif, A. Sakhri

Abstract:

The objective of this study was to provide answers for a better understanding of the mechanisms involved during grinding. To obtain a phosphate powder, we carry out sieving - grinding circuits for each parameter influencing the process. The analysis of the average particle size of the different tests carried out served in the first place as a basis for the determination of the granulometric curve area, the characteristics and the granular coefficients, then the exploitation of the different results for the calculation of the energies consumed for the fragmentation of different ore types, the energy coefficients as well as the ability to grind. Indeed, a time of 5 to 10 minutes can be chosen as the optimal grinding time in a disc mill for a % in weight of the highest pass. However, grinding time can influence the granular characteristics of ore.

Keywords: Energy, granular characteristics, grinding, mineralogical composition, phosphate ore.

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Authors: V. Swarnalatha, A. V. Narasimha Rao, P. Pal

Abstract:

The present research reports the investigation of fast etching of silicon for the fabrication of microelectromechanical systems (MEMS) structures using silicon wet bulk micromachining. Low concentration tetramethyl-ammonium hydroxide (TMAH) and hydroxylamine (NH₂OH) are used as main etchant and additive, respectively. The concentration of NH₂OH is varied to optimize the composition to achieve best etching characteristics such as high etch rate, significantly high undercutting at convex corner for the fast release of the microstructures from the substrate, and improved etched surface morphology. These etching characteristics are studied on Si{100} and Si{110} wafers as they are most widely used in the fabrication of MEMS structures as wells diode, transistors and integrated circuits.

Keywords: KOH, MEMS, micromachining, silicon, TMAH, wet anisotropic etching.

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Authors: Yogesh Pahariya, Rakesh Saxena, Biswaroop Sarkar

Abstract:

The selection of control strategy depends on the converters of the drive including power, speed, performance and the possible system costs. A number of attempts were therefore made in recent times to develop novel power electronic converter structures for SRM drives, based on the utilization. Many of the converters with variable speed drives have no input power factor correction circuits. This results in harmonic pollution of the utility supply, which should be avoided. The effect of power factor variation in terms of harmonic content is also analyzed in this study. The proposed topologies were simulated using MATLAB / Simulink software package and the results are obtained.

Keywords: Harmonic Pollution, Power Electronic Converter, Power Quality, Simulation.

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Authors: M. Jagabar Sathik, K. Ramani

Abstract:

In this paper family of multilevel inverter topology with reduced number of power switches is presented. The proposed inverter can generate both even and odd level. The proposed topology is suitable for symmetric structure. The proposed symmetric inverter results in reduction of power switches, power diode and gate driver circuits and also it may further minimize the installation area and cost. To prove the superiority of proposed topology is compared with conventional topologies. The performance of this symmetric multilevel inverter has been tested by computer based simulation and prototype based experimental setup for nine-level inverter is developed and results are verified.

Keywords: Cascaded H- Bridge (CHB), Multilevel Inverter (MLI), Nearest Level Modulation (NLM), Total Harmonic Distortion (THD).

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Authors: Mansour I. Abbadi, Abdel-Rahman M. Jaradat

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In this paper, a technique is proposed to implement an artificial voltage-controlled capacitance or inductance which can replace the well-known varactor diode in many applications. The technique is based on injecting the current of a voltage-controlled current source onto a fixed capacitor or inductor. Then, by controlling the transconductance of the current source by an external bias voltage, a voltage-controlled capacitive or inductive reactance is obtained. The proposed voltage-controlled reactance devices can be designed to work anywhere in the frequency spectrum. Practical circuits for the proposed voltage-controlled reactances are suggested and simulated.

Keywords: voltage-controlled capacitance, voltage-controlled inductance, varactor diode, variable transconductance.

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