Search results for: write delay.
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 630

Search results for: write delay.

270 Capacity Enhancement in Wireless Networks using Directional Antennas

Authors: Sedat Atmaca, Celal Ceken, Ismail Erturk

Abstract:

One of the biggest drawbacks of the wireless environment is the limited bandwidth. However, the users sharing this limited bandwidth have been increasing considerably. SDMA technique which entails using directional antennas allows to increase the capacity of a wireless network by separating users in the medium. In this paper, it has been presented how the capacity can be enhanced while the mean delay is reduced by using directional antennas in wireless networks employing TDMA/FDD MAC. Computer modeling and simulation of the wireless system studied are realized using OPNET Modeler. Preliminary simulation results are presented and the performance of the model using directional antennas is evaluated and compared consistently with the one using omnidirectional antennas.

Keywords: Directional Antenna, TDMA, SDMA,

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269 Bias Stability of a-IGZO TFT and a new Shift-Register Design Suitable for a-IGZO TFT

Authors: Young Wook Lee, Sun-Jae Kim, Soo-Yeon Lee, Moon-Kyu Song, Woo-Geun Lee Min-Koo Han

Abstract:

We have fabricated a-IGZO TFT and investigated the stability under positive DC and AC bias stress. The threshold voltage of a-IGZO TFT shifts positively under those biases, and that reduces on-current. For this reason, conventional shift-register circuit employing TFTs which stressed by positive bias will be unstable, may do not work properly. We have designed a new 6-transistor shift-register, which has less transistors than prior circuits. The TFTs of the proposed shift-register are not suffering from positive DC or AC stress, mainly kept unbiased. Despite the compact design, the stable output signal was verified through the SPICE simulation even under RC delay of clock signal.

Keywords: Indium Gallium Zinc Oxide (IGZO), Thin FilmTransistor (TFT), shift-register

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268 A Methodology for Reducing the BGP Convergence Time

Authors: Eatedal A. Alabdulkreem, Hamed S. Al-Raweshidy, Maysam F. Abbod

Abstract:

Border Gateway Protocol (BGP) is the standard routing protocol between various autonomous systems (AS) in the internet. In the event of failure, a considerable delay in the BGP convergence has been shown by empirical measurements. During the convergence time the BGP will repeatedly advertise new routes to some destination and withdraw old ones until it reach a stable state. It has been found that the KEEPALIVE message timer and the HOLD time are tow parameters affecting the convergence speed. This paper aims to find the optimum value for the KEEPALIVE timer and the HOLD time that maximally reduces the convergence time without increasing the traffic. The KEEPALIVE message timer optimal value founded by this paper is 30 second instead of 60 seconds, and the optimal value for the HOLD time is 90 seconds instead of 180 seconds.

Keywords: BGP, Convergence Time, HOLD time, Keep alive.

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267 Modeling and Prediction of Zinc Extraction Efficiency from Concentrate by Operating Condition and Using Artificial Neural Networks

Authors: S. Mousavian, D. Ashouri, F. Mousavian, V. Nikkhah Rashidabad, N. Ghazinia

Abstract:

PH, temperature and time of extraction of each stage,  agitation speed and delay time between stages effect on efficiency of  zinc extraction from concentrate. In this research, efficiency of zinc  extraction was predicted as a function of mentioned variable by  artificial neural networks (ANN). ANN with different layer was  employed and the result show that the networks with 8 neurons in  hidden layer has good agreement with experimental data.

 

Keywords: Zinc extraction, Efficiency, Neural networks, Operating condition.

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266 Comparative Study of Scheduling Algorithms for LTE Networks

Authors: Samia Dardouri, Ridha Bouallegue

Abstract:

Scheduling is the process of dynamically allocating physical resources to User Equipment (UE) based on scheduling algorithms implemented at the LTE base station. Various algorithms have been proposed by network researchers as the implementation of scheduling algorithm which represents an open issue in Long Term Evolution (LTE) standard. This paper makes an attempt to study and compare the performance of PF, MLWDF and EXP/PF scheduling algorithms. The evaluation is considered for a single cell with interference scenario for different flows such as Best effort, Video and VoIP in a pedestrian and vehicular environment using the LTE-Sim network simulator. The comparative study is conducted in terms of system throughput, fairness index, delay, packet loss ratio (PLR) and total cell spectral efficiency.

Keywords: LTE, Multimedia flows, Scheduling algorithms.

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265 A Performance Analysis of Different Scheduling Schemes in WiMAX

Authors: A. Youseef

Abstract:

IEEE 802.16 (WiMAX) aims to present high speed wireless access to cover wide range coverage. The base station (BS) and the subscriber station (SS) are the main parts of WiMAX. WiMAX uses either Point-to-Multipoint (PMP) or mesh topologies. In the PMP mode, the SSs connect to the BS to gain access to the network. However, in the mesh mode, the SSs connect to each other to gain access to the BS. The main components of QoS management in the 802.16 standard are the admission control, buffer management and packet scheduling. In this paper, we use QualNet 5.0.2 to study the performance of different scheduling schemes, such as WFQ, SCFQ, RR and SP when the numbers of SSs increase. We find that when the number of SSs increases, the average jitter and average end-to-end delay is increased and the throughput is reduced.

Keywords: WiMAX, Scheduling Scheme, QoS, QualNet.

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264 Technology Trend and Level Assessment Using Patent Data for Preliminary Feasibility Study on R and D Program

Authors: Seongmin Yim

Abstract:

The Korean government has applied preliminary feasibility study for new and huge R&D programs since 2008.The study is carried out from the viewpoints of technology, policy, and Economics. Then integrate the separate analysis and finally arrive at a definite result; whether a program is feasible or unfeasible, This paper describes the concept and method of the feasibility analysis focused on technological viability assessment for technical analysis. It consists of technology trend assessment and technology level assessment. Through the analysis, we can determine the chance of schedule delay or cost overrun occurring in the proposed plan.

Keywords: Preliminary Feasibility Study, Technological viability, Technology Trend Assessment, Technology Level Assessment

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263 Existence and Global Exponential Stability of Periodic Solutions of Cellular Neural Networks with Distributed Delays and Impulses on Time Scales

Authors: Daiming Wang

Abstract:

In this paper, by using Mawhin-s continuation theorem of coincidence degree and a method based on delay differential inequality, some sufficient conditions are obtained for the existence and global exponential stability of periodic solutions of cellular neural networks with distributed delays and impulses on time scales. The results of this paper generalized previously known results.

Keywords: Periodic solutions, global exponential stability, coincidence degree, M-matrix.

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262 A Low-Area Fully-Reconfigurable Hardware Design of Fast Fourier Transform System for 3GPP-LTE Standard

Authors: Xin-Yu Shih, Yue-Qu Liu, Hong-Ru Chou

Abstract:

This paper presents a low-area and fully-reconfigurable Fast Fourier Transform (FFT) hardware design for 3GPP-LTE communication standard. It can fully support 32 different FFT sizes, up to 2048 FFT points. Besides, a special processing element is developed for making reconfigurable computing characteristics possible, while first-in first-out (FIFO) scheduling scheme design technique is proposed for hardware-friendly FIFO resource arranging. In a synthesis chip realization via TSMC 40 nm CMOS technology, the hardware circuit only occupies core area of 0.2325 mm2 and dissipates 233.5 mW at maximal operating frequency of 250 MHz.

Keywords: Reconfigurable, fast Fourier transform, single-path delay feedback, 3GPP-LTE.

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261 14-Bit 1MS/s Cyclic-Pipelined ADC

Authors: S. Saisundar, Shan Jiang, Kevin T. C. Chai, David Nuttman, Minkyu Je

Abstract:

This paper presents a 14-bit cyclic-pipelined Analog to digital converter (ADC) running at 1 MS/s. The architecture is based on a 1.5-bit per stage structure utilizing digital correction for each stage. The ADC consists of two 1.5-bit stages, one shift register delay line, and digital error correction logic. Inside each 1.5-bit stage, there is one gain-boosting op-amp and two comparators. The ADC was implemented in 0.18µm CMOS process and the design has an area of approximately 0.2 mm2. The ADC has a differential input range of 1.2 Vpp. The circuit has an average power consumption of 3.5mA with 10MHz sampling clocks. The post-layout simulations of the design satisfy 12-bit SNDR with a full-scale sinusoid input.


Keywords: Analog to digital converter, cyclic, gain-boosting, pipelined.

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260 Analyzing the Impact of DCF and PCF on WLAN Network Standards 802.11a, 802.11b and 802.11g

Authors: Amandeep Singh Dhaliwal

Abstract:

Networking solutions, particularly wireless local area networks have revolutionized the technological advancement. Wireless Local Area Networks (WLANs) have gained a lot of popularity as they provide location-independent network access between computing devices. There are a number of access methods used in Wireless Networks among which DCF and PCF are the fundamental access methods. This paper emphasizes on the impact of DCF and PCF access mechanisms on the performance of the IEEE 802.11a, 802.11b and 802.11g standards. On the basis of various parameters viz. throughput, delay, load etc performance is evaluated between these three standards using above mentioned access mechanisms. Analysis revealed a superior throughput performance with low delays for 802.11g standard as compared to 802.11 a/b standard using both DCF and PCF access methods.

Keywords: DCF, IEEE, PCF, WLAN.

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259 Sampled-Data Model Predictive Tracking Control for Mobile Robot

Authors: Wookyong Kwon, Sangmoon Lee

Abstract:

In this paper, a sampled-data model predictive tracking control method is presented for mobile robots which is modeled as constrained continuous-time linear parameter varying (LPV) systems. The presented sampled-data predictive controller is designed by linear matrix inequality approach. Based on the input delay approach, a controller design condition is derived by constructing a new Lyapunov function. Finally, a numerical example is given to demonstrate the effectiveness of the presented method.

Keywords: Model predictive control, sampled-data control, linear parameter varying systems, LPV.

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258 Trial Development the Evaluation Method of Quantification the Feeling of Preventing Visibility by Front A Pillar

Authors: T. Arakawa, H. Sato

Abstract:

There are many drivers who feel right A pillar of Japanese right-hand-drive car preventing visibility on turning right or left at intersection. On the other hand, there is a report that almost pedestrian accident is caused by the delay of finding pedestrian by drivers and this is found by drivers’ eye movement. Thus, we developed the evaluation method of quantification using drivers’ eye movement data by least squares estimation and we applied this method to commercial vehicle and evaluation the visibility. It is suggested that visibility of vehicle can be quantified and estimated by linear model obtained from experimental eye fixation data and information of vehicle dimensions.

Keywords: Eye fixation, modeling, obstacle feeling, right A pillar.

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257 Tuning a Fractional Order PID Controller with Lead Compensator in Frequency Domain

Authors: Tahmine. V. Moghaddam, N. Bigdeli, K. Afshar

Abstract:

To achieve the desired specifications of gain and phase margins for plants with time-delay that stabilized with FO-PID controller a lead compensator is designed. At first the range of controlled system stability based on stability boundary criteria is determined. Using stability boundary locus method in frequency domain the fractional order controller parameters are tuned and then with drawing bode diagram in frequency domain accessing to desired gain and phase margin are shown. Numerical examples are given to illustrate the shapes of the stabilizing region and to show the design procedure.

Keywords: Fractional controller, Lead compensator, Stabilityregions, Stability boundary locus

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256 A Case Study of Limited Dynamic Voltage Frequency Scaling in Low-Power Processors

Authors: Hwan Su Jung, Ahn Jun Gil, Jong Tae Kim

Abstract:

Power management techniques are necessary to save power in the microprocessor. By changing the frequency and/or operating voltage of processor, DVFS can control power consumption. In this paper, we perform a case study to find optimal power state transition for DVFS. We propose the equation to find the optimal ratio between executions of states while taking into account the deadline of processing time and the power state transition delay overhead. The experiment is performed on the Cortex-M4 processor, and average 6.5% power saving is observed when DVFS is applied under the deadline condition.

Keywords: Deadline, Dynamic Voltage Frequency Scaling, Power State Transition.

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255 Enhanced QoS Mechanisms for IEEE 802.11e Wireless Networks

Authors: Ho-Ting Wu, Min-Hua Yang, Kai-Wei Ke, Lei Yan

Abstract:

The quality-of-service (QoS) support for wireless LANs has been a hot research topic during the past few years. In this paper, two QoS provisioning mechanisms are proposed for the employment in 802.11e EDCA MAC scheme. First, the proposed call admission control mechanism can not only guarantee the QoS for the higher priority existing connections but also provide the minimum reserved bandwidth for traffic flows with lower priority. In addition, the adaptive contention window adjustment mechanism can adjust the maximum and minimum contention window size dynamically according to the existing connection number of each AC. The collision probability as well as the packet delay will thus be reduced effectively. Performance results via simulations have revealed the enhanced QoS property achieved by employing these two mechanisms.

Keywords: 802.11e, admission control, contention window, EDCA

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254 Reducing Power in Error Correcting Code using Genetic Algorithm

Authors: Heesung Lee, Joonkyung Sung, Euntai Kim

Abstract:

This paper proposes a method which reduces power consumption in single-error correcting, double error-detecting checker circuits that perform memory error correction code. Power is minimized with little or no impact on area and delay, using the degrees of freedom in selecting the parity check matrix of the error correcting codes. The genetic algorithm is employed to solve the non linear power optimization problem. The method is applied to two commonly used SEC-DED codes: standard Hamming and odd column weight Hsiao codes. Experiments were performed to show the performance of the proposed method.

Keywords: Error correcting codes, genetic algorithm, non-linearpower optimization, Hamming code, Hsiao code.

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253 Enhanced Parallel-Connected Comb Filter Method for Multiple Pitch Estimation

Authors: Taro Matsuno, Yuta Otani, Ryo Tanaka, Kaori Ikezaki, Hitoshi Yamamoto, Masaru Fujieda, Yoshihisa Ishida

Abstract:

This paper presents an improvement method of the multiple pitch estimation algorithm using comb filters. Conventionally the pitch was estimated by using parallel -connected comb filters method (PCF). However, PCF has problems which often fail in the pitch estimation when there is the fundamental frequency of higher tone near harmonics of lower tone. Therefore the estimation is assigned to a wrong note when shared frequencies happen. This issue often occurs in estimating octave 3 or more. Proposed method, for solving the problem, estimates the pitch with every harmonic instead of every octave. As a result, our method reaches the accuracy of more than 80%.

Keywords: music transcription, pitch estimation, comb filter, fractional delay

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252 An Analysis of Global Stability of a Class of Neutral-Type Neural Systems with Time Delays

Authors: Ozlem Faydasicok, Sabri Arik

Abstract:

This paper derives some new sufficient conditions for the stability of a class of neutral-type neural networks with discrete time delays by employing a suitable Lyapunov functional. The obtained conditions can be easily verified as they can be expressed in terms of the network parameters only. It is shown that the results presented in this paper for neutral-type delayed neural networks establish a new set of stability criteria, and therefore can be considered as the alternative results to the previously published literature results. A numerical example is also given to demonstrate the applicability of our proposed stability criterion.

Keywords: Stability Analysis, Neutral-Type Neural Networks, Time Delay Systems, Lyapunov Functionals.

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251 Experimental and Numerical Investigation of Flow Control Using a Novel Active Slat

Authors: Basman Elhadidi, Islam Elqatary, Osama Mohamady, Hesham Othman

Abstract:

An active slat is developed to increase the lift and delay the separation for a DU96-W180 airfoil. The active slat is a fixed slat that can be closed, fully opened or intermittently opened by a rotating vane depending on the need. Experimental results show that the active slat has reduced the mean pressure and increased the mean velocity on the suction side of the airfoil for all positive angles of attack, indicating an increase of lift. The experimental data and numerical simulations also show that the direction of actuator vane rotation can influence the mixing of the flow streams on the suction side and hence influence the aerodynamic performance.

Keywords: Active slat, flow control.

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250 IBFO_PSO: Evaluating the Performance of Bio-Inspired Integrated Bacterial Foraging Optimization Algorithm and Particle Swarm Optimization Algorithm in MANET Routing

Authors: K. Geetha, P. Thangaraj, C. Rasi Priya, C. Rajan, S. Geetha

Abstract:

This paper presents the performance of Integrated Bacterial Foraging Optimization and Particle Swarm Optimization (IBFO_PSO) technique in MANET routing. The BFO is a bio-inspired algorithm, which simulates the foraging behavior of bacteria. It is effectively applied in improving the routing performance in MANET. In results, it is proved that the PSO integrated with BFO reduces routing delay, energy consumption and communication overhead.

Keywords: Ant Colony Optimization, Bacterial Foraging Optimization, Hybrid Routing Intelligent Algorithm, Naturally inspired algorithms, Particle Swarm Optimization.

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249 Limit Cycle Behaviour of a Neural Controller with Delayed Bang-Bang Feedback

Authors: Travis Wiens, Greg Schoenau, Rich Burton

Abstract:

It is well known that a linear dynamic system including a delay will exhibit limit cycle oscillations when a bang-bang sensor is used in the feedback loop of a PID controller. A similar behaviour occurs when a delayed feedback signal is used to train a neural network. This paper develops a method of predicting this behaviour by linearizing the system, which can be shown to behave in a manner similar to an integral controller. Using this procedure, it is possible to predict the characteristics of the neural network driven limit cycle to varying degrees of accuracy, depending on the information known about the system. An application is also presented: the intelligent control of a spark ignition engine.

Keywords: Control and automation, artificial neural networks, limit cycle

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248 Cooperative CDD Scheme Based on Hierarchical Modulation in OFDM System

Authors: Seung-Jun Yu, Yeong-Seop Ahn, Young-Min Ko, Hyoung-Kyu Song

Abstract:

In order to achieve high data rate and increase the spectral efficiency, multiple input multiple output (MIMO) system has been proposed. However, multiple antennas are limited by size and cost. Therefore, recently developed cooperative diversity scheme, which profits the transmit diversity only with the existing hardware by constituting a virtual antenna array, can be a solution. However, most of the introduced cooperative techniques have a common fault of decreased transmission rate because the destination should receive the decodable compositions of symbols from the source and the relay. In this paper, we propose a cooperative cyclic delay diversity (CDD) scheme that use hierarchical modulation. This scheme is free from the rate loss and allows seamless cooperative communication.

Keywords: MIMO, Cooperative communication, CDD, Hierarchical modulation.

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247 Performance Study of ZigBee-Based Wireless Sensor Networks

Authors: Afif Saleh Abugharsa

Abstract:

The IEEE 802.15.4 standard is designed for low-rate wireless personal area networks (LR-WPAN) with focus on enabling wireless sensor networks. It aims to give a low data rate, low power consumption, and low cost wireless networking on the device-level communication. The objective of this study is to investigate the performance of IEEE 802.15.4 based networks using simulation tool. In this project the network simulator 2 NS2 was used to several performance measures of wireless sensor networks. Three scenarios were considered, multi hop network with a single coordinator, star topology, and an ad hoc on demand distance vector AODV. Results such as packet delivery ratio, hop delay, and number of collisions are obtained from these scenarios.

Keywords: ZigBee, wireless sensor networks, IEEE 802.15.4, low power, low data rate

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246 Analyzing and Formulation of Product Lead Time

Authors: B. Fahimnia, L.H.S. Luong, B. Motevallian, R. M. Marian, M. M. Esmaeil

Abstract:

Product Lead Time (PLT) is the period of time from receiving a customer's order to delivering the final product. PLT is an indicator of the manufacturing controllability, efficiency and performance. Due to the explosion in the rate of technological innovations and the rapid changes in the nature of manufacturing processes, manufacturing firms can bring the new products to market quicker only if they can reduce their PLT and speed up the rate at which they can design, plan, control, and manufacture. Although there is a substantial body of research on manufacturing relating to cost and quality issues, there is no much specific research conducted in relation to the formulation of PLT, despite its significance and importance. This paper analyzes and formulates PLT which can be used as a guideline for achieving the shorter PLT. Further more this paper identifies the causes of delay and factors that contributes to the increased product lead-time.

Keywords: Manufacturing Control, Manufacturing Lead Time, Manufacturing Planning, Product Design, and Product Lead Time.

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245 Analysis of CNT Bundle and its Comparison with Copper for FPGAs Interconnects

Authors: Kureshi Abdul Kadir, Mohd. Hasan

Abstract:

Each new semiconductor technology node brings smaller transistors and wires. Although this makes transistors faster, wires get slower. In nano-scale regime, the standard copper (Cu) interconnect will become a major hurdle for FPGA interconnect due to their high resistivity and electromigration. This paper presents the comprehensive evaluation of mixed CNT bundle interconnects and investigates their prospects as energy efficient and high speed interconnect for future FPGA routing architecture. All HSPICE simulations are carried out at operating frequency of 1GHz and it is found that mixed CNT bundle implemented in FPGAs as interconnect can potentially provide a substantial delay and energy reduction over traditional interconnects at 32nm process technology.

Keywords: CMOS, Copper Interconnect, Mixed CNT Bundle Interconnect, FPGAs.

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244 Causes of Construction Delays in Qatar Construction Projects

Authors: Murat Gunduz, Mohanad H. A. AbuHassan

Abstract:

Construction industry mainly focuses on the superstructure, infrastructure, and oil and gas industry. The development of infrastructure projects in developing countries attracted a lot of foreign construction contractors, consultants, suppliers and diversified workforce to interfere and to be evolved in such huge investment. Reducing worksite delays in such projects require knowledge and attention. Therefore, it is important to identify the influencing delay attributes affecting construction projects. The significant project factors affecting construction delays were investigated. Data collection was carried out through an online web survey system to capture significant factors. Significant factors were determined with importance index and relevant recommendations are made. The output of the data analysis would lead the industry experts better assess the impact of construction delays on construction projects.

Keywords: Construction industry, delays, importance index.

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243 Improved Asymptotic Stability Analysis for Lure Systems with Neutral Type and Time-varying Delays

Authors: Changchun Shen, Shouming Zhong

Abstract:

This paper investigates the problem of absolute stability and robust stability of a class of Lur-e systems with neutral type and time-varying delays. By using Lyapunov direct method and linear matrix inequality technique, new delay-dependent stability criteria are obtained and formulated in terms of linear matrix inequalities (LMIs) which are easy to check the stability of the considered systems. To obtain less conservative stability conditions, an operator is defined to construct the Lyapunov functional. Also, the free weighting matrices approach combining a matrix inequality technique is used to reduce the entailed conservativeness. Numerical examples are given to indicate significant improvements over some existing results.

Keywords: Lur'e system, linear matrix inequalities, Lyapunov, stability.

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242 Simulations of Routing Protocols of Wireless Sensor Networks

Authors: Kristoffer Clyde Magsino, H. Srikanth Kamath

Abstract:

Wireless Sensor Network is widely used in electronics. Wireless sensor networks are now used in many applications including military, environmental, healthcare applications, home automation and traffic control. We will study one area of wireless sensor networks, which is the routing protocol. Routing protocols are needed to send data between sensor nodes and the base station. In this paper, we will discuss two routing protocols, such as datacentric and hierarchical routing protocol. We will show the output of the protocols using the NS-2 simulator. This paper will compare the simulation output of the two routing protocol using Nam. We will simulate using Xgraph to find the throughput and delay of the protocol.

Keywords: data-centric routing protocol, hierarchical routingprotocol, Nam, NS-2, Routing Protocol, sensor nodes, SPIN, throughput, Xgraph

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241 Combined Effect of Heat Stimulation and Delay Addition of Superplasticizer with Slag on Fresh and Hardened Property of Mortar

Authors: Antoni Wibowo, Harry Pujianto, Dewi Retno Sari Saputro

Abstract:

The stock market can provide huge profits in a relatively short time in financial sector; however, it also has a high risk for investors and traders if they are not careful to look the factors that affect the stock market. Therefore, they should give attention to the dynamic fluctuations and movements of the stock market to optimize profits from their investment. In this paper, we present a nonlinear autoregressive exogenous model (NARX) to predict the movements of stock market; especially, the movements of the closing price index. As case study, we consider to predict the movement of the closing price in Indonesia composite index (IHSG) and choose the best structures of NARX for IHSG’s prediction.

Keywords: NARX, prediction, stock market, time series.

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