@article{(Open Science Index):https://publications.waset.org/pdf/10006908,
	  title     = {A Low-Area Fully-Reconfigurable Hardware Design of Fast Fourier Transform System for 3GPP-LTE Standard},
	  author    = {Xin-Yu Shih and  Yue-Qu Liu and  Hong-Ru Chou},
	  country	= {},
	  institution	= {},
	  abstract     = {This paper presents a low-area and fully-reconfigurable Fast Fourier Transform (FFT) hardware design for 3GPP-LTE communication standard. It can fully support 32 different FFT sizes, up to 2048 FFT points. Besides, a special processing element is developed for making reconfigurable computing characteristics possible, while first-in first-out (FIFO) scheduling scheme design technique is proposed for hardware-friendly FIFO resource arranging. In a synthesis chip realization via TSMC 40 nm CMOS technology, the hardware circuit only occupies core area of 0.2325 mm2 and dissipates 233.5 mW at maximal operating frequency of 250 MHz.
},
	    journal   = {International Journal of Computer and Information Engineering},
	  volume    = {11},
	  number    = {2},
	  year      = {2017},
	  pages     = {298 - 301},
	  ee        = {https://publications.waset.org/pdf/10006908},
	  url   	= {https://publications.waset.org/vol/122},
	  bibsource = {https://publications.waset.org/},
	  issn  	= {eISSN: 1307-6892},
	  publisher = {World Academy of Science, Engineering and Technology},
	  index 	= {Open Science Index 122, 2017},
	}