Search results for: Virtual Circuits (VC)
392 Theoretical Considerations of the Influence of Mechanical Uniaxial Stress on Pixel Readout Circuits
Authors: Georgios C. Dogiamis, Bedrich J. Hosticka, Anton Grabmaier
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In this work the effects of uniaxial mechanical stress on a pixel readout circuit are theoretically analyzed. It is the effects of mechanical stress on the in-pixel transistors do not arise at the output, when a correlated double sampling circuit is used. However, mechanical stress effects on the photodiode will directly appear at the readout chain output. Therefore, compensation techniques are needed to overcome this situation. Moreover simulation technique of mechanical stress is proposed and diverse layout as well as design recommendations are put forward, in order to minimize stress related effects on the output of a circuit. he shown, that wever, Moreover, a out
Keywords: mechanical uniaxial stress, pixel readout circuit
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1549391 A 3rd order 3bit Sigma-Delta Modulator with Reduced Delay Time of Data Weighted Averaging
Authors: Soon Jai Yi, Sun-Hong Kim, Hang-Geun Jeong, Seong-Ik Cho
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This paper presents a method of reducing the feedback delay time of DWA(Data Weighted Averaging) used in sigma-delta modulators. The delay time reduction results from the elimination of the latch at the quantizer output and also from the falling edge operation. The designed sigma-delta modulator improves the timing margin about 16%. The sub-circuits of sigma-delta modulator such as SC(Switched Capacitor) integrator, 9-level quantizer, comparator, and DWA are designed with the non-ideal characteristics taken into account. The sigma-delta modulator has a maximum SNR (Signal to Noise Ratio) of 84 dB or 13 bit resolution.Keywords: Sigma-delta modulator, multibit, DWA
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2406390 Simulation of Superconducting Nanowire Single-Photon Detector with Circuit Modeling
Authors: Seyed Ali Sedigh Zyabari, A. Zarifkar
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Single photon detectors have been fabricated NbN nano wire. These detectors are fabricated from high quality, ultra high vacuum sputtered NbN thin films on a sapphire substrate. In this work a typical schematic of the nanowire Single Photon Detector structure and then driving and measurement electronic circuit are shown. The response of superconducting nanowire single photon detectors during a photo detection event, is modeled by a special electrical circuits (two circuit). Finally, current through the wire is calculated by solving equations of models.Keywords: NbN, nanowire meander, superconducting single photon detector, kinetic inductance.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1502389 A Robust Redundant Residue Representation in Residue Number System with Moduli Set(rn-2,rn-1,rn)
Authors: Hossein Khademolhosseini, Mehdi Hosseinzadeh
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The residue number system (RNS), due to its properties, is used in applications in which high performance computation is needed. The carry free nature, which makes the arithmetic, carry bounded as well as the paralleling facility is the reason of its capability of high speed rendering. Since carry is not propagated between the moduli in this system, the performance is only restricted by the speed of the operations in each modulus. In this paper a novel method of number representation by use of redundancy is suggested in which {rn- 2,rn-1,rn} is the reference moduli set where r=2k+1 and k =1, 2,3,.. This method achieves fast computations and conversions and makes the circuits of them much simpler.Keywords: Binary to RNS converter, Carry save adder, Computer arithmetic, Residue number system.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1371388 Real-Time Digital Oscilloscope Implementation in 90nm CMOS Technology FPGA
Authors: Nasir Mehmood, Jens Ogniewski, Vinodh Ravinath
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This paper describes the design of a real-time audiorange digital oscilloscope and its implementation in 90nm CMOS FPGA platform. The design consists of sample and hold circuits, A/D conversion, audio and video processing, on-chip RAM, clock generation and control logic. The design of internal blocks and modules in 90nm devices in an FPGA is elaborated. Also the key features and their implementation algorithms are presented. Finally, the timing waveforms and simulation results are put forward.Keywords: CMOS, VLSI, Oscilloscope, Field Programmable Gate Array (FPGA), VHDL, Video Graphics Array (VGA)
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3083387 Bias Stability of a-IGZO TFT and a new Shift-Register Design Suitable for a-IGZO TFT
Authors: Young Wook Lee, Sun-Jae Kim, Soo-Yeon Lee, Moon-Kyu Song, Woo-Geun Lee Min-Koo Han
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We have fabricated a-IGZO TFT and investigated the stability under positive DC and AC bias stress. The threshold voltage of a-IGZO TFT shifts positively under those biases, and that reduces on-current. For this reason, conventional shift-register circuit employing TFTs which stressed by positive bias will be unstable, may do not work properly. We have designed a new 6-transistor shift-register, which has less transistors than prior circuits. The TFTs of the proposed shift-register are not suffering from positive DC or AC stress, mainly kept unbiased. Despite the compact design, the stable output signal was verified through the SPICE simulation even under RC delay of clock signal.Keywords: Indium Gallium Zinc Oxide (IGZO), Thin FilmTransistor (TFT), shift-register
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3256386 A New Efficient Scalable BIST Full Adder using Polymorphic Gates
Authors: M. Mashayekhi, H. H. Ardakani, A. Omidian
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Among various testing methodologies, Built-in Self- Test (BIST) is recognized as a low cost, effective paradigm. Also, full adders are one of the basic building blocks of most arithmetic circuits in all processing units. In this paper, an optimized testable 2- bit full adder as a test building block is proposed. Then, a BIST procedure is introduced to scale up the building block and to generate a self testable n-bit full adders. The target design can achieve 100% fault coverage using insignificant amount of hardware redundancy. Moreover, Overall test time is reduced by utilizing polymorphic gates and also by testing full adder building blocks in parallel.Keywords: BIST, Full Adder, Polymorphic Gate
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1773385 Identification of States and Events for the Static and Dynamic Simulation of Single Electron Tunneling Circuits
Authors: Sharief F. Babiker, Abdelkareem Bedri, Rania Naeem
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The implementation of single-electron tunneling (SET) simulators based on the master-equation (ME) formalism requires the efficient and accurate identification of an exhaustive list of active states and related tunnel events. Dynamic simulations also require the control of the emerging states and guarantee the safe elimination of decaying states. This paper describes algorithms for use in the stationary and dynamic control of the lists of active states and events. The paper presents results obtained using these algorithms with different SET structures.Keywords: Active state, Coulomb blockade, Master Equation, Single electron devices
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1390384 Using Neural Network for Execution of Programmed Pulse Width Modulation (PPWM) Method
Authors: M. Tarafdar Haque, A. Taheri
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Application of neural networks in execution of programmed pulse width modulation (PPWM) of a voltage source inverter (VSI) is studied in this paper. Using the proposed method it is possible to cancel out the desired harmonics in output of VSI in addition to control the magnitude of fundamental harmonic, contineously. By checking the non-trained values and a performance index, the most appropriate neural network is proposed. It is shown that neural networks may solve the custom difficulties of practical utilization of PPWM such as large size of memory, complex digital circuits and controlling the magnitude of output voltage in a discrete manner.Keywords: Neural Network, Inverter, PPWM.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1692383 Integrated Subset Split for Balancing Network Utilization and Quality of Routing
Authors: S. V. Kasmir Raja, P. Herbert Raj
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The overlay approach has been widely used by many service providers for Traffic Engineering (TE) in large Internet backbones. In the overlay approach, logical connections are set up between edge nodes to form a full mesh virtual network on top of the physical topology. IP routing is then run over the virtual network. Traffic engineering objectives are achieved through carefully routing logical connections over the physical links. Although the overlay approach has been implemented in many operational networks, it has a number of well-known scaling issues. This paper proposes a new approach to achieve traffic engineering without full-mesh overlaying with the help of integrated approach and equal subset split method. Traffic engineering needs to determine the optimal routing of traffic over the existing network infrastructure by efficiently allocating resource in order to optimize traffic performance on an IP network. Even though constraint-based routing [1] of Multi-Protocol Label Switching (MPLS) is developed to address this need, since it is not widely tested or debugged, Internet Service Providers (ISPs) resort to TE methods under Open Shortest Path First (OSPF), which is the most commonly used intra-domain routing protocol. Determining OSPF link weights for optimal network performance is an NP-hard problem. As it is not possible to solve this problem, we present a subset split method to improve the efficiency and performance by minimizing the maximum link utilization in the network via a small number of link weight modifications. The results of this method are compared against results of MPLS architecture [9] and other heuristic methods.
Keywords: Constraint based routing, Link Utilization, Subsetsplit method and Traffic Engineering.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1396382 Algorithmic Method for Efficient Cruise Program
Authors: Pelaez Verdet, Antonio, Loscertales Sanchez, Pilar
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One of the mayor problems of programming a cruise circuit is to decide which destinations to include and which don-t. Thus a decision problem emerges, that might be solved using a linear and goal programming approach. The problem becomes more complex if several boats in the fleet must be programmed in a limited schedule, trying their capacity matches best a seasonal demand and also attempting to minimize the operation costs. Moreover, the programmer of the company should consider the time of the passenger as a limited asset, and would like to maximize its usage. The aim of this work is to design a method in which, using linear and goal programming techniques, a model to design circuits for the cruise company decision maker can achieve an optimal solution within the fleet schedule.Keywords: Itinerary design, cruise programming, goalprogramming, linear programming
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1650381 Electrical Energy Harvesting Using Thermo Electric Generator for Rural Communities in India
Authors: N. Nandan A. M. Nagaraj, L. Sanjeev Kumar
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In the rapidly growing population, the requirement of electrical power is increasing day by day. In order to meet the needs, we need to generate the power using alternate method. In this paper, a presentable approach is developed by analysis and can be implemented by utilizing heat energy, which is generated in numerous ways in some of the rural areas in India. The thermoelectric generator unit will be developed by combing with control circuits and converts, which is used to light the LED lamps. The temperature difference which is available in the kitchens, especially the exhaust pipes/chimneys of wooden fire stoves, where more heat is dissipated into the atmosphere, can be utilized for electrical power generation. Hence, the temperature rise of surroundings atmosphere can be reduced.
Keywords: Thermoelectric generator, LED, converts, temperature.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 815380 An Evaluation of Sag Detection Techniques for Fast Solid-State Electronic Transferring to Alternate Electrical Energy Sources
Authors: M. N. Moschakis, I. G. Andritsos, V. V. Dafopoulos, J. M. Prousalidis, E. S. Karapidakis
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This paper deals with the evaluation of different detection strategies used in power electronic devices as a critical element for an effective mitigation of voltage disturbances. The effectiveness of those detection schemes in the mitigation of disturbances such as voltage sags by a Solid-State Transfer Switch is evaluated through simulations. All critical parameters affecting their performance is analytically described and presented. Moreover, the effect of fast detection of sags on the overall performance of STS is analyzed and investigated.
Keywords: Faults (short-circuits), industrial engineering, power electronics, power quality, static transfer switch, voltage sags (or dips).
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1892379 The Effect of the Parameters of the Grinding on the Characteristics of the Deposit Phosphate Ore of Kef Es Sennoun, Djebel Onk-Tebessa, Algeria
Authors: N. Benabdeslam, N. Bouzidi, F. Atmani, R. Boucif, A. Sakhri
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The objective of this study was to provide answers for a better understanding of the mechanisms involved during grinding. To obtain a phosphate powder, we carry out sieving - grinding circuits for each parameter influencing the process. The analysis of the average particle size of the different tests carried out served in the first place as a basis for the determination of the granulometric curve area, the characteristics and the granular coefficients, then the exploitation of the different results for the calculation of the energies consumed for the fragmentation of different ore types, the energy coefficients as well as the ability to grind. Indeed, a time of 5 to 10 minutes can be chosen as the optimal grinding time in a disc mill for a % in weight of the highest pass. However, grinding time can influence the granular characteristics of ore.Keywords: Energy, granular characteristics, grinding, mineralogical composition, phosphate ore.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 786378 The COVID-19 Pandemic: Lessons Learned in Promoting Student Internationalisation
Authors: David Cobham
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In higher education, a great degree of importance is placed on the internationalisation of the student experience. This is seen as a valuable contributor to elements such as building confidence, broadening knowledge, creating networks, and connections and enhancing employability for current students who will become the next generation of managers in technology and business. The COVID-19 pandemic has affected all areas of people’s lives. The limitations of travel coupled with the fears and concerns generated by the health risks have dramatically reduced the opportunity for students to engage with this agenda. Institutions of higher education have been required to rethink fundamental aspects of their business model from recruitment and enrolment, through learning approaches, assessment methods and the pathway to employment. This paper presents a case study which focuses on student mobility and how the physical experience of being in another country either to study, to work, to volunteer or to gain cultural and social enhancement has of necessity been replaced by alternative approaches. It considers trans-national education as an alternative to physical study overseas, virtual mobility and internships as an alternative to international work experience and adopting collaborative on-line projects as an alternative to in-person encounters. The paper concludes that although these elements have been adopted to address the current situation, the lessons learnt and the feedback gained suggests that they have contributed successfully in new and sometimes unexpected ways, and that they will persist beyond the present to become part of the "new normal" for the future. That being the case, senior leaders of institutions of higher education will be required to revisit their international plans and to rewrite their international strategies to take account of and build upon these changes.
Keywords: Trans-national education, internationalisation, higher education management, virtual mobility.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 968377 Study of Fast Etching of Silicon for the Fabrication of Bulk Micromachined MEMS Structures
Authors: V. Swarnalatha, A. V. Narasimha Rao, P. Pal
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The present research reports the investigation of fast etching of silicon for the fabrication of microelectromechanical systems (MEMS) structures using silicon wet bulk micromachining. Low concentration tetramethyl-ammonium hydroxide (TMAH) and hydroxylamine (NH2OH) are used as main etchant and additive, respectively. The concentration of NH2OH is varied to optimize the composition to achieve best etching characteristics such as high etch rate, significantly high undercutting at convex corner for the fast release of the microstructures from the substrate, and improved etched surface morphology. These etching characteristics are studied on Si{100} and Si{110} wafers as they are most widely used in the fabrication of MEMS structures as wells diode, transistors and integrated circuits.Keywords: KOH, MEMS, micromachining, silicon, TMAH, wet anisotropic etching.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1219376 Control Strategy of SRM Converters for Power Quality Improvement
Authors: Yogesh Pahariya, Rakesh Saxena, Biswaroop Sarkar
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The selection of control strategy depends on the converters of the drive including power, speed, performance and the possible system costs. A number of attempts were therefore made in recent times to develop novel power electronic converter structures for SRM drives, based on the utilization. Many of the converters with variable speed drives have no input power factor correction circuits. This results in harmonic pollution of the utility supply, which should be avoided. The effect of power factor variation in terms of harmonic content is also analyzed in this study. The proposed topologies were simulated using MATLAB / Simulink software package and the results are obtained.
Keywords: Harmonic Pollution, Power Electronic Converter, Power Quality, Simulation.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2554375 A Novel Approach of Multilevel Inverter with Reduced Power Electronics Devices
Authors: M. Jagabar Sathik, K. Ramani
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In this paper family of multilevel inverter topology with reduced number of power switches is presented. The proposed inverter can generate both even and odd level. The proposed topology is suitable for symmetric structure. The proposed symmetric inverter results in reduction of power switches, power diode and gate driver circuits and also it may further minimize the installation area and cost. To prove the superiority of proposed topology is compared with conventional topologies. The performance of this symmetric multilevel inverter has been tested by computer based simulation and prototype based experimental setup for nine-level inverter is developed and results are verified.
Keywords: Cascaded H- Bridge (CHB), Multilevel Inverter (MLI), Nearest Level Modulation (NLM), Total Harmonic Distortion (THD).
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3147374 Artificial Voltage-Controlled Capacitance and Inductance using Voltage-Controlled Transconductance
Authors: Mansour I. Abbadi, Abdel-Rahman M. Jaradat
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In this paper, a technique is proposed to implement an artificial voltage-controlled capacitance or inductance which can replace the well-known varactor diode in many applications. The technique is based on injecting the current of a voltage-controlled current source onto a fixed capacitor or inductor. Then, by controlling the transconductance of the current source by an external bias voltage, a voltage-controlled capacitive or inductive reactance is obtained. The proposed voltage-controlled reactance devices can be designed to work anywhere in the frequency spectrum. Practical circuits for the proposed voltage-controlled reactances are suggested and simulated.Keywords: voltage-controlled capacitance, voltage-controlled inductance, varactor diode, variable transconductance.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4827373 Modeling and Verification for the Micropayment Protocol Netpay
Authors: Kaylash Chaudhary, Ansgar Fehnker
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There are many virtual payment systems available to conduct micropayments. It is essential that the protocols satisfy the highest standards of correctness. This paper examines the Netpay Protocol [3], provide its formalization as automata model, and prove two important correctness properties, namely absence of deadlock and validity of an ecoin during the execution of the protocol. This paper assumes a cooperative customer and will prove that the protocol is executing according to its description.Keywords: Model, Verification, Micropayment.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1328372 Reducing Power in Error Correcting Code using Genetic Algorithm
Authors: Heesung Lee, Joonkyung Sung, Euntai Kim
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This paper proposes a method which reduces power consumption in single-error correcting, double error-detecting checker circuits that perform memory error correction code. Power is minimized with little or no impact on area and delay, using the degrees of freedom in selecting the parity check matrix of the error correcting codes. The genetic algorithm is employed to solve the non linear power optimization problem. The method is applied to two commonly used SEC-DED codes: standard Hamming and odd column weight Hsiao codes. Experiments were performed to show the performance of the proposed method.Keywords: Error correcting codes, genetic algorithm, non-linearpower optimization, Hamming code, Hsiao code.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2185371 Investigation of Chaotic Behavior in DC-DC Converters
Authors: Sajid Iqbal, Masood Ahmed, Suhail Aftab Qureshi
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DC-DC converters are widely used in regulated switched mode power supplies and in DC motor drive applications. There are several sources of unwanted nonlinearity in practical power converters. In addition, their operation is characterized by switching that gives birth to a variety of nonlinear dynamics. DC-DC buck and boost converters controlled by pulse-width modulation (PWM) have been simulated. The voltage waveforms and attractors obtained from the circuit simulation have been studied. With the onset of instability, the phenomenon of subharmonic oscillations, quasi-periodicity, bifurcations, and chaos have been observed. This paper is mainly motivated by potential contributions of chaos theory in the design, analysis and control of power converters, in particular and power electronics circuits, in general.
Keywords: Buck converter, boost converter, period- doubling, chaos, bifurcation, strange attractor.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3649370 Second Language Development with an Intercultural Approach: A Pilot Program Applied to Higher Education Students from a Escuela Normal in Atequiza, Mexico
Authors: Frida C. Jaime Franco, C. Paulina Navarro Núñez, R. Jacob Sánchez Nájera
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The importance of developing multi-language abilities in our global society is noteworthy. However, the necessity, interest, and consciousness of the significance that the development of another language represents, apart from the mother tongue, is not always the same in all contexts as it is in multicultural communities, especially in rural higher education institutions immersed in small communities. Leading opportunities for digital interaction among learners from Mexico and abroad partners represents scaffolding towards, not only language skills development but also intercultural communicative competences (ICC). This study leads us to consider what should be the best approach to work while applying a program of ICC integrated into the practice of EFL. While analyzing the roots of the language, it is possible to obtain the main objective of learning another language, to communicate with a functional purpose, as well as attaching social practices to the learning process, giving a result of functionality and significance to the target language. Hence, the collateral impact that collaborative learning leads to, aims to contribute to a better global understanding as well as a means of self and other cultural awareness through intercultural communication. While communicating through the target language by online collaboration among students in platforms of long-distance communication, language is used as a tool of interaction to broaden students’ perspectives reaching a substantial improvement with the help of their differences. This process should consider the application of the target language in the inquiry of sociocultural information, expecting the learners to integrate communicative skills to handle cultural differentiation at the same time they apply the knowledge of their target language in a real scenario of communication, despite being through virtual resources.
Keywords: Collaborative learning, English as a Foreign language, intercultural communication, intercultural communicative competences, virtual partnership.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 673369 Electrical Properties of n-CdO/p-Si Heterojunction Diode Fabricated by Sol Gel
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n-CdO/p-Si heterojunction diode was fabricated using sol-gel spin coating technique which is a low cost and easily scalable method for preparing of semiconductor films. The structural and morphological properties of CdO film were investigated. The X-ray diffraction (XRD) spectra indicated that the film was of polycrystalline nature. The scanning electron microscopy (SEM) images indicate that the surface morphology CdO film consists of the clusters formed with the coming together of the nanoparticles. The electrical characterization of Au/n-CdO/p–Si/Al heterojunction diode was investigated by current-voltage. The ideality factor of the diode was found to be 3.02 for room temperature. The reverse current of the diode strongly increased with illumination intensity of 100 mWcm-2 and the diode gave a maximum open circuit voltage Voc of 0.04 V and short-circuits current Isc of 9.92×10-9 A.Keywords: CdO, heterojunction semiconductor devices, ideality factor, current-voltage characteristics
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2374368 The Digital Microscopy in Organ Transplantation: Ergonomics of the Tele-Pathological Evaluation of Renal, Liver and Pancreatic Grafts
Authors: C. S. Mammas, A. Lazaris, A. S. Mamma-Graham, G. Kostopanagiotou, C. Lemonidou, J. Mantas, E. Patsouris
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Introduction: The process to build a better safety culture, methods of error analysis, and preventive measures, starts with an understanding of the effects when human factors engineering refer to remote microscopic diagnosis in surgery and specially in organ transplantation for the remote evaluation of the grafts. It has been estimated that even in well-organized transplant systems an average of 8% to 14% of the grafts (G) that arrive at the recipient hospitals may be considered as diseased, injured, damaged or improper for transplantation. Digital microscopy adds information on a microscopic level about the grafts in Organ Transplant (OT), and may lead to a change in their management. Such a method will reduce the possibility that a diseased G, will arrive at the recipient hospital for implantation. Aim: Ergonomics of Digital Microscopy (DM) based on virtual slides, on Telemedicine Systems (TS) for Tele-Pathological (TPE) evaluation of the grafts (G) in organ transplantation (OT). Material and Methods: By experimental simulation, the ergonomics of DM for microscopic TPE of Renal Graft (RG), Liver Graft (LG) and Pancreatic Graft (PG) tissues is analyzed. In fact, this corresponded to the ergonomics of digital microscopy for TPE in OT by applying Virtual Slide (VS) system for graft tissue image capture, for remote diagnoses of possible microscopic inflammatory and/or neoplastic lesions. Experimentation included: a. Development of an OTE-TS similar Experimental Telemedicine System (Exp.-TS), b. Simulation of the integration of TS with the VS based microscopic TPE of RG, LG and PG applying DM. Simulation of the DM based TPE was performed by 2 specialists on a total of 238 human Renal Graft (RG), 172 Liver Graft (LG) and 108 Pancreatic Graft (PG) tissues digital microscopic images for inflammatory and neoplastic lesions on four electronic spaces of the four used TS. Results: Statistical analysis of specialist‘s answers about the ability to diagnose accurately the diseased RG, LG and PG tissues on the electronic space among four TS (A,B,C,D) showed that DM on TS for TPE in OT is elaborated perfectly on the ES of a Desktop, followed by the ES of the applied Exp.-TS. Tablet and Mobile-Phone ES seem significantly risky for the application of DM in OT (p<.001). Conclusion: To make the largest reduction in errors and adverse events referring to the quality of the grafts, it will take application of human factors engineering to procurement, design, audit, and aware ness-raising activities. Consequently, it will take an investment in new training, people, and other changes to management activities for DM in OT. The simulating VS based TPE with DM of RG, LG and PG tissues after retrieval; seem feasible and reliable and dependable on the size of the electronic space of the applied TS, for remote prevention of diseased grafts from being retrieved and/or sent to the recipient hospital and for post-grafting and pre-transplant planning.Keywords: Organ Transplantation, Tele-Pathology, Digital Microscopy, Virtual Slides.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1898367 Internal Node Stabilization for Voltage Sense Amplifiers in Multi-Channel Systems
Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn
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This paper discusses the undesirable charge transfer by the parasitic capacitances of the input transistors in a voltage sense amplifier. Due to its intrinsic rail-to-rail voltage transition, the input sides are inevitably disturbed. It can possible disturb the stabilities of the reference voltage levels. Moreover, it becomes serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the systems. In order to alleviate the internal node voltage transition, the internal node stabilization technique is proposed by utilizing an additional biasing circuit. It achieves 47% and 43% improvements for node stabilization and input referred disturbance, respectively.
Keywords: Voltage sense amplifier, voltage transition, node stabilization, and biasing circuits.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2782366 On-Chip Aging Sensor Circuit Based on Phase Locked Loop Circuit
Authors: Ararat Khachatryan, Davit Mirzoyan
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In sub micrometer technology, the aging phenomenon starts to have a significant impact on the reliability of integrated circuits by bringing performance degradation. For that reason, it is important to have a capability to evaluate the aging effects accurately. This paper presents an accurate aging measurement approach based on phase-locked loop (PLL) and voltage-controlled oscillator (VCO) circuit. The architecture is rejecting the circuit self-aging effect from the characteristics of PLL, which is generating the frequency without any aging phenomena affects. The aging monitor is implemented in low power 32 nm CMOS technology, and occupies a pretty small area. Aging simulation results show that the proposed aging measurement circuit improves accuracy by about 2.8% at high temperature and 19.6% at high voltage.
Keywords: Nanoscale, aging, effect, NBTI, HCI.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1423365 Modelling of Induction Motor Including Skew Effect Using MWFA for Performance Improvement
Authors: M. Harir, A. Bendiabdellah, A. Chaouch, N. Benouzza
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This paper deals with the modelling and simulation of the squirrel cage induction motor by taking into account all space harmonic components as well as the introduction of the bars skew in the calculation of the linear evolution of the magnetomotive force (MMF) between the slots extremities. The model used is based on multiple coupled circuits and the modified winding function approach (MWFA). The effect of skewing is included in the calculation of motors inductances with an axial asymmetry in the rotor. The simulation results in both time and spectral domains show the effectiveness and merits of the model and the error that may be caused if the skew of the bars are neglected.
Keywords: Modelling, MWFA, Skew effect, Squirrel cage induction motor, Spectral domain.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3295364 130 nm CMOS Mixer and VCO for 2.4 GHz Low-power Wireless Personal Area Networks
Authors: Gianluca Cornetta, David J. Santos
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This paper describes a 2.4 GHz passive switch mixer and a 5/2.5 GHz voltage-controlled negative Gm oscillator (VCO) with an inversion-mode MOS varactor. Both circuits are implemented using a 1P8M 0.13 μm process. The switch mixer has an input referred 1 dB compression point of -3.89 dBm and a conversion gain of -0.96 dB when the local oscillator power is +2.5 dBm. The VCO consumes only 1.75 mW, while drawing 1.45 mA from a 1.2 V supply voltage. In order to reduce the passives size, the VCO natural oscillation frequency is 5 GHz. A clocked CMOS divideby- two circuit is used for frequency division and quadrature phase generation. The VCO has a -109 dBc/Hz phase noise at 1 MHz frequency offset and a 2.35-2.5 GHz tuning range (after the frequency division), thus complying with ZigBee requirements.Keywords: Switch Mixers, Varactors, IEEE 802.15.4 (ZigBee), Direct Conversion Receiver, Wireless Sensor Networks.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2208363 Increasing Directional Intensity of Output Light Beam from Photonic Crystal Slab Outlet Including Micro Cavity Resonators
Authors: A. Mobini, K. Saghafi, V. Ahmadi
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in this paper we modified a simple two-dimensional photonic crystal waveguide by creating micro cavity resonators in order to increase the output light emission which can be applicable to photonic integrated circuits. The micro cavity resonators are constructed by removing two tubes close to the waveguide output. Coupling emitted light from waveguide with those micro cavities, results increasing intensity of waveguide output light. Inserting a tube in last row of waveguide, we have improved directionality of output light beam.Keywords: photonic crystal, waveguide, micro cavity resonators, directional emission
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1322