Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 998

Search results for: heterojunction semiconductor devices

998 Electrical Properties of n-CdO/p-Si Heterojunction Diode Fabricated by Sol Gel

Authors: S.Aksoy, Y.Caglar

Abstract:

n-CdO/p-Si heterojunction diode was fabricated using sol-gel spin coating technique which is a low cost and easily scalable method for preparing of semiconductor films. The structural and morphological properties of CdO film were investigated. The X-ray diffraction (XRD) spectra indicated that the film was of polycrystalline nature. The scanning electron microscopy (SEM) images indicate that the surface morphology CdO film consists of the clusters formed with the coming together of the nanoparticles. The electrical characterization of Au/n-CdO/p–Si/Al heterojunction diode was investigated by current-voltage. The ideality factor of the diode was found to be 3.02 for room temperature. The reverse current of the diode strongly increased with illumination intensity of 100 mWcm-2 and the diode gave a maximum open circuit voltage Voc of 0.04 V and short-circuits current Isc of 9.92×10-9 A.

Keywords: CdO, heterojunction semiconductor devices, ideality factor, current-voltage characteristics

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997 Fabrication and Characterization of Al/Methyl Orange/n-Si Heterojunction Diode

Authors: Muhammad Tahir, Muhammad H. Sayyad, Dil N. Khan, Fazal Wahab

Abstract:

Herein, the organic semiconductor methyl orange (MO), is investigated for the first time for its electronic applications. For this purpose, Al/MO/n-Si heterojunction is fabricated through economical cheap and simple “drop casting” technique. The currentvoltage (I-V) measurements of the device are made at room temperature under dark conditions. The I-V characteristics of Al/MO/n-Si junction exhibits asymmetrical and rectifying behavior that confirms the formation of diode. The diode parameters such as rectification ratio (RR), turn on voltage (Vturn on), reverse saturation current (I0), ideality factor (n), barrier height ( b f ), series resistance (Rs) and shunt resistance (Rsh) are determined from I-V curves using Schottky equations. These values of these parameters are also extracted and verified by applying Cheung’s functions. The conduction mechanisms are explained from the forward bias I-V characteristics using the power law.

Keywords: Electrical properties, Organic/inorganic heterojunction diode, Methyl Orange, Cheungs Functions

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996 Research on Modern Semiconductor Converters and the Usage of SiC Devices in the Technology Centre of Ostrava

Authors: P. Vaculík, P. Kaňovský

Abstract:

The following article presents Technology Centre of Ostrava (TCO) in the Czech Republic describing the structure and main research areas realized by the project ENET - Energy Units for Utilization of non Traditional Energy Sources. More details are presented from the research program dealing with transformation, accumulation and distribution of electric energy. Technology Centre has its own energy mix consisting of alternative sources of fuel sources that use of process gases from the storage part and also the energy from distribution network. The article will be focus on the properties and application possibilities SiC semiconductor devices for power semiconductor converter for photovoltaic systems.

Keywords: SiC, Si, Technology Centre of Ostrava, Photovoltaic Systems, DC/DC Converter, Simulation.

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995 Graphene Based Electronic Device

Authors: Ali Safari, Pejman Hosseiniun, Iman Rahbari, Mohamad Reza Kalhor

Abstract:

The semiconductor industry is placing an increased emphasis on emerging materials and devices that may provide improved performance, or provide novel functionality for devices. Recently, graphene, as a true two-dimensional carbon material, has shown fascinating applications in electronics. In this paper detailed discussions are introduced for possible applications of grapheme Transistor in RF and digital devices.

Keywords: Graphene, GFET, RF, Digital.

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994 Characterization of the Energy Band Diagram of Fabricated SnO2/CdS/CdTe Thin Film Solar Cells

Authors: Rasha A. Abdullah, Mohammed. A. Razooqi, Adwan N. H. Al-Ajili

Abstract:

A SnO2/CdS/CdTe heterojunction was fabricated by thermal evaporation technique. The fabricated cells were annealed at 573K for periods of 60, 120 and 180 minutes. The structural properties of the solar cells have been studied by using X-ray diffraction. Capacitance- voltage measurements were studied for the as-prepared and annealed cells at a frequency of 102 Hz. The capacitance- voltage measurements indicated that these cells are abrupt. The capacitance decreases with increasing annealing time. The zero bias depletion region width and the carrier concentration increased with increasing annealing time. The carrier transport mechanism for the CdS/CdTe heterojunction in dark is tunneling recombination. The ideality factor is 1.56 and the reverse bias saturation current is 9.6×10-10A. The energy band lineup for the n- CdS/p-CdTe heterojunction was investigated using current - voltage and capacitance - voltage characteristics.

Keywords: SnO2/CdS/CdTe heterojunction, XRD, C-V measurement, I-V measurement, energy band diagram.

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993 Interfacial Layer Effect on Novel p-Ni1-xO:Li/n-Si Heterojunction Solar Cells

Authors: Feng-Hao Hsu, Na-Fu Wang, Yu-Zen Tsai, Yu-Song Cheng, Cheng-Fu Yang, Mau-Phon Houng

Abstract:

This study fabricates p-type Ni1xO:Li/n-Si heterojunction solar cells (P+/n HJSCs) by using radio frequency (RF) magnetron sputtering and investigates the effect of substrate temperature on photovoltaic cell properties. Grazing incidence x-ray diffraction, four point probe, and ultraviolet-visible-near infrared discover the optoelectrical properties of p-Ni1-xO thin films. The results show that p-Ni1-xO thin films deposited at 300 oC has the highest grain size (22.4 nm), average visible transmittance (~42%), and electrical resistivity (2.7 Ωcm). However, the conversion efficiency of cell is shown only 2.33% which is lower than the cell (3.39%) fabricated at room temperature. This result can be mainly attributed to interfacial layer thickness (SiOx) reduces from 2.35 nm to 1.70 nm, as verified by high-resolution transmission electron microscopy.

Keywords: Heterojunction, nickel oxide, solar cells, sputtering.

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992 Investigation of Temperature-Dependent Electrical Properties of Tc-CuPc: PCBM Bulk Heterojunction (BHJ) under Dark Conditions

Authors: Shahid M. Khan, Muhammad H. Sayyad

Abstract:

An organic bulk heterojunction (BHJ) was fabricated using a blended film containing Copper (II) tetrakis(4-acumylphenoxy) phthalocyanine (Tc-CuPc) along with [6,6]-Phenyl C61 butyric acid methyl ester (PCBM). Weight ratio between Tc-CuPc and PCBM was 1:1. The electrical properties of Tc-CuPc: PCBM BHJ were examined. Rectifying nature of the BHJ was displayed by current-voltage (I-V) curves, recorded in dark and at various temperatures. At low voltages, conduction was ohmic succeeded by space-charge limiting current (SCLC) conduction at higher voltages in which exponential trap distribution was dominant. Series resistance, shunt resistance, ideality factor, effective barrier height and mobility at room temperature were found to be 526 4, 482 k4, 3.7, 0.17 eV and 2×10-7 cm2V-1s-1 respectively. Temperature effect towards different BHJ parameters was observed under dark condition.

Keywords: Bulk heterojunction, PCBM, phthalocyanine, spin coating.

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991 A Modern Review of the Spintronic Technology: Fundamentals, Materials, Devices, Circuits, Challenges, and Current Research Trends

Authors: Muhibul Haque Bhuyan

Abstract:

Spintronic, also termed spin electronics or spin transport electronics, is a kind of new technology, which exploits the two fundamental degrees of freedom- spin-state and charge-state of electrons to enhance the operational speed for the data storage and transfer efficiency of the device. Thus, it seems an encouraging technology to combat most of the prevailing complications in orthodox electron-based devices. This novel technology possesses the capacity to mix the semiconductor microelectronics and magnetic devices’ functionalities into one integrated circuit. Traditional semiconductor microelectronic devices use only the electronic charge to process the information based on binary numbers, 0 and 1. Due to the incessant shrinking of the transistor size, we are reaching the final limit of 1 nm or so. At this stage, the fabrication and other device operational processes will become challenging as the quantum effect comes into play. In this situation, we should find an alternative future technology, and spintronic may be such technology to transfer and store information. This review article provides a detailed discussion of the spintronic technology: fundamentals, materials, devices, circuits, challenges, and current research trends. At first, the fundamentals of spintronics technology are discussed. Then types, properties, and other issues of the spintronic materials are presented. After that, fabrication and working principles, as well as application areas and advantages/disadvantages of spintronic devices and circuits, are explained. Finally, the current challenges, current research areas, and prospects of spintronic technology are highlighted. This is a new paradigm of electronic cum magnetic devices built on the charge and spin of the electrons. Modern engineering and technological advances in search of new materials for this technology give us hope that this would be a very optimistic technology in the upcoming days.

Keywords: Spintronic technology, spin, charge, magnetic devices, spintronic devices, spintronic materials.

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990 The Experience with SiC MOSFET and Buck Converter Snubber Design

Authors: P. Vaculik

Abstract:

The newest semiconductor devices on the market are MOSFET transistors based on the silicon carbide – SiC. This material has exclusive features thanks to which it becomes a better switch than Si – silicon semiconductor switch. There are some special features that need to be understood to enable the device’s use to its full potential. The advantages and differences of SiC MOSFETs in comparison with Si IGBT transistors have been described in first part of this article. Second part describes driver for SiC MOSFET transistor and last part of article represents SiC MOSFET in the application of buck converter (step-down) and design of simple RC snubber. 

Keywords: SiC, Si, MOSFET, IGBT, SBD, RC snubber.

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989 Modeling Reflection and Transmission of Elastodiffussive Wave Sata Semiconductor Interface

Authors: A. A. Sharma, B. J. N. Sharma

Abstract:

This paper deals with the study of reflection and transmission characteristics of acoustic waves at the interface of a semiconductor half-space and elastic solid. The amplitude ratios (reflection and transmission coefficients) of reflected and transmitted waves to that of incident wave varying with the incident angles have been examined for the case of quasi-longitudinal wave. The special cases of normal and grazing incidence have also been derived with the help of Gauss elimination method. The mathematical model consisting of governing partial differential equations of motion and charge carriers’ diffusion of n-type semiconductors and elastic solid has been solved both analytically and numerically in the study. The numerical computations of reflection and transmission coefficients has been carried out by using MATLAB programming software for silicon (Si) semiconductor and copper elastic solid. The computer simulated results have been plotted graphically for Si semiconductors. The study may be useful in semiconductors, geology, and seismology in addition to surface acoustic wave (SAW) devices.

Keywords: Quasilongitudinal, reflection and transmission, semiconductors, acoustics.

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988 Comparison between the Efficiency of Heterojunction Thin Film InGaP\GaAs\Ge and InGaP\GaAs Solar Cell

Authors: F. Djaafar, B. Hadri, G. Bachir

Abstract:

This paper presents the design parameters for a thin film 3J InGaP/GaAs/Ge solar cell with a simulated maximum efficiency of 32.11% using Tcad Silvaco. Design parameters include the doping concentration, molar fraction, layers’ thickness and tunnel junction characteristics. An initial dual junction InGaP/GaAs model of a previous published heterojunction cell was simulated in Tcad Silvaco to accurately predict solar cell performance. To improve the solar cell’s performance, we have fixed meshing, material properties, models and numerical methods. However, thickness and layer doping concentration were taken as variables. We, first simulate the InGaP\GaAs dual junction cell by changing the doping concentrations and thicknesses which showed an increase in efficiency. Next, a triple junction InGaP/GaAs/Ge cell was modeled by adding a Ge layer to the previous dual junction InGaP/GaAs model with an InGaP /GaAs tunnel junction.

Keywords: Heterojunction, modeling, simulation, thin film, Tcad Silvaco.

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987 Electrotechnology for Silicon Refining: Plasma Generator and Arc Furnace: Installations and Theoretical Base

Authors: Ashot Navasardian, Mariam Vardanian, Vladik Vardanian

Abstract:

The photovoltaic and the semiconductor industries are in growth and it is necessary to supply a large amount of silicon to maintain this growth. Since silicon is still the best material for the manufacturing of solar cells and semiconductor components so the pure silicon like solar grade and semiconductor grade materials are demanded. There are two main routes for silicon production: metallurgical and chemical. In this article, we reviewed the electrotecnological installations and systems for semiconductor manufacturing. The main task is to design the installation which can produce SOG Silicon from river sand by one work unit.

Keywords: Metallurgical grade silicon, solar grade silicon, impurity, refining, plasma.

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986 Effects of Double Delta Doping on Millimeter and Sub-millimeter Wave Response of Two-Dimensional Hot Electrons in GaAs Nanostructures

Authors: N. Basanta Singh, Sanjoy Deb, G. P Mishra, Subir Kumar Sarkar

Abstract:

Carrier mobility has become the most important characteristic of high speed low dimensional devices. Due to development of very fast switching semiconductor devices, speed of computer and communication equipment has been increasing day by day and will continue to do so in future. As the response of any device depends on the carrier motion within the devices, extensive studies of carrier mobility in the devices has been established essential for the growth in the field of low dimensional devices. Small-signal ac transport of degenerate two-dimensional hot electrons in GaAs quantum wells is studied here incorporating deformation potential acoustic, polar optic and ionized impurity scattering in the framework of heated drifted Fermi-Dirac carrier distribution. Delta doping is considered in the calculations to investigate the effects of double delta doping on millimeter and submillimeter wave response of two dimensional hot electrons in GaAs nanostructures. The inclusion of delta doping is found to enhance considerably the two dimensional electron density which in turn improves the carrier mobility (both ac and dc) values in the GaAs quantum wells thereby providing scope of getting higher speed devices in future.

Keywords: Carrier mobility, Delta doping, Hot carriers, Quantum wells.

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985 ZnS and Graphene Quantum Dots Nanocomposite as Potential Electron Acceptor for Photovoltaics

Authors: S. M. Giripunje, Shikha Jindal

Abstract:

Zinc sulphide (ZnS) quantum dots (QDs) were synthesized successfully via simple sonochemical method. X-ray diffraction (XRD), scanning electron microscopy (SEM) and high resolution transmission electron microscopy (HRTEM) analysis revealed the average size of QDs of the order of 3.7 nm. The band gap of the QDs was tuned to 5.2 eV by optimizing the synthesis parameters. UV-Vis absorption spectra of ZnS QD confirm the quantum confinement effect. Fourier transform infrared (FTIR) analysis confirmed the formation of single phase ZnS QDs. To fabricate the diode, blend of ZnS QDs and P3HT was prepared and the heterojunction of PEDOT:PSS and the blend was formed by spin coating on indium tin oxide (ITO) coated glass substrate. The diode behaviour of the heterojunction was analysed, wherein the ideality factor was found to be 2.53 with turn on voltage 0.75 V and the barrier height was found to be 1.429 eV. ZnS-Graphene QDs nanocomposite was characterised for the surface morphological study. It was found that the synthesized ZnS QDs appear as quasi spherical particles on the graphene sheets. The average particle size of ZnS-graphene nanocomposite QDs was found to be 8.4 nm. From voltage-current characteristics of ZnS-graphene nanocomposites, it is observed that the conductivity of the composite increases by 104 times the conductivity of ZnS QDs. Thus the addition of graphene QDs in ZnS QDs enhances the mobility of the charge carriers in the composite material. Thus, the graphene QDs, with high specific area for a large interface, high mobility and tunable band gap, show a great potential as an electron-acceptors in photovoltaic devices.

Keywords: Graphene, mobility, nanocomposites, photovoltaics, quantum dots, zinc sulphide.

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984 Synchronization of Semiconductor Laser Networks

Authors: R. M. López-Gutiérrez, L. Cardoza-Avendaño, H. Cervantes-De Ávila, J. A. Michel-Macarty, C. Cruz-Hernández, A. Arellano-Delgado, R. Carmona-Rodríguez

Abstract:

In this paper, synchronization of multiple chaotic semiconductor lasers is achieved by appealing to complex system theory. In particular, we consider dynamical networks composed by semiconductor laser, as interconnected nodes, where the interaction in the networks are defined by coupling the first state of each node. An interest case is synchronized with master-slave configuration in star topology. Nodes of these networks are modeled for the laser and simulate by Matlab. These results are applicable to private communication.

Keywords: Synchronization, chaotic laser, network.

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983 Yield Prediction Using Support Vectors Based Under-Sampling in Semiconductor Process

Authors: Sae-Rom Pak, Seung Hwan Park, Jeong Ho Cho, Daewoong An, Cheong-Sool Park, Jun Seok Kim, Jun-Geol Baek

Abstract:

It is important to predict yield in semiconductor test process in order to increase yield. In this study, yield prediction means finding out defective die, wafer or lot effectively. Semiconductor test process consists of some test steps and each test includes various test items. In other world, test data has a big and complicated characteristic. It also is disproportionably distributed as the number of data belonging to FAIL class is extremely low. For yield prediction, general data mining techniques have a limitation without any data preprocessing due to eigen properties of test data. Therefore, this study proposes an under-sampling method using support vector machine (SVM) to eliminate an imbalanced characteristic. For evaluating a performance, randomly under-sampling method is compared with the proposed method using actual semiconductor test data. As a result, sampling method using SVM is effective in generating robust model for yield prediction.

Keywords: Yield Prediction, Semiconductor Test Process, Support Vector Machine, Under Sampling

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982 Average Current Estimation Technique for Reliability Analysis of Multiple Semiconductor Interconnects

Authors: Ki-Young Kim, Jae-Ho Lim, Deok-Min Kim, Seok-Yoon Kim

Abstract:

Average current analysis checking the impact of current flow is very important to guarantee the reliability of semiconductor systems. As semiconductor process technologies improve, the coupling capacitance often become bigger than self capacitances. In this paper, we propose an analytic technique for analyzing average current on interconnects in multi-conductor structures. The proposed technique has shown to yield the acceptable errors compared to HSPICE results while providing computational efficiency.

Keywords: current moment, interconnect modeling, reliability analysis, worst-case switching

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981 Identifying Key Success Factor For Supply Chain Management System in the Semiconductor Industry - A Focus Group Approach

Authors: T. P. Lu, B. N. Hwang, T. Z. Liou, Y. L. Lin

Abstract:

Developing a supply chain management (SCM) system is costly, but important. However, because of its complicated nature, not many of such projects are considered successful. Few research publications directly relate to key success factors (KSFs) for implementing a SCM system. Motivated by the above, this research proposes a hierarchy of KSFs for SCM system implementation in the semiconductor industry by using a two-step approach. First, the literature review indicates the initial hierarchy. The second step includes a focus group approach to finalize the proposed KSF hierarchy by extracting valuable experiences from executives and managers that actively participated in a project, which successfully establish a seamless SCM integration between the world's largest semiconductor foundry manufacturing company and the world's largest assembly and testing company. Future project executives may refer the resulting KSF hierarchy as a checklist for SCM system implementation in semiconductor or related industries.

Keywords: Focus group, key success factors, supply chain management, semiconductor industry.

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980 Determination of Optical Constants of Semiconductor Thin Films by Ellipsometry

Authors: Aïssa Manallah, Mohamed Bouafia

Abstract:

Ellipsometry is an optical method based on the study of the behavior of polarized light. The light reflected on a surface induces a change in the polarization state which depends on the characteristics of the material (complex refractive index and thickness of the different layers constituting the device). The purpose of this work is to determine the optical properties of semiconductor thin films by ellipsometry. This paper describes the experimental aspects concerning the semiconductor samples, the SE400 ellipsometer principle, and the results obtained by direct measurements of ellipsometric parameters and modelling using appropriate software.

Keywords: Ellipsometry, optical constants, semiconductors, thin films.

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979 Effective Scheduling of Semiconductor Manufacturing using Simulation

Authors: Ingy A. El-Khouly, Khaled S. El-Kilany, Aziz E. El-Sayed

Abstract:

The process of wafer fabrication is arguably the most technologically complex and capital intensive stage in semiconductor manufacturing. This large-scale discrete-event process is highly reentrant, and involves hundreds of machines, restrictions, and processing steps. Therefore, production control of wafer fabrication facilities (fab), specifically scheduling, is one of the most challenging problems that this industry faces. Dispatching rules have been extensively applied to the scheduling problems in semiconductor manufacturing. Moreover, lot release policies are commonly used in this manufacturing setting to further improve the performance of such systems and reduce its inherent variability. In this work, simulation is used in the scheduling of re-entrant flow shop manufacturing systems with an application in semiconductor wafer fabrication; where, a simulation model has been developed for the Intel Five-Machine Six Step Mini-Fab using the ExtendTM simulation environment. The Mini-Fab has been selected as it captures the challenges involved in scheduling the highly re-entrant semiconductor manufacturing lines. A number of scenarios have been developed and have been used to evaluate the effect of different dispatching rules and lot release policies on the selected performance measures. Results of simulation showed that the performance of the Mini-Fab can be drastically improved using a combination of dispatching rules and lot release policy.

Keywords: Dispatching rules, lot release policy, re-entrant flowshop, semiconductor manufacturing.

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978 Characterization of Three Photodetector Types for Computed Tomography Dosimetry

Authors: C. M. M. Paschoal, D. do N. Souza, L. A. P. Santos

Abstract:

In this study three commercial semiconductor devices were characterized in the laboratory for computed tomography dosimetry: one photodiode and two phototransistors. It was evaluated four responses to the irradiation: dose linearity, energy dependence, angular dependence and loss of sensitivity after X ray exposure. The results showed that the three devices have proportional response with the air kerma; the energy dependence displayed for each device suggests that some calibration factors would be applied for each one; the angular dependence showed a similar pattern among the three electronic components. In respect to the fourth parameter analyzed, one phototransistor has the highest sensitivity however it also showed the greatest loss of sensitivity with the accumulated dose. The photodiode was the device with the smaller sensitivity to radiation, on the other hand, the loss of sensitivity after irradiation is negligible. Since high accuracy is a desired feature for a dosimeter, the photodiode can be the most suitable of the three devices for dosimetry in tomography. The phototransistors can also be used for CT dosimetry, however it would be necessary a correction factor due to loss of sensitivity with accumulated dose.

Keywords: Dosimetry, computed tomography, phototransistor, photodiode

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977 Loss Analysis of Half Bridge DC-DC Converters in High-Current and Low-Voltage Applications

Authors: A. Faruk Bakan, İsmail Aksoy, Nihan Altintaş

Abstract:

In this paper, half bridge DC-DC converters with transformer isolation presented in the literature are analyzed for highcurrent and low-voltage applications under the same operation conditions, and compared in terms of losses and efficiency. The conventional and improved half-bridge DC-DC converters are simulated, and current and voltage waveforms are obtained for input voltage Vdc=500V, output current IO=450A, output voltage VO=38V and switching frequency fS=20kHz. IGBTs are used as power semiconductor switches. The power losses of the semiconductor devices are calculated from current and voltage waveforms. From simulation results, it is seen that the capacitor switched half bridge converter has the best efficiency value, and can be preferred at high power and high frequency applications.

Keywords: Isolated half bridge DC-DC converter, high-current low-voltage applications, soft switching, high efficiency.

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976 A Spatial Point Pattern Analysis to Recognize Fail Bit Patterns in Semiconductor Manufacturing

Authors: Youngji Yoo, Seung Hwan Park, Daewoong An, Sung-Shick Kim, Jun-Geol Baek

Abstract:

The yield management system is very important to produce high-quality semiconductor chips in the semiconductor manufacturing process. In order to improve quality of semiconductors, various tests are conducted in the post fabrication (FAB) process. During the test process, large amount of data are collected and the data includes a lot of information about defect. In general, the defect on the wafer is the main causes of yield loss. Therefore, analyzing the defect data is necessary to improve performance of yield prediction. The wafer bin map (WBM) is one of the data collected in the test process and includes defect information such as the fail bit patterns. The fail bit has characteristics of spatial point patterns. Therefore, this paper proposes the feature extraction method using the spatial point pattern analysis. Actual data obtained from the semiconductor process is used for experiments and the experimental result shows that the proposed method is more accurately recognize the fail bit patterns.

Keywords: Semiconductor, wafer bin map (WBM), feature extraction, spatial point patterns, contour map.

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975 An Exploration on Competency-Based Curricula in Integrated Circuit Design

Authors: Chih Chin Yang, Chung Shan Sun

Abstract:

In this paper the relationships between professional competences and school curriculain IC design industry are explored. The semi-structured questionnaire survey and focus group interview is the research method. Study participants are graduates of microelectronics engineering professional departments who are currently employed in the IC industry. The IC industries are defined as the electronic component manufacturing industry and optical-electronic component manufacturing industry in the semiconductor industry and optical-electronic material devices, respectively. Study participants selected from IC design industry include IC engineering and electronic & semiconductor engineering. The human training with IC design professional competence in microelectronics engineering professional departments is explored in this research. IC professional competences of human resources in the IC design industry include general intelligence and professional intelligence.

Keywords: IC design, curricula, competence, task, duty.

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974 Resistive Switching Characteristics of Resistive Random Access Memory Devices after Furnace Annealing Processes

Authors: Chi-Yan Chu, Kai-Chi Chuang, Huang-Chung Cheng

Abstract:

In this study, the RRAM devices with the TiN/Ti/HfOx/TiN structure were fabricated, then the electrical characteristics of the devices without annealing and after 400 °C and 500 °C of the furnace annealing (FA) temperature processes were compared. The RRAM devices after the FA’s 400 °C showed the lower forming, set and reset voltages than the other devices without annealing. However, the RRAM devices after the FA’s 500 °C did not show any electrical characteristics because the TiN/Ti/HfOx/TiN device was oxidized, as shown in the XPS analysis. From these results, the RRAM devices after the FA’s 400 °C showed the best electrical characteristics.

Keywords: RRAM, furnace annealing, forming, set and reset voltages, XPS.

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973 OPTIMAL Placement of FACTS Devices by Genetic Algorithm for the Increased Load Ability of a Power System

Authors: A. B.Bhattacharyya, B. S.K.Goswami

Abstract:

This paper presents Genetic Algorithm (GA) based approach for the allocation of FACTS (Flexible AC Transmission System) devices for the improvement of Power transfer capacity in an interconnected Power System. The GA based approach is applied on IEEE 30 BUS System. The system is reactively loaded starting from base to 200% of base load. FACTS devices are installed in the different locations of the power system and system performance is noticed with and without FACTS devices. First, the locations, where the FACTS devices to be placed is determined by calculating active and reactive power flows in the lines. Genetic Algorithm is then applied to find the amount of magnitudes of the FACTS devices. This approach of GA based placement of FACTS devices is tremendous beneficial both in terms of performance and economy is clearly observed from the result obtained.

Keywords: FACTS Devices, Line Power Flow, OptimalLocation of FACTS Devices, Genetic Algorithm.

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972 Study of a Fabry-Perot Resonator

Authors: F. Hadjaj, A. Belghachi, A. Halmaoui, M. Belhadj, H. Mazouz

Abstract:

A laser is essentially an optical oscillator consisting of a resonant cavity, an amplifying medium and a pumping source. In semiconductor diode lasers, the cavity is created by the boundary between the cleaved face of the semiconductor crystal and air, and has reflective properties as a result of the differing refractive indices of the two media. For a GaAs-air interface a reflectance of 0.3 is typical and therefore the length of the semiconductor junction forms the resonant cavity. To prevent light being emitted in unwanted directions from the junction, sides perpendicular to the required direction are roughened. The objective of this work is to simulate the optical resonator Fabry-Perot and explore its main characteristics, such as FSR, finesse, linewidth, transmission and so on, that describe the performance of resonator.

Keywords: Fabry-Perot Resonator, laser diode.

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971 Quasi-ballistic Transport in Submicron Hg0.8Cd0.2Te Diodes: Hydrodynamic Modeling

Authors: M. Daoudi, A. Belghachi, L. Varani

Abstract:

In this paper, we analyze the problem of quasiballistic electron transport in ultra small of mercury -cadmiumtelluride (Hg0.8Cd0.2Te -MCT) n+-n- n+ devices from hydrodynamic point view. From our study, we note that, when the size of the active layer is low than 0.1μm and for low bias application( ( ≥ 9mV), the quasi-ballistic transport has an important effect.

Keywords: Hg0.8Cd0.2Te semiconductor, Hydrodynamicmode, Quasi-ballistic transport, Submicron diode

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970 Pattern Recognition Using Feature Based Die-Map Clusteringin the Semiconductor Manufacturing Process

Authors: Seung Hwan Park, Cheng-Sool Park, Jun Seok Kim, Youngji Yoo, Daewoong An, Jun-Geol Baek

Abstract:

Depending on the big data analysis becomes important, yield prediction using data from the semiconductor process is essential. In general, yield prediction and analysis of the causes of the failure are closely related. The purpose of this study is to analyze pattern affects the final test results using a die map based clustering. Many researches have been conducted using die data from the semiconductor test process. However, analysis has limitation as the test data is less directly related to the final test results. Therefore, this study proposes a framework for analysis through clustering using more detailed data than existing die data. This study consists of three phases. In the first phase, die map is created through fail bit data in each sub-area of die. In the second phase, clustering using map data is performed. And the third stage is to find patterns that affect final test result. Finally, the proposed three steps are applied to actual industrial data and experimental results showed the potential field application.

Keywords: Die-Map Clustering, Feature Extraction, Pattern Recognition, Semiconductor Manufacturing Process.

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969 K-best Night Vision Devices by Multi-Criteria Mixed-Integer Optimization Modeling

Authors: Daniela I. Borissova, Ivan C. Mustakerov

Abstract:

The paper describes an approach for defining of k-best night vision devices based on multi-criteria mixed-integer optimization modeling. The parameters of night vision devices are considered as criteria that have to be optimized. Using different user preferences for the relative importance between parameters different choice of k-best devices can be defined. An ideal device with all of its parameters at their optimum is used to determine how far the particular device from the ideal one is. A procedure for evaluation of deviation between ideal solution and k-best solutions is presented. The applicability of the proposed approach is numerically illustrated using real night vision devices data. The proposed approach contributes to quality of decisions about choice of night vision devices by making the decision making process more certain, rational and efficient. 

Keywords: K-best devices, mixed-integer model, multi-criteria problem, night vision devices.

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