Search results for: rubber chip.
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 274

Search results for: rubber chip.

124 A High-Crosstalk Silicon Photonic Arrayed Waveguide Grating

Authors: Qing Fang, Lianxi Jia, Junfeng Song, Chao Li, Xianshu Luo, Mingbin Yu, Guoqiang Lo

Abstract:

In this paper, we demonstrated a 1 × 4 silicon photonic cascaded arrayed waveguide grating, which is fabricated on a SOI wafer with a 220 nm top Si layer and a 2µm buried oxide layer. The measured on-chip transmission loss of this cascaded arrayed waveguide grating is ~ 5.6 dB, including the fiber-to-waveguide coupling loss. The adjacent crosstalk is 33.2 dB. Compared to the normal single silicon photonic arrayed waveguide grating with a crosstalk of ~ 12.5 dB, the crosstalk of this device has been dramatically increased.

Keywords: Silicon photonic, arrayed waveguide grating, high-crosstalk, cascaded structure.

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123 Simulation of Large Deformations of Rubbers by the RKPM Method

Authors: M. Foroutan, H. Dalayeli, M. Sadeghian

Abstract:

In this paper processes including large deformations of a rubber with hyperelastic material behavior are simulated by the RKPM method. Due to the loss of kronecker delta properties in the mesh less shape functions, the imposition of essential boundary conditions consumes significant CPU time in mesh free computations. In this work transformation method is used for imposition of essential boundary conditions. A RKPM material shape function is used in this analysis. The support of the material shape functions covers the same set of particles during material deformation and hence the transformation matrix is formed only once at the initial stages. A computer program in MATLAB is developed for simulations.

Keywords: RKPM, large deformations, transformation, essentialboundary conditions.

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122 Comparative Study of Eva and Waste Polymer Modified Bitumen

Authors: Mohammed Sadeque, K. A. Patil

Abstract:

Polymer-modified bitumen is used to combat different pavement distresses and to increase the life span of pavement. Unmodified bitumen cannot perform better with the range extreme minimum and maximum pavement temperatures. The polymers commonly used to modify the bitumen are ethylene vinyl acetate (EVA) styrene butadiene styrene (SBS). The aim this study to compare the performance of EVA modified bitumen with the bitumen modified by waste low density polyethylene (LDPE), polypropylene (PP) obtained from waste carry bags and waste tyre rubber (CR) to encourage the use of waste polymer whose disposal is big problem today, in place of costly virgin polymer. From the experimental study, it was found that waste polymers are also effective in improving the properties bitumen as that of virgin polymer.

Keywords: Waste plastic, LDPE, PP, Modified bitumen, EVA.

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121 Real-Time Digital Oscilloscope Implementation in 90nm CMOS Technology FPGA

Authors: Nasir Mehmood, Jens Ogniewski, Vinodh Ravinath

Abstract:

This paper describes the design of a real-time audiorange digital oscilloscope and its implementation in 90nm CMOS FPGA platform. The design consists of sample and hold circuits, A/D conversion, audio and video processing, on-chip RAM, clock generation and control logic. The design of internal blocks and modules in 90nm devices in an FPGA is elaborated. Also the key features and their implementation algorithms are presented. Finally, the timing waveforms and simulation results are put forward.

Keywords: CMOS, VLSI, Oscilloscope, Field Programmable Gate Array (FPGA), VHDL, Video Graphics Array (VGA)

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120 Adsorption of Copper by using Microwave Incinerated Rice Husk Ash (MIRHA)

Authors: N.A.Johan, S.R.M.Kutty, M. H. Isa, N.S.Muhamad, H.Hashim

Abstract:

Many non-conventional adsorbent have been studied as economic alternative to commercial activated carbon and mostly agricultural waste have been introduced such as rubber leaf powder and hazelnut shell. Microwave Incinerated Rice Husk Ash (MIRHA), produced from the rice husk is one of the low-cost materials that were used as adsorbent of heavy metal. The aim of this research was to study the feasibility of using MIRHA500 and MIRHA800 as adsorbent for the removal of Cu(II) metal ions from aqueous solutions by the batch studies. The adsorption of Cu(II) into MIRHA500 and MIRH800 favors Fruendlich isotherm and imply pseudo – kinetic second order which applied chemisorptions

Keywords: Copper (II) aqueous solution, batch study, MIRHA500, MIRHA800, Microwave Incinerated Rice Husk Ash(MIRHA)

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119 Influence of High Temperature and Humidity on Polymer Composites Used in Relining of Sewage

Authors: Parastou Kharazmi, Folke Björk

Abstract:

Some of the main causes for degradation of polymeric materials are thermal aging, hydrolysis, oxidation or chemical degradation by acids, alkalis or water. The first part of this paper provides a brief summary of advances in technology, methods and specification of composite materials for relining as a rehabilitation technique for sewage systems. The second part summarizes an investigation on frequently used composite materials for relining in Sweden, the rubber filled epoxy composite and reinforced polyester composite when they were immersed in deionized water or in dry conditions, and elevated temperatures up to 80°C in the laboratory. The tests were conducted by visual inspection, microscopy, Dynamic Mechanical Analysis (DMA), Differential Scanning Calorimetry (DSC) as well as mechanical testing, three point bending and tensile testing.

Keywords: Composite, epoxy, polyester, relining, sewage.

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118 A Low-Area Fully-Reconfigurable Hardware Design of Fast Fourier Transform System for 3GPP-LTE Standard

Authors: Xin-Yu Shih, Yue-Qu Liu, Hong-Ru Chou

Abstract:

This paper presents a low-area and fully-reconfigurable Fast Fourier Transform (FFT) hardware design for 3GPP-LTE communication standard. It can fully support 32 different FFT sizes, up to 2048 FFT points. Besides, a special processing element is developed for making reconfigurable computing characteristics possible, while first-in first-out (FIFO) scheduling scheme design technique is proposed for hardware-friendly FIFO resource arranging. In a synthesis chip realization via TSMC 40 nm CMOS technology, the hardware circuit only occupies core area of 0.2325 mm2 and dissipates 233.5 mW at maximal operating frequency of 250 MHz.

Keywords: Reconfigurable, fast Fourier transform, single-path delay feedback, 3GPP-LTE.

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117 A Rapid and Cost-Effective Approach to Manufacturing Modeling Platform for Fused Deposition Modeling

Authors: Chil-Chyuan Kuo, Chen-Hsuan Tsai

Abstract:

This study presents a cost-effective approach for rapid fabricating modeling platforms utilized in fused deposition modeling system. A small-batch production of modeling platforms about 20 pieces can be obtained economically through silicone rubber mold using vacuum casting without applying the plastic injection molding. The air venting systems is crucial for fabricating modeling platform using vacuum casting. Modeling platforms fabricated can be used for building rapid prototyping model after sandblasting. This study offers industrial value because it has both time-effectiveness and cost-effectiveness.

Keywords: Vacuum casting, fused deposition modeling, modeling platform, sandblasting, surface roughness.

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116 Speedup of Data Vortex Network Architecture

Authors: Qimin Yang

Abstract:

In this paper, 3X3 routing nodes are proposed to provide speedup and parallel processing capability in Data Vortex network architectures. The new design not only significantly improves network throughput and latency, but also eliminates the need for distributive traffic control mechanism originally embedded among nodes and the need for nodal buffering. The cost effectiveness is studied by a comparison study with the previously proposed 2- input buffered networks, and considerable performance enhancement can be achieved with similar or lower cost of hardware. Unlike previous implementation, the network leaves small probability of contention, therefore, the packet drop rate must be kept low for such implementation to be feasible and attractive, and it can be achieved with proper choice of operation conditions.

Keywords: Data Vortex, Packet Switch, Interconnection network, deflection, Network-on-chip

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115 Dimensioning of Subsynchronous Cascade for Speed Regulation of Two-Motors 6kv Conveyer Drives

Authors: M. Kasumović, A. Hodžić, M. Tešanović

Abstract:

One way for optimum loading of overdimensioning conveyers is speed (capacity) decrement, with attention for production capabilities and demands. At conveyers which drives with three phase slip-ring induction motor, technically reasonable solution for conveyer (driving motors) speed regulation is using constant torque subsynchronous cascade with static semiconductor converter and transformer for energy reversion to the power network. In the paper is described mathematical model for parameter calculation of two-motors 6 kV subsynchronous cascade. It is also demonstrated that applying of this cascade gave several good properties, foremost in electrical energy saving, also in improving of other energy indexes, and finally that results in cost reduction of complete electrical motor drive.

Keywords: Conveyer with rubber belt, electrical motor drive, sub synchronous cascade

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114 Reduction of Peak Input Currents during Charge Pump Boosting in Monolithically Integrated High-Voltage Generators

Authors: Jan Doutreloigne

Abstract:

This paper describes two methods for the reduction of the peak input current during the boosting of Dickson charge pumps. Both methods are implemented in the fully integrated Dickson charge pumps of a high-voltage display driver chip for smart-card applications. Experimental results reveal good correspondence with Spice simulations and show a reduction of the peak input current by a factor of 6 during boosting.

Keywords: Bi-stable display driver, Dickson charge pump, highvoltage generator, peak current reduction, sub-pump boosting, variable frequency boosting.

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113 Implementing Authentication Protocol for Exchanging Encrypted Messages via an Authentication Server Based on Elliptic Curve Cryptography with the ElGamal-s Algorithm

Authors: Konstantinos Chalkias, George Filiadis, George Stephanides

Abstract:

In this paper the authors propose a protocol, which uses Elliptic Curve Cryptography (ECC) based on the ElGamal-s algorithm, for sending small amounts of data via an authentication server. The innovation of this approach is that there is no need for a symmetric algorithm or a safe communication channel such as SSL. The reason that ECC has been chosen instead of RSA is that it provides a methodology for obtaining high-speed implementations of authentication protocols and encrypted mail techniques while using fewer bits for the keys. This means that ECC systems require smaller chip size and less power consumption. The proposed protocol has been implemented in Java to analyse its features and vulnerabilities in the real world.

Keywords: Elliptic Curve Cryptography, ElGamal, authentication protocol.

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112 Low Power Low Voltage Current Mode Pipelined A/D Converters

Authors: Krzysztof Wawryn, Robert Suszyński, Bogdan Strzeszewski

Abstract:

This paper presents two prototypes of low power low voltage current mode 9 bit pipelined a/d converters. The first and the second converters are configured of 1.5 bit and 2.5 bit stages, respectively. The a/d converter structures are composed of current mode building blocks and final comparator block which converts the analog current signal into digital voltage signal. All building blocks have been designed in CMOS AMS 0.35μm technology, then simulated to verify proposed concept. The performances of both converters are compared to performances of known current mode and voltage mode switched capacitance converter structures. Low power consumption and small chip area are advantages of the proposed converters.

Keywords: Pipelined converter, a/d converter, low power, lowvoltage, current mode.

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111 On-Chip Aging Sensor Circuit Based on Phase Locked Loop Circuit

Authors: Ararat Khachatryan, Davit Mirzoyan

Abstract:

In sub micrometer technology, the aging phenomenon starts to have a significant impact on the reliability of integrated circuits by bringing performance degradation. For that reason, it is important to have a capability to evaluate the aging effects accurately. This paper presents an accurate aging measurement approach based on phase-locked loop (PLL) and voltage-controlled oscillator (VCO) circuit. The architecture is rejecting the circuit self-aging effect from the characteristics of PLL, which is generating the frequency without any aging phenomena affects. The aging monitor is implemented in low power 32 nm CMOS technology, and occupies a pretty small area. Aging simulation results show that the proposed aging measurement circuit improves accuracy by about 2.8% at high temperature and 19.6% at high voltage.

Keywords: Nanoscale, aging, effect, NBTI, HCI.

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110 On the Oil Repellency of Nanotextured Aluminum Surface

Authors: G. Momen, R. Jafari, M. Farzaneh

Abstract:

Two different superhydrophobic surfaces were elaborated and their oil repellency behavior was evaluated using several liquid with different surface tension. A silicone rubber/SiO2 nanocomposite coated (A) on aluminum substrate by “spin-coating" and the sample B was an anodized aluminum surface covered by Teflon-like coating. A high static contact angle about ∼162° was measured for two prepared surfaces on which the water droplet rolloff. Scanning electron microscopy (SEM) showed the presence of micro/nanostructures for both sample A and B similar to that of lotus leaf. However the sample A presented significantly different behaviour of wettability against the low surface tension liquid. Sample A has been wetted totally by oil (dodecan) droplet while sample B showed oleophobic behaviour. Oleophobic property of Teflon like coating can be contributed to the presence of CF2 and CF3 functional group which was shown by XPS analysis.

Keywords: Oleophobic, Superhydrophobic, Aluminum surface, Nano-texture.

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109 Methodology of Realization for Supervisor and Simulator Dedicated to a Semiconductor Research and Production Factory

Authors: Hanane Ondella, Pierre Ladet, David Ferrand, Pat Sloan

Abstract:

In the micro and nano-technology industry, the «clean-rooms» dedicated to manufacturing chip, are equipped with the most sophisticated equipment-tools. There use a large number of resources in according to strict specifications for an optimum working and result. The distribution of «utilities» to the production is assured by teams who use a supervision tool. The studies show the interest to control the various parameters of production or/and distribution, in real time, through a reliable and effective supervision tool. This document looks at a large part of the functions that the supervisor must assure, with complementary functionalities to help the diagnosis and simulation that prove very useful in our case where the supervised installations are complexed and in constant evolution.

Keywords: Control-Command, evolution, non regression, performances, real time, simulation, supervision.

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108 Response Surface Based Optimization of Toughness of Hybrid Polyamide 6 Nanocomposites

Authors: E. Hajizadeh, H. Garmabi

Abstract:

Toughening of polyamide 6 (PA6)/ Nanoclay (NC) nanocomposites with styrene-ethylene/butadiene-styrene copolymer (SEBS) using maleated styrene-ethylene/butadiene-styrene copolymer (mSEBS)/ as a compatibilizer were investigated by blending them in a co-rotating twin-screw extruder. Response surface method of experimental design was used for optimizing the material and processing parameters. Effect of four factors, including SEBS, mSEBS and NC contents as material variables and order of mixing as a processing factor, on toughness of hybrid nanocomposites were studied. All the prepared samples showed ductile behavior and low temperature Izod impact toughness of some of the hybrid nanocomposites demonstrated 900% improvement compared to the PA6 matrix while the modulus showed maximum enhancement of 20% compared to the pristine PA6 resin.

Keywords: Hybrid nanocomposites, PA6, SEBS rubber, toughness.

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107 Design of EDFA Gain Controller based on Disturbance Observer Technique

Authors: Seong-Ho Song, Ki-Seob Kim, Seon-Woo Lee, Seop-Hyeong Park

Abstract:

Based on a theoretical erbium-doped fiber amplifier (EDFA) model, we have proposed an application of disturbance observer(DOB) with proportional/integral/differential(PID) controller to EDFA for minimizing gain-transient time of wavelength -division-multiplexing (WDM) multi channels in optical amplifier in channel add/drop networks. We have dramatically reduced the gain-transient time to less than 30μsec by applying DOB with PID controller to the control of amplifier gain. The proposed DOB-based gain control algorithm for EDFA was implemented as a digital control system using TI's DSP(TMS320C28346) chip and experimental results of the system verify the excellent performance of the proposed gain control methodology.

Keywords: EDFA, Disturbance observer, gain control, WDM.

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106 Silicon Nanowire for Thermoelectric Applications: Effects of Contact Resistance

Authors: Y. Li, K. Buddharaju, N. Singh, G. Q. Lo, S. J. Lee

Abstract:

Silicon nanowire (SiNW) based thermoelectric device (TED) has potential applications in areas such as chip level cooling/ energy harvesting. It is a great challenge however, to assemble an efficient device with these SiNW. The presence of parasitic in the form of interfacial electrical resistance will have a significant impact on the performance of the TED. In this work, we explore the effect of the electrical contact resistance on the performance of a TED. Numerical simulations are performed on SiNW to investigate such effects on its cooling performance. Intrinsically, SiNW individually without the unwanted parasitic effect has excellent cooling power density. However, the cooling effect is undermined with the contribution of the electrical contact resistance.

Keywords: Thermoelectric, silicon, nanowire, electrical contact resistance, parasitics.

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105 Low Power Bus Binding Based on Dynamic Bit Reordering

Authors: Jihyung Kim, Taejin Kim, Sungho Park, Jun-Dong Cho

Abstract:

In this paper, the problem of reducing switching activity in on-chip buses at the stage of high-level synthesis is considered, and a high-level low power bus binding based on dynamic bit reordering is proposed. Whereas conventional methods use a fixed bit ordering between variables within a bus, the proposed method switches a bit ordering dynamically to obtain a switching activity reduction. As a result, the proposed method finds a binding solution with a smaller value of total switching activity (TSA). Experimental result shows that the proposed method obtains a binding solution having 12.0-34.9% smaller TSA compared with the conventional methods.

Keywords: bit reordering, bus binding, low power, switching activity matrix

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104 Fast and Efficient On-Chip Interconnection Modeling for High Speed VLSI Systems

Authors: A.R. Aswatha, T. Basavaraju, S. Sandeep Kumar

Abstract:

Timing driven physical design, synthesis, and optimization tools need efficient closed-form delay models for estimating the delay associated with each net in an integrated circuit (IC) design. The total number of nets in a modern IC design has increased dramatically and exceeded millions. Therefore efficient modeling of interconnection is needed for high speed IC-s. This paper presents closed–form expressions for RC and RLC interconnection trees in current mode signaling, which can be implemented in VLSI design tool. These analytical model expressions can be used for accurate calculation of delay after the design clock tree has been laid out and the design is fully routed. Evaluation of these analytical models is several orders of magnitude faster than simulation using SPICE.

Keywords: IC design, RC/RLC Interconnection, VLSI Systems.

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103 Test Data Compression Using a Hybrid of Bitmask Dictionary and 2n Pattern Runlength Coding Methods

Authors: C. Kalamani, K. Paramasivam

Abstract:

In VLSI, testing plays an important role. Major problem in testing are test data volume and test power. The important solution to reduce test data volume and test time is test data compression. The Proposed technique combines the bit maskdictionary and 2n pattern run length-coding method and provides a substantial improvement in the compression efficiency without introducing any additional decompression penalty. This method has been implemented using Mat lab and HDL Language to reduce test data volume and memory requirements. This method is applied on various benchmark test sets and compared the results with other existing methods. The proposed technique can achieve a compression ratio up to 86%.

Keywords: Bit Mask dictionary, 2n pattern run length code, system-on-chip, SOC, test data compression.

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102 A 5-V to 30-V Current-Mode Boost Converter with Integrated Current Sensor and Power-on Protection

Authors: Jun Yu, Yat-Hei Lam, Boris Grinberg, Kevin Chai Tshun Chuan

Abstract:

This paper presents a 5-V to 30-V current-mode boost converter for powering the drive circuit of a micro-electro-mechanical sensor. The design of a transconductance amplifier and an integrated current sensing circuit are presented. In addition, essential building blocks for power-on protection such as a soft-start and clamp block and supply and clock ready block are discussed in details. The chip is fabricated in a 0.18-μm CMOS process. Measurement results show that the soft-start and clamp block can effectively limit the inrush current during startup and protect the boost converter from startup failure.

Keywords: Boost Converter, Current Sensing, Power-on protection, Step-up Converter, Soft-start.

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101 An Area-Efficient and Low-Power Digital Pulse-Width Modulation Controller for DC-DC Switching Power Converter

Authors: Jingjing Lan, Jun Zhou, Xin Liu

Abstract:

In this paper, a low-power digital controller for DC-DC power conversion was presented. The controller generates the pulse-width modulated (PWM) signal from digital inputs provided by analog-to-digital converter (ADC). An efficient and simple design scheme to develop the control unit was discussed. This method allows minimization of the consumed resources of the chip and it is based on direct digital design approach. In this application, with the proposed scheme, nearly half area and two-third of the power consumption was saved compared to the conventional schemes. This work illustrates the possibility of implementing low-power and area-efficient power management circuit using direct digital design based approach. 

Keywords: Buck converter, DC-DC power conversion, digital control, proportional-integral (PI) controller.

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100 The Design, Development, and Optimization of a Capacitive Pressure Sensor Utilizing an Existing 9 DOF Platform

Authors: Andrew Randles, Ilker Ocak, Cheam Daw Don, Navab Singh, Alex Gu

Abstract:

Nine Degrees of Freedom (9 DOF) systems are already in development in many areas. In this paper, an integrated pressure sensor is proposed that will make use of an already existing monolithic 9 DOF inertial MEMS platform. Capacitive pressure sensors can suffer from limited sensitivity for a given size of membrane. This novel pressure sensor design increases the sensitivity by over 5 times compared to a traditional array of square diaphragms while still fitting within a 2 mm x 2 mm chip and maintaining a fixed static capacitance. The improved design uses one large diaphragm supported by pillars with fixed electrodes placed above the areas of maximum deflection. The design optimization increases the sensitivity from 0.22 fF/kPa to 1.16 fF/kPa. Temperature sensitivity was also examined through simulation.

Keywords: Capacitive pressure sensor, 9 DOF, 10 DOF, sensor, capacitive, inertial measurement unit, IMU, inertial navigation system, INS.

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99 A Molding Surface Auto-Inspection System

Authors: Ssu-Han Chen, Der-Baau Perng

Abstract:

Molding process in IC manufacturing secures chips against the harms done by hot, moisture or other external forces. While a chip was being molded,defects like cracks, dilapidation, or voids may be embedding on the molding surface. The molding surfaces the study poises to treat and the ones on the market, though, differ in the surface where texture similar to defects is everywhere. Manual inspection usually passes over low-contrast cracks or voids; hence an automatic optical inspection system for molding surface is necessary. The proposed system is consisted of a CCD, a coaxial light, a back light as well as a motion control unit. Based on the property of statistical textures of the molding surface, a series of digital image processing and classification procedure is carried out. After training of the parameter associated with above algorithm, result of the experiment suggests that the accuracy rate is up to 93.75%, contributing to the inspection quality of IC molding surface.

Keywords: Molding surface, machine vision, statistical texture, discrete Fourier transformation.

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98 Two Wheels Balancing Robot with Line Following Capability

Authors: Nor Maniha Abdul Ghani, Faradila Naim, Tan Piow Yon

Abstract:

This project focuses on the development of a line follower algorithm for a Two Wheels Balancing Robot. In this project, ATMEGA32 is chosen as the brain board controller to react towards the data received from Balance Processor Chip on the balance board to monitor the changes of the environment through two infra-red distance sensor to solve the inclination angle problem. Hence, the system will immediately restore to the set point (balance position) through the implementation of internal PID algorithms at the balance board. Application of infra-red light sensors with the PID control is vital, in order to develop a smooth line follower robot. As a result of combination between line follower program and internal self balancing algorithms, we are able to develop a dynamically stabilized balancing robot with line follower function.

Keywords: infra-red sensor, PID algorithms, line followerBalancing robot

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97 Robust Design of Electroosmosis Driven Self-Circulating Micromixer for Biological Applications

Authors: Bahram Talebjedi, Emily Earl, Mina Hoorfar

Abstract:

One of the issues that arises with microscale lab-on-a-chip technology is that the laminar flow within the microchannels limits the mixing of fluids. To combat this, micromixers have been introduced as a means to try and incorporate turbulence into the flow to better aid the mixing process. This study presents an electroosmotic micromixer that balances vortex generation and degeneration with the inlet flow velocity to greatly increase the mixing efficiency. A comprehensive parametric study was performed to evaluate the role of the relevant parameters on the mixing efficiency. It was observed that the suggested micromixer is perfectly suited for biological applications due to its low pressure drop (below 10 Pa) and low shear rate. The proposed micromixer with optimized working parameters is able to attain a mixing efficiency of 95% in a span of 0.5 seconds using a frequency of 10 Hz, a voltage of 0.7 V, and an inlet velocity of 0.366 mm/s.

Keywords: Microfluidics, active mixer, pulsed AC electroosmosis flow, micromixer.

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96 Explicit Delay and Power Estimation Method for CMOS Inverter Driving on-Chip RLC Interconnect Load

Authors: Susmita Sahoo, Madhumanti Datta, Rajib Kar

Abstract:

The resistive-inductive-capacitive behavior of long interconnects which are driven by CMOS gates are presented in this paper. The analysis is based on the ¤Ç-model of a RLC load and is developed for submicron devices. Accurate and analytical expressions for the output load voltage, the propagation delay and the short circuit power dissipation have been proposed after solving a system of differential equations which accurately describe the behavior of the circuit. The effect of coupling capacitance between input and output and the short circuit current on these performance parameters are also incorporated in the proposed model. The estimated proposed delay and short circuit power dissipation are in very good agreement with the SPICE simulation with average relative error less than 6%.

Keywords: Delay, Inverter, Short Circuit Power, ¤Ç-Model, RLCInterconnect, VLSI

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95 Experimental Challenges and Solutions in Design and Operation of the Test Rig for Water Lubricated Journal Bearing

Authors: Ravindra Mallya, B. Satish Shenoy, B. Raghuvir Pai

Abstract:

The study deals with the challenges in developing a test rig to test the performance of water lubricated journal bearing. The test rig is designed to simulate the working conditions of the bearing in order to understand their performance before they are put in operation. The bearing that is studied is the commercially available water lubricated bearing which has a rubber liner bonded with a rigid metal shell. The lubricant enters the bearing axially through a pressurized inlet tank and exits to an outlet tank which is at sufficiently low pressure. The load on the bearing is applied through the dead weight system which acts both in upward and downward direction so that net load acts on the bearing. The issues in feeding the lubricant into the bearing from the inlet side and preventing the leakage of the lubricant is discussed. The application of the load on the test bearing while maintaining the bearing afloat is also discussed.

Keywords: Axial groove, hydrodynamic pressure, journal bearing, test rig, water lubrication.

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