Search results for: electrical circuit course.

Authors: Vinod Kumar Khera, R. K. Sharma, A. K. Gupta

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Power dissipation increases exponentially during test mode as compared to normal operation of the circuit. In extreme cases, test power is more than twice the power consumed during normal operation mode. Test vector generation scheme is key component in deciding the power hungriness of a circuit during testing. Test vector count and consequent leakage current are functions of test vector generation scheme. Fault based test vector count optimization has been presented in this work. It helps in reducing test vector count and the leakage current. In the presented scheme, test vectors have been reduced by extracting essential child vectors. The scheme has been tested experimentally using stuck at fault models and results ensure the reduction in test vector count.

Keywords: Low power VLSI testing, independent fault, essential faults, test vector reduction.

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Authors: Mohini Polimetla, Rajat Mahapatra

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There is need to explore emerging technologies based on carbon nanotube electronics as the MOS technology is approaching its limits. As MOS devices scale to the nano ranges, increased short channel effects and process variations considerably effect device and circuit designs. As a promising new transistor, the Carbon Nanotube Field Effect Transistor(CNTFET) avoids most of the fundamental limitations of the Traditional MOSFET devices. In this paper we present the analysis and comparision of a Carbon Nanotube FET(CNTFET) based 10(A current mirror with MOSFET for 32nm technology node. The comparision shows the superiority of the former in terms of 97% increase in output resistance,24% decrease in power dissipation and 40% decrease in minimum voltage required for constant saturation current. Furthermore the effect on performance of current mirror due to change in chirality vector of CNT has also been investigated. The circuit simulations are carried out using HSPICE model.

Keywords: Carbon Nanotube Field Effect Transistor, Chirality Vector, Current Mirror

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Authors: Kelaiaia Mounia Samira, Labar Hocine, Bounaya Kamel, Kelaiaia Samia

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The development of the power electronics has allowed increasing the precision and reliability of the electrical trainings, thanks to the adjustable inverters, as the Pulse Wide Modulation (PWM) five level inverters, which is the object of study in this article.The authors treat the relation between the law order adopted for a given system and the oscillations of the electrical and mechanical parameters of which the tolerance depends on the process with which they are integrated (paper factory, lifting of the heavy loads, etc.).Thus the best choice of the regulation indexes allows us to achieve stability and safety training without investment (management of existing equipment).

Keywords: multi level inverter, PWM, Harmonics, oscillation, control

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Authors: Guang Sun, Yong Li, Yuanyuan Zhang, Shijun Lin, Li Su, Depeng Jin, Lieguang zeng

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Network on Chip (NoC) has emerged as a promising on chip communication infrastructure. Three Dimensional Integrate Circuit (3D IC) provides small interconnection length between layers and the interconnect scalability in the third dimension, which can further improve the performance of NoC. Therefore, in this paper, a hierarchical cluster-based interconnect architecture is merged with the 3D IC. This interconnect architecture significantly reduces the number of long wires. Since this architecture only has approximately a quarter of routers in 3D mesh-based architecture, the average number of hops is smaller, which leads to lower latency and higher throughput. Moreover, smaller number of routers decreases the area overhead. Meanwhile, some dual links are inserted into the bottlenecks of communication to improve the performance of NoC. Simulation results demonstrate our theoretical analysis and show the advantages of our proposed architecture in latency, throughput and area, when compared with 3D mesh-based architecture.

Keywords: Network on Chip (NoC), interconnect architecture, performance, area, Three Dimensional Integrate Circuit (3D IC).

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Authors: Adamu Mudi, Fawole Wahab Ibrahim, Abubakar Abba Kolo

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In this paper, we present a microcontroller-based liquid level controller which identifies the various levels of a liquid, carries out certain actions and is capable of communicating with the human being and other devices through the GSM network. This project is useful in ensuring that a liquid is not wasted. It also contributes to the internet of things paradigm, which is the future of the internet. The method used in this work includes designing the circuit and simulating it. The circuit is then implemented on a solderless breadboard after which it is implemented on a strip board. A C++ computer program is developed and uploaded into the microcontroller. This program instructs the microcontroller on how to carry out its actions. In other to determine levels of the liquid, an ultrasonic wave is sent to the surface of the liquid similar to radar or the method for detecting the level of sea bed. Message is sent to the phone of the user similar to the way computers send messages to phones of GSM users. It is concluded that the routine of observing the levels of a liquid in a tank, refilling the tank when the liquid level is too low can be entirely handled by a programmable device without wastage of the liquid or bothering a human being with such tasks.

Keywords: Arduino Uno, HC-SR04 ultrasonic sensor, Internet of Things, IoT, SIM900 GSM Module.

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Authors: Balgaisha Mukanova, Tolkyn Mirgalikyzy

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Theory of interpretation of electromagnetic fields studied in the electrical prospecting with direct current is mainly developed for the case of a horizontal surface observation. However in practice we often have to work in difficult terrain surface. Conducting interpretation without the influence of topography can cause non-existent anomalies on sections. This raises the problem of studying the impact of different shapes of ground surface relief on the results of electrical prospecting's research. This research examines the numerical solutions of the direct problem of electrical prospecting for two-dimensional and three-dimensional media, taking into account the terrain. The problem is solved using the method of integral equations. The density of secondary currents on the relief surface is obtained.

Keywords: Ground surface relief, method of integral equations, numerical method.

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Authors: Aynur Aker, Hasan Kaya

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In recent years, the use of the aluminum based alloys in the industry and technology are increasing. Alloying elements in aluminum have further been improving the strength and stiffness properties that provide superior compared to other metals. In this study, investigation of physical properties (microstructure, microhardness, tensile strength, electrical conductivity and thermal properties) in the Al-12.6wt.%Si-%2wt.Ni ternary alloy were investigated. Al-Si-Ni alloy was prepared in vacuum atmosphere. The samples were directionally solidified upwards with different growth rate V (8.3−165.45 μm/s) at constant temperature gradient G (7.73 K/mm). The flake spacings (λ), microhardness (HV), ultimate tensile strength (σ), electrical resistivity (ρ) and thermal properties (H, Cp, Tm) of the samples were measured. Influence of the growth rate and spacings on microhardness, ultimate tensile strength and electrical resistivity were investigated and relationships between them were obtained. According to results, λ values decrease with increasing V, but HV, σ and ρ values increase with increasing V. Variations of electrical resistivity (ρ) of solidified samples were also measured. The enthalpy of fusion (H) and specific heat (Cp) for the alloy was also determined by differential scanning calorimeter (DSC) from heating trace during the transformation from liquid to solid. The results in this work were compared with the previous similar experimental results.

Keywords: Electrical resistivity, enthalpy, microhardness, solidification, tensile stress.

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Authors: M. Shadmand

Abstract:

The curing process of insulation system for electrical machines plays a determinative role for its durability and reliability. Polar structure of insulating resin molecules and used filler of insulation system can be taken as an occasion to leverage it to enhance overall characteristics of insulation system, mechanically and electrically. The curing process regime for insulating system plays an important role for its mechanical and electrical characteristics by arranging the polymerization of chain structure for resin. In this research, the effect of electrical field application on in-curing insulating system for Global Vacuum Pressurized Impregnation (GVPI) system for traction motor was considered by performing the dissipation factor, polarization and de-polarization current (PDC) and voltage endurance (aging) measurements on sample test objects. Outcome results depicted obvious improvement in mechanical strength of the insulation system as well as higher electrical characteristics with routing and long-time (aging) electrical tests. Coming together, polarization of insulation system during curing process would enhance the machine life time. 

Keywords: Insulation system, GVPI, PDC, aging.

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Authors: Israel Núñez-Hernández, Peter C. Breedveld, Paul B. T. Weustink, Gilberto Gonzalez-A

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This paper proposes a phasor representation of electrical networks by using bond graph methodology. A so-called phasor bond graph is built up by means of two-dimensional bonds, which represent the complex plane. Impedances or admittances are used instead of the standard bond graph elements. A procedure to obtain the steady-state values from a phasor bond graph model is presented. Besides the presentation of a phasor bond graph library in SIDOPS code, also an application example is discussed.

Keywords: Bond graphs, phasor theory, steady-state, complex power, electrical networks.

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Authors: Sheela Tiwari, R. Naresh, R. Jha

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The paper presents an investigation in to the effect of neural network predictive control of UPFC on the transient stability performance of a multimachine power system. The proposed controller consists of a neural network model of the test system. This model is used to predict the future control inputs using the damped Gauss-Newton method which employs ‘backtracking’ as the line search method for step selection. The benchmark 2 area, 4 machine system that mimics the behavior of large power systems is taken as the test system for the study and is subjected to three phase short circuit faults at different locations over a wide range of operating conditions. The simulation results clearly establish the robustness of the proposed controller to the fault location, an increase in the critical clearing time for the circuit breakers, and an improved damping of the power oscillations as compared to the conventional PI controller.

Keywords: Identification, Neural networks, Predictive control, Transient stability, UPFC.

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Authors: Ahmed Shariful Alam, Abu Hena M. Mustafa Kamal, M. Abdul Rahman, M. Nasmus Sakib Khan Shabbir, Atiqul Islam

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According to the rules of quantum mechanics there is a non-vanishing probability of for an electron to tunnel through a thin insulating barrier or a thin capacitor which is not possible according to the laws of classical physics. Tunneling of electron through a thin insulating barrier or tunnel junction is a random event and the magnitude of current flowing due to the tunneling of electron is very low. As the current flowing through a Single Electron Transistor (SET) is the result of electron tunneling through tunnel junctions of its source and drain the supply voltage requirement is also very low. As a result, the power consumption across a Single Electron Transistor is ultra-low in comparison to that of a MOSFET. In this paper simulations have been done with PSPICE for an inverter built with both SETs and MOSFETs. 35mV supply voltage was used for a SET built inverter circuit and the supply voltage used for a CMOS inverter was 3.5V.

Keywords: ITRS, enhancement type MOSFET, island, DC analysis, transient analysis, power consumption, background charge co-tunneling.

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Authors: Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert

Abstract:

Evolvable hardware (EHW) refers to a selfreconfiguration hardware design, where the configuration is under the control of an evolutionary algorithm (EA). A lot of research has been done in this area several different EA have been introduced. Every time a specific EA is chosen for solving a particular problem, all its components, such as population size, initialization, selection mechanism, mutation rate, and genetic operators, should be selected in order to achieve the best results. In the last three decade a lot of research has been carried out in order to identify the best parameters for the EA-s components for different “test-problems". However different researchers propose different solutions. In this paper the behaviour of mutation rate on (1+λ) evolution strategy (ES) for designing logic circuits, which has not been done before, has been deeply analyzed. The mutation rate for an EHW system modifies values of the logic cell inputs, the cell type (for example from AND to NOR) and the circuit output. The behaviour of the mutation has been analyzed based on the number of generations, genotype redundancy and number of logic gates used for the evolved circuits. The experimental results found provide the behaviour of the mutation rate to be used during evolution for the design and optimization of logic circuits. The researches on the best mutation rate during the last 40 years are also summarized.

Keywords: Evolvable hardware, mutation rate, evolutionarycomputation, design of logic circuit.

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Authors: Yue-Der Lin, Ya-Hsueh Chien, Yen-Ting Lin, Shih-Fan Wang, Cheng-Lun Tsai, Ching-Che Tsai

Abstract:

Capacitive electrocardiogram (ECG) measurement is an attractive approach for long-term health monitoring. However, there is little literature available on its implementation, especially for multichannel system in standard ECG leads. This paper begins from the design criteria for capacitive ECG measurement and presents a multichannel limb-lead capacitive ECG system with conductive fabric tapes pasted on a double layer PCB as the capacitive sensors. The proposed prototype system incorporates a capacitive driven-body (CDB) circuit to reduce the common-mode power-line interference (PLI). The presented prototype system has been verified to be stable by theoretic analysis and practical long-term experiments. The signal quality is competitive to that acquired by commercial ECG machines. The feasible size and distance of capacitive sensor have also been evaluated by a series of tests. From the test results, it is suggested to be greater than 60 cm2 in sensor size and be smaller than 1.5 mm in distance for capacitive ECG measurement.

Keywords: capacitive driven-body (CDB) circuit, capacitive electrocardiogram (ECG) measurement, capacitive sensor, conductive fabric tape, power-line interference (PLI).

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Authors: Nur Syarafina Binti Othman, Tsubasa Jindo, Makato Yamada, Miho Tsuyama, Hitoshi Nakano

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A novel method to produce a fast high voltage solid states switch using Insulated Gate Bipolar Transistors (IGBTs) is presented for discharge-pumped gas lasers. The IGBTs are connected in series to achieve a high voltage rating. An avalanche transistor is used as the gate driver. The fast pulse generated by the avalanche transistor quickly charges the large input capacitance of the IGBT, resulting in a switch out of a fast high-voltage pulse. The switching characteristic of fast-high voltage solid state switch has been estimated in the multi-stage series-connected IGBT with the applied voltage of several tens of kV. Electrical circuit diagram and the mythology of fast-high voltage solid state switch as well as experimental results obtained are presented.

Keywords: High voltage, IGBT, Solid states switch.

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Authors: Yu-Fu Chen, Zih-Jyun Dai, Chen-Te Chiu, Shiue-Chen Chiou, Yung-Wei Chen, Yu-Ming Lin, Kuan-Yu Chen, Hung-Wei Wu, Hsin-Ying Lee, Yan-Kuin Su, Shoou-Jinn Chang

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This paper presents a compact dual-band bandpass filter that involves using the quarter wavelength stepped impedance resonators (SIRs) for achieving simultaneously compact circuit size and good dual-band performance. The filter is designed at 2.4 / 3.5 GHz and constructed by two pairs of quarter wavelength SIRs and source-load lines. By properly tuning the impedance ratio, length ratio and radius of via hole of the SIRs, dual-passbands performance can be easily determined. To improve the passband selectivity, the use of source-load lines is to increase coupling energy between the resonators. The filter is showing simple configuration, effective design method and small circuit size. The measured results are in good agreement with the simulation results.

Keywords: Dual-band, bandpass filter, stepped impedance resonators, SIR.

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Authors: Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert

Abstract:

The evolution of logic circuits, which falls under the heading of evolvable hardware, is carried out by evolutionary algorithms. These algorithms are able to automatically configure reconfigurable devices. One of main difficulties in developing evolvable hardware with the ability to design functional electrical circuits is to choose the most favourable EA features such as fitness function, chromosome representations, population size, genetic operators and individual selection. Until now several researchers from the evolvable hardware community have used and tuned these parameters and various rules on how to select the value of a particular parameter have been proposed. However, to date, no one has presented a study regarding the size of the chromosome representation (circuit layout) to be used as a platform for the evolution in order to increase the evolvability, reduce the number of generations and optimize the digital logic circuits through reducing the number of logic gates. In this paper this topic has been thoroughly investigated and the optimal parameters for these EA features have been proposed. The evolution of logic circuits has been carried out by an extrinsic evolvable hardware system which uses (1+λ) evolution strategy as the core of the evolution.

Keywords: Evolvable hardware, genotype size, computational intelligence, design of logic circuits.

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Authors: B. R. Faleye, M. I. Titocan, M. P. Ibitola

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Investigation was carried out at Opic Estate in Isheri-Osun River Basin environment using Electrical Resistivity method to study saltwater intrusion into a fresh water aquifer system from the proximal estuarine water body. The investigation is aimed at aquifer characterisation using electrical resistivity method in order to provide the depth to which fresh water fit for both domestic and industrial consumption. The 2D Electrical Resistivity and Vertical Electrical Resistivity techniques alongside Laboratory analysis of water samples obtained from the boreholes were adopted. Three traverses were investigated using Wenner and Pole-Dipole array with multi-electrode system consisting of 84 electrodes and a spread of 581 m, 664 m and 830 m were attained on the traverses. The main lithologies represented in the study area are Sand, Clay and Clayey Sand of which Sand constitutes the aquifer in the study area. Vertical Electrical Sounding data obtained at different lateral distance on the traverses have indicated that the water in the aquifer in the subsurface is brackish. Brackish water is represented by lowelectrical resistivity value signature while fresh water is characterized by relatively high electrical resistivity and in some regionfresh water is existent at depth greater than 200 m. Results of laboratory analysis of samples showed that the pH, Salinity, Total Dissolved Solid and Conductivity indicated existence of water with poor quality, indicating that salinity, TDS and Conductivity is higher in the Northern part of the study area. The 2D electrical resistivity and Vertical Electrical Sounding methods indicate that fresh water region is at ≥200m depth. Aquifers not fit for domestic use in the study area occur downwards to about 200 m in depth. In conclusion, it is recommended that wells should be sunkbeyond 220 m for the possible procurement of portable fresh water.

Keywords: 2D electrical resistivity, aquifer, brackish water, lithologies, freshwater, opic estate.

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Authors: Divyanka Sontakke, Arpit Thakre, D. K Shinde, Sujata Parmeshwaran

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Electrospinning is the most widely utilized method to create nanofibers because of the direct setup, the capacity to mass-deliver consistent nanofibers from different polymers, and the ability to produce ultrathin fibers with controllable diameters. Smooth and much arranged ultrafine Polyacrylonitrile (PAN) nanofibers with diameters going from submicron to nanometer were delivered utilizing Electrospinning technique. PAN powder was used as a precursor to prepare the solution utilized as a part of this process. At the point when the electrostatic repulsion contradicted surface tension, a charged stream of polymer solution was shot out from the head of the spinneret and along these lines ultrathin nonwoven fibers were created. The effect of electrospinning parameter such as applied voltage, feed rate, concentration of polymer solution and tip to collector distance on the morphology of electrospun PAN nanofibers were investigated. The nanofibers were heat treated for carbonization to examine the changes in properties and composition to make for electrical application. Scanning Electron Microscopy (SEM) was performed before and after carbonization to study electrical conductivity and morphological characterization. The SEM images have shown the uniform fiber diameter and no beads formation. The average diameter of the PAN fiber observed 365nm and 280nm for flat plat and rotating drum collector respectively. The four probe strategy was utilized to inspect the electrical conductivity of the nanofibers and the electrical conductivity is significantly improved with increase in oxidation temperature exposed.

Keywords: Electrospinning, polyacrylonitrile carbon nanofibres, heat treatment, electrical conductivity.

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Authors: Ming-Ta Yang, Jyh-Cherng Gu, Chun-Wei Huang, Jin-Lung Guan

Abstract:

Time base maintenance (TBM) is conventionally applied by the power utilities to maintain circuit breakers (CBs), transformers, bus bars and cables, which may result in under maintenance or over maintenance. As information and communication technology (ICT) industry develops, the maintenance policies of many power utilities have gradually changed from TBM to condition base maintenance (CBM) to improve system operating efficiency, operation cost and power supply reliability. This paper discusses the feasibility of using intelligent electronic devices (IEDs) to construct a CB CBM management platform. CBs in power substations can be monitored using IEDs with additional logic configuration and wire connections. The CB monitoring data can be sent through intranet to a control center and be analyzed and integrated by the Elipse Power Studio software. Finally, a human-machine interface (HMI) of supervisory control and data acquisition (SCADA) system can be designed to construct a CBM management platform to provide maintenance decision information for the maintenance personnel, management personnel and CB manufacturers.

Keywords: Circuit breaker, Condition base maintenance, Intelligent electronic device, Time base maintenance, SCADA.

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Authors: Shanmuka Naga Raju

Abstract:

This paper  presents PV system without considering transformer connected to electric grid. This is considered more economic compared to present PV system. The problem that occurs when transformer is not considered appears with a leakage current near capacitor connected to ground. Bipolar Pulse Width Modulation (BPWM) technique along with filter L-C-L configuration in the circuit is modeled to shrink the leakage current in the circuit. The DC/AC inverter is modeled using H-bridge Insulated Gate Bipolar Transistor (IGBT) module which is controlled using proposed Bipolar PWM control technique. To extract maximum power, Maximum Power Point Technique (MPPT) controller is used in this model. Voltage and current regulators are used to determine the reference voltage for the inverter from active and reactive current where reactive current is set to zero. The PLL is modeled to synchronize the measurements. The model is designed with MATLAB Simulation blocks and compared with the methods available in literature survey to show its effectiveness.

Keywords: Photovoltaic, PV, pulse width modulation, PWM, perturb and observe, phase locked loop.

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Authors: Taisir Eldos, Aws Kanan, Waleed Nazih, Ahmad Khatatbih

Abstract:

Chemical Reaction Optimization (CRO) is an optimization metaheuristic inspired by the nature of chemical reactions as a natural process of transforming the substances from unstable to stable states. Starting with some unstable molecules with excessive energy, a sequence of interactions takes the set to a state of minimum energy. Researchers reported successful application of the algorithm in solving some engineering problems, like the quadratic assignment problem, with superior performance when compared with other optimization algorithms. We adapted this optimization algorithm to the Printed Circuit Board Drilling Problem (PCBDP) towards reducing the drilling time and hence improving the PCB manufacturing throughput. Although the PCBDP can be viewed as instance of the popular Traveling Salesman Problem (TSP), it has some characteristics that would require special attention to the transactions that explore the solution landscape. Experimental test results using the standard CROToolBox are not promising for practically sized problems, while it could find optimal solutions for artificial problems and small benchmarks as a proof of concept.

Keywords: Evolutionary Algorithms, Chemical Reaction Optimization, Traveling Salesman, Board Drilling.

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Authors: Hari Babu Kotte, Radhika Ambatipudi, Dr. Kent Bertilsson

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The experimental and theoretical results of a ZVS (Zero Voltage Switching) isolated flyback DC-DC converter using multilayered coreless PCB step down 2:1 transformer are presented. The performance characteristics of the transformer are shown which are useful for the parameters extraction. The measured energy efficiency of the transformer is found to be more than 94% with the sinusoidal input voltage excitation. The designed flyback converter has been tested successfully upto the output power level of 10W, with a switching frequency in the range of 2.7MHz-4.3MHz. The input voltage of the converter is varied from 25V-40V DC. Frequency modulation technique is employed by maintaining constant off time to regulate the output voltage of the converter. The energy efficiency of the isolated flyback converter circuit under ZVS condition in the MHz frequency region is found to be approximately in the range of 72-84%. This paper gives the comparative results in terms of the energy efficiency of the hard switched and soft switched flyback converter in the MHz frequency region.

Keywords: Coreless PCB step down transformer, DC-DCconverter, Flyback, Hard Switched Converter, MHz frequencyregion, Multilayered PCB transformer, Zero Voltage Switching

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Authors: B. Tayebani, N. Hosseinibalam, D. Mostofinejad

Abstract:

Interest in using bacteria in cement materials due to its positive influences has been increased. Cement materials such as mortar and concrete basically suffer from higher porosity and water absorption compared to other building materials such as steel materials. Because of the negative side-effects of certain chemical techniques, biological methods have been proposed as a desired and environmentally friendly strategy for reducing concrete porosity and diminishing water absorption. This paper presents the results of an experimental investigation carried out to evaluate the influence of Sporosarcina pasteurii bacteria on the behaviour of two types of concretes (light weight aggregate concrete and normal weight concrete). The resistance of specimens to water penetration by testing water absorption and evaluating the electrical resistance of those concretes was examined and compared. As a conclusion, 20% increase in electrical resistance and 10% reduction in water absorption of lightweight aggregate concrete (LWAC) and for normal concrete the results show 7% decrease in water absorption and almost 10% increase in electrical resistance.

Keywords: Bacteria, biological method, normal weight concrete, lightweight aggregate concrete, water absorption, electrical resistance.

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Authors: R. Thiamsri, N. Ruangkajonmathee, A. Oonsivilaiand B. Marungsri

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This paper presents the experimental results on effect of applied voltage stress frequency to the occurrence of electrical treeing in 22 kV cross linked polyethylene (XLPE) insulated cable.Hallow disk of XLPE insulating material with thickness 5 mm taken from unused high voltage cable was used as the specimen in this study. Stainless steel needle was inserted gradually into the specimen to give a tip to earth plane electrode separation of 2.5
0.2 mm at elevated temperature 105-110°C. The specimen was then annealed for 5 minute to minimize any mechanical stress build up around the needle-plane region before it was cooled down to room temperature. Each specimen were subjected to the same applied voltage stress level at 8 kV AC rms, with various frequency, 50, 100, 500, 1000 and 2000 Hz. Initiation time, propagation speed and pattern of electrical treeing were examined in order to study the effect of applied voltage stress frequency. By the experimental results, initial time of visible treeing decreases with increasing in applied voltage frequency. Also, obviously, propagation speed of electrical treeing increases with increasing in applied voltage frequency.Furthermore, two types of electrical treeing, bush-like and branch-like treeing were observed.The experimental results confirmed the effect of voltage stress frequency as well.

Keywords: Voltage stress frequency, cross-linked polyethylene, electrical treeing, treeing propagation, treeing pattern

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Authors: Santanu Santra, Utpal Roy

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Quantum-dot Cellular Automata (QCA) is one of the most substitute emerging nanotechnologies for electronic circuits, because of lower power consumption, higher speed and smaller size in comparison with CMOS technology. The basic devices, a Quantum-dot cell can be used to implement logic gates and wires. As it is the fundamental building block on nanotechnology circuits. By applying XOR gate the hardware requirements for a QCA circuit can be decrease and circuits can be simpler in terms of level, delay and cell count. This article present a modest approach for implementing novel optimized XOR gate, which can be applied to design many variants of complex QCA circuits. Proposed XOR gate is simple in structure and powerful in terms of implementing any digital circuits. In order to verify the functionality of the proposed design some complex implementation of parity generator and parity checker circuits are proposed and simulating by QCA Designer tool and compare with some most recent design. Simulation results and physical relations confirm its usefulness in implementing every digital circuit.

Keywords: Clock, CMOS technology, Logic gates, QCA Designer, Quantum-dot Cellular Automata (QCA).

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Authors: Kamran Yousefpour, Mojtaba Rostaghi-Chalaki, Jason Warden, David Wallace, Chanyeop Park

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There has been a rising trend in using impulse current generators to investigate the lightning strike protection of materials including aluminum and composites in structures such as wind turbine blade and aircraft body. The focus of this research is to present an impulse current generator built in the High Voltage Lab at Mississippi State University. The generator is capable of producing component A and D of the natural lightning discharges in accordance with the Society of Automotive Engineers (SAE) standard, which is widely used in the aerospace industry. The generator can supply lightning impulse energy up to 400 kJ with the capability of producing impulse currents with magnitudes greater than 200 kA. The electrical circuit and physical components of an improved impulse current generator are described and several lightning strike waveforms with different amplitudes is presented for comparing with the standard waveform. The results of this study contribute to the fundamental understanding the functionality of the impulse current generators and present an impulse current generator developed at the High Voltage Lab of Mississippi State University.

Keywords: impulse current generator, lightning, society of automotive engineers, capacitor

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Authors: M.R.Shabgard, R.M.Shotorbani

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FW4 is a newly developed hot die material widely used in Forging Dies manufacturing. The right selection of the machining conditions is one of the most important aspects to take into consideration in the Electrical Discharge Machining (EDM) of FW4. In this paper an attempt has been made to develop mathematical models for relating the Material Removal Rate (MRR), Tool Wear Ratio (TWR) and surface roughness (Ra) to machining parameters (current, pulse-on time and voltage). Furthermore, a study was carried out to analyze the effects of machining parameters in respect of listed technological characteristics. The results of analysis of variance (ANOVA) indicate that the proposed mathematical models, can adequately describe the performance within the limits of the factors being studied.

Keywords: Electrical Discharge Machining (EDM), linearregression technique, Response Surface Methodology (RSM)

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Authors: Chi-Yan Chu, Kai-Chi Chuang, Huang-Chung Cheng

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In this study, the RRAM devices with the TiN/Ti/HfO_x/TiN structure were fabricated, then the electrical characteristics of the devices without annealing and after 400 °C and 500 °C of the furnace annealing (FA) temperature processes were compared. The RRAM devices after the FA’s 400 °C showed the lower forming, set and reset voltages than the other devices without annealing. However, the RRAM devices after the FA’s 500 °C did not show any electrical characteristics because the TiN/Ti/HfO_x/TiN device was oxidized, as shown in the XPS analysis. From these results, the RRAM devices after the FA’s 400 °C showed the best electrical characteristics.

Keywords: RRAM, furnace annealing, forming, set and reset voltages, XPS.

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Authors: I Made Darmayuda, Zhou Jun, Krishna Mainali, Simon Ng Sheung Yan, Saisundar S, Eran Ofek

Abstract:

Personnel protection devices are cardinal in safety hazard applications. They are widely used in home, office and in industry environments to reduce the risk of lethal shock to human being and equipment safety. This paper briefly reviews various personnel protection devices also describes the basic working principle of conventional ground fault circuit interrupter (GFCI) or ground fault isolator (GFI), its disadvantages and ways to overcome the disadvantages with solid-state relay (SSR) based GFI with ultrafast response up on fault implemented in printed circuit board. This solid state GFI comprises discrete MOSFET based alternating current (AC) switches, linear optical amplifier, photovoltaic isolator and sense resistor. In conventional GFI, current transformer is employed as a sensing element to detect the difference in current flow between live and neutral conductor. If there is no fault in equipment powered through GFI, due to insulation failure of internal wires and windings of motors, both live and neutral currents will be equal in magnitude and opposite in phase.

Keywords: current transformer, electrocution, GFCI, GFI

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Authors: M. A. Abd-Allah, A. Said, Ebrahim A. Badran

Abstract:

Worldwide many electrical equipment insulation failures have been reported caused by switching operations, while those equipments had previously passed all the standard tests and complied with all quality requirements. The problem is mostly associated with high-frequency overvoltages generated during opening or closing of a switching device. The transients generated during switching operations in a Gas Insulated Substation (GIS) are associated with high frequency components in the order of few tens of MHz. The frequency spectrum of the VFTO generated in the 220/66 kV Wadi-Hoff GIS is analyzed using Fast Fourier Transform technique. The main frequency with high voltage amplitude due to the operation of disconnector (DS5) is 5 to 10 MHz, with the highest amplitude at 9 MHz. The main frequency with high voltage amplitude due to the operation of circuit breaker (CB5) is 1 to 25 MHz, with the highest amplitude at 2 MHz. Mitigating techniques damped the oscillating frequencies effectively. The using of cable terminal reduced the frequency oscillation effectively than that of OHTL terminal. The using of a shunt capacitance results in vanishing the high frequency components. Ferrite rings reduces the high frequency components effectively especially in the range 2 to 7 MHz. The using of RC and RL filters results in vanishing the high frequency components.

Keywords: GIS, VFTO, Mitigation Techniques, Frequency spectrum, FFT, EMTP/ATP.

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