Search results for: Analog voltage inverter

Authors: Thandar Aung, Tun Lin Naing

Abstract:

In this paper, the DC-link voltage control of DC-DC boost converter–inverter system is proposed. The mathematical model is developed from four different sub-circuits that depended on the switch positions. The developed differential equations are combined to develop the dynamic model. Transfer function is generated from the switched function model. Fluctuation of DC-link voltage causes connected loads malfunction. For this problem, a kind of traditional controller, the PI controller is applied to achieve constant DC-link voltage. The PI controller gains are obtained based on transfer function step response. The simulation work has been studied by using MATLAB/Simulink software and hardware prototype is implemented with a low-cost microcontroller Arduino Nano. Experimental results are collected by using ArduinoIO library package. Closed-loop DC-link voltage control system is tested with various line and load disturbances. It is found that the experimental results give equal responses with the simulation results.

Keywords: ArduinoIO library package, boost converter-inverter system, low cost microcontroller, PI controller, switched function model.

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Authors: Imane El Karaoui, Mohammed Maaroufi, Hamid Chaikhy

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Doubly Fed Induction Generator (DFIG) is one of the most reliable wind generator. Major problem in wind power generation is to generate Sinusoidal signal with very low THD on variable speed caused by inverter two levels used. This paper presents a multi-level inverter whose objective is to reduce the THD and the dimensions of the output filter. This work proposes a three-level NPC-type inverter, the results simulation are presented demonstrating the efficiency of the proposed inverter.

Keywords: DFIG, multilevel inverter, NPC inverter , THD, Induction machine.

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Authors: SreehariRao Patri, K. S. R. KrishnaPrasad

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An on chip low drop out voltage regulator that employs elegant compensation scheme is presented in this paper. The novelty in this design is that the device parasitic capacitances are exploited for compensation at different loads. The proposed LDO is designed to provide a constant voltage of 1.2V and is implemented in UMC 180 nano meter CMOS technology. The voltage regulator presented improves stability even at lighter loads and enhances line and load regulation.

Keywords: Analog, LDO, SOC.

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Authors: Zhenguo Vincent Chia, Sheung Yan Simon Ng, Minkyu Je

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This paper presents CMOS Current Mode Logic (CML) circuits for a high speed Digital to Analog Converter (DAC) using standard CMOS 65nm process. The CML circuits have the propagation delay advantage over its conventional CMOS counterparts due to smaller output voltage swing and tunable bias current. The CML circuits proposed in this paper can achieve a maximum propagation delay of only 9.3ps, which can satisfy the stringent requirement for the 5 GHz high speed DAC application. Another advantage for CML circuits is its dynamic symmetry characteristic resulting in a reduction of an additional inverter. Simulation results show that the proposed CML circuits can operate from 1.08V to 1.3V with temperature ranging from -40 to +120°C.

Keywords: Conventional, Current Mode Logic, DAC, Decoder

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Authors: Ahmed Hossam-Eldin, Ahmed Elserougi, Ahmed Massoud, Shehab Ahmed

Abstract:

The Inter feeder Power Flow Regulator (IFPFR) proposed in this paper consists of several voltage source inverters with common dc bus; each inverter is connected in series with one of different independent distribution feeders in the power system. This paper is concerned with how to transfer power between the feeders for load sharing purpose. The power controller of each inverter injects the power (for sending feeder) or absorbs the power (for receiving feeder) via injecting suitable voltage; this voltage injection is simulated by voltage drop across series virtual impedance, the impedance value is selected to achieve the concept of power exchange between the feeders without perturbing the load voltage magnitude of each feeder. In this paper a new control scheme for load sharing using IFPFR is proposed.

Keywords: IFPFR, Load sharing, Power transfer

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Authors: Pierre Kenfack

Abstract:

In this paper we present a contribution for the modelling and control of the inverter voltage of a permanent magnet linear generator with multi air-gap structure. The time domain control method is based on instant comparison of reference signals, in the form of current or voltage, with actual or measured signals. The reference current or voltage must be kept close to the actual signal with a reasonable tolerance. In this work, the time domain control method is used to control tracking signals. The performance evaluation concerns the continuation of reference signal. Simulations validate very well the tracking of reference variables (current, voltage) by measured or actual signals. All is simulated and presented under PSIM Software to show the performance and robustness of the proposed controller.

Keywords: Control, permanent magnet, linear machine, multi air-gap structure.

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Authors: K. Benamrane, T. Abdelkrim, T. Benslimane, Aeh. Benkhelifa, B. Bezza

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This paper presents a comparison between two Pulse Width Modulation (PWM) algorithms applied to a three-level Neutral Point Clamped (NPC) Voltage Source Inverter (VSI). The first algorithm applied is the triangular-sinusoidal strategy; the second is the Space Vector Pulse Width Modulation (SVPWM) strategy. In the first part, we present a topology of three-level NCP VSI. After that, we develop the two PWM strategies to control this converter. At the end the experimental results are presented.

Keywords: Multilevel inverter, Space vector pulse width modulation (SVPWM), triangular-sinusoidal strategy.

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Authors: R. Kamalakannan, N. Ravi Kumar

Abstract:

The global energy consumption is increasing persistently and need for distributed power generation through renewable energy is essential. To meet the power requirements for consumers without any voltage fluctuations and losses, modeling and design of multilevel inverter with Flexible AC Transmission System (FACTS) capability is presented. The presented inverter is provided with 13-level cascaded H-bridge topology of Insulated Gate Bipolar Transistor (IGBTs) connected along with inbuilt Distributed Static Synchronous Compensators (DSTATCOM). The DSTATCOM device provides control of power factor stability at local feeder lines and the inverter eliminates Total Harmonic Distortion (THD). The 13-level inverter utilizes 52 switches of each H-bridge is fed with single DC sources separately and the Pulse Width Modulation (PWM) technique is used for switching IGBTs. The control strategy implemented for inverter transmits active power to grid as well as it maintains power factor to be stable with achievement of steady state power transmission. Significant outcome of this project is improvement of output voltage quality with steady state power transmission with low THD. Simulation of inverter with DSTATCOM is performed using MATLAB/Simulink environment. The scaled prototype model of proposed inverter is built and its results were validated with simulated results.

Keywords: FACTS devices, distributed-Static synchronous compensators, DSTATCOM, total harmonics elimination, modular multilevel converter.

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Authors: Dipankar Nag, Choe Andrew Kunil, Kevin Chai Tshun Chuan, Minkyu Je

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This paper presents the design and implementation of a fully integrated Capacitance-to-Voltage Converter (CVC) as the analog front-end for magnetometer interface IC. The application demands very low power solution operating in the frequency of around 20 KHz. The design adapts low power architecture to create low noise electronic interface for Capacitive Micro-machined Lorentz force magnetometer sensor. Using a 0.18-μm CMOS process, simulation results of this interface IC show that the proposed CVC can provide 33 dB closed loop gain, 20 nV/√Hz input referred noise at 20 KHz, while consuming 65 μA current from 1.8-V supply. 

Keywords: Analog front end, Capacitance-to-Voltage Converter, Magnetometer, MEMS, Recycling Folded Cascode.

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Authors: Oleksandr Krykunov

Abstract:

The source voltage of high-power fuel cell shows strong load dependence at comparatively low voltage levels. In order to provide the voltage of 750V on the DC-link for feeding electrical energy into the mains via a three phase inverter a step-up converter with a large step-up ratio is required. The output voltage of this DC/DC-converter must be stabile during variations of the load current and the voltage of the fuel cell. This paper presents the methods and results of the calculation of the efficiency and the expense for the realization for the circuits of the DC/DC-converter that meet these requirements.

Keywords: DC/DC-converter, calculation, efficiency, fuel cell.

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Authors: L. Ashok Kumar, N. Sujith Kumar

Abstract:

Most of the PV systems are designed with transformer for safety purpose with galvanic isolation. However, the transformer is big, heavy and expensive. Also, it reduces the overall frequency of the conversion stage. Generally PV inverter with transformer is having efficiency around 92%–94% only. To overcome these problems, transformerless PV system is introduced. It is smaller, lighter, cheaper and higher in efficiency. However, dangerous leakage current will flow between PV array and the grid due to the stray capacitance. There are different types of configurations available for transformerless inverters like H5, H6, HERIC, oH5, and Dual paralleled buck inverter. But each configuration is suffering from its own disadvantages like high conduction losses, shoot-through issues of switches, dead-time requirements at zero crossing instants of grid voltage to avoid grid shoot-through faults and MOSFET reverse recovery issues. The main objective of the proposed transformerless inverter is to address two key issues: One key issue for a transformerless inverter is that it is necessary to achieve high efficiency compared to other existing inverter topologies. Another key issue is that the inverter configuration should not have any shoot-through issues for higher reliability.

Keywords: Leakage current, common mode (CM), photovoltaic (PV) systems, pulse width modulation (PWM).

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Authors: Ahmed Helal, Sherif Zain Elabideen, Ahmed Lotfy

Abstract:

In this paper the modeling and analysis of Space Vector Pulse Width Modulation (SVPWM) based Dynamic Voltage Restorer (DVR) using PSCAD/EMTDC software will be presented in details. The simulation includes full modeling of the SVPWM technique used to control the DVR inverter. A test power system composed of three phase voltage source, sag generator, DVR and three phase resistive load is used to demonstrate restoration capability of the DVR. The simulation results of the presented DVR proved excellent voltage sag mitigation to protect sensitive loads.

Keywords: Dynamic voltage restorer, power quality, simulationand modeling, voltage sag.

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Authors: K. Derradji Belloum, A. Moussi

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Most high-performance ac drives utilize a current controller. The controller switches a voltage source inverter (VSI) such that the motor current follows a set of reference current waveforms. Fixed-band hysteresis (FBH) current control has been widely used for the PWM inverter. We want to apply the same controller for the PWM AC chopper. The aims of the controller is to optimize the harmonic content at both input and output sides, while maintaining acceptable losses in the ac chopper and to control in wide range the fundamental output voltage. Fixed band controller has been simulated and analyzed for a single-phase AC chopper and are easily extended to three-phase systems. Simulation confirmed the advantages and the excellent performance of the modulation method applied for the AC chopper.

Keywords: AC chopper, Current controller, Distortion factor, Hysteresis, Input Power Factor, PWM.

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Authors: Xiwei Huang, Hyouk-Kyu Cha, Dongning Zhao, Bin Guo, Minkyu Je, Hao Yu

Abstract:

This paper presents the design and implementation of a fully integrated transimpedance amplifier (TIA) as the analog frontend receiver for Capacitive Micromachined Ultrasound Transducers (CMUTs) for ultrasound biomicroscope imaging application. The amplifier is designed to amplify the received signals from 17.5MHz to 52.5MHz with a center frequency of 35MHz. The TIA was fabricated in GF 0.18μm 1P6M 30V high voltage process. The measurement results show that the designed amplifier can reach a transimpedance gain of 61.08dBΩ and operating frequency from 17.5MHz to 100MHz with 1VP-P output voltage under 6V power supply.

Keywords: 3D ultrasound biomicroscope, analog front-end, transimpedance amplifier, CMUT

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Authors: Yngvar Berg, Omid Mirmotahari

Abstract:

In this paper we ultra low-voltage and high speed CMOS domino logic. For supply voltages below 500mV the delay for a ultra low-voltage NAND2 gate is aproximately 10% of a complementary CMOS inverter. Furthermore, the delay variations due to mismatch is much less than for conventional CMOS. Differential domino gates for AND/NAND and OR/NOR operation are presented.

Keywords: Low-voltage, high-speed, NAND, NOR, CMOS.

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Authors: Kavala Kiran Kumar, R. Govardhana Rao

Abstract:

Active power filter continues to be a powerful tool to control harmonics in power systems thereby enhancing the power quality. This paper presents a fuzzy tuned PID controller based shunt active filter to diminish the harmonics caused by non linear loads like thyristor bridge rectifiers and imbalanced loads. Here Fuzzy controller provides the tuning of PID, based on firing of thyristor bridge rectifiers and variations in input rms current. The shunt APF system is implemented with three phase current controlled Voltage Source Inverter (VSI) and is connected at the point of common coupling for compensating the current harmonics by injecting equal but opposite filter currents. These controllers are capable of controlling dc-side capacitor voltage and estimating reference currents. Hysteresis Current Controller (HCC) is used to generate switching signals for the voltage source inverter. Simulation studies are carried out with non linear loads like thyristor bridge rectifier along with unbalanced loads and the results proved that the APF along with fuzzy tuned PID controller work flawlessly for different firing angles of non linear load.

Keywords: Active power filters (APF), Fuzzy logic controller (FLC), Hysteresis current controller (HCC), PID, Total harmonic Distortion (THD), Voltage source inverter (VSI).

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Authors: Hanny H. Tumbelaka, Masafumi Miyatake

Abstract:

This paper proposes a three-phase four-wire currentcontrolled Voltage Source Inverter (CC-VSI) for both power quality improvement and PV energy extraction. For power quality improvement, the CC-VSI works as a grid current-controlling shunt active power filter to compensate for harmonic and reactive power of loads. Then, the PV array is coupled to the DC bus of the CC-VSI and supplies active power to the grid. The MPPT controller employs the particle swarm optimization technique. The output of the MPPT controller is a DC voltage that determines the DC-bus voltage according to PV maximum power. The PSO method is simple and effective especially for a partially shaded PV array. From computer simulation results, it proves that grid currents are sinusoidal and inphase with grid voltages, while the PV maximum active power is delivered to loads.

Keywords: Active Power Filter, MPPT, PV Energy Conversion.

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Authors: S. Chatterji, S. L. Shimi

Abstract:

As wind, solar and other clean and green energy sources gain popularity worldwide, engineers are seeking ways to make renewable energy systems more affordable and to integrate them with existing ac power grids. In the present paper an attempt has been made for integrating the PV arrays to the smart nano grid using an artificial intelligent (AI) based solar powered cascade multilevel inverter. The AI based controller switching scheme has been used for improving the power quality by reducing the Total Harmonic Distortion (THD) of the multi-level inverter output voltage.

Keywords: Artificial Intelligent (AI), Solar Powered Multi-level Inverter, Smart nano grid, Total Harmonic Distortion (THD).

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Authors: M. Tarafdar Haque, A. Taheri

Abstract:

Application of neural networks in execution of programmed pulse width modulation (PPWM) of a voltage source inverter (VSI) is studied in this paper. Using the proposed method it is possible to cancel out the desired harmonics in output of VSI in addition to control the magnitude of fundamental harmonic, contineously. By checking the non-trained values and a performance index, the most appropriate neural network is proposed. It is shown that neural networks may solve the custom difficulties of practical utilization of PPWM such as large size of memory, complex digital circuits and controlling the magnitude of output voltage in a discrete manner.

Keywords: Neural Network, Inverter, PPWM.

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Authors: M. Jagabar Sathik, K. Ramani

Abstract:

In this paper family of multilevel inverter topology with reduced number of power switches is presented. The proposed inverter can generate both even and odd level. The proposed topology is suitable for symmetric structure. The proposed symmetric inverter results in reduction of power switches, power diode and gate driver circuits and also it may further minimize the installation area and cost. To prove the superiority of proposed topology is compared with conventional topologies. The performance of this symmetric multilevel inverter has been tested by computer based simulation and prototype based experimental setup for nine-level inverter is developed and results are verified.

Keywords: Cascaded H- Bridge (CHB), Multilevel Inverter (MLI), Nearest Level Modulation (NLM), Total Harmonic Distortion (THD).

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Authors: Badr M. Alshammari, A. Rabeh, A. K. Mohamed

Abstract:

This paper presents the modeling and the control of a grid-connected photovoltaic system (PVS). Firstly, the MPPT control of the PVS and its associated DC/DC converter has been analyzed in order to extract the maximum of available power. Secondly, the control system of the grid side converter (GSC) which is a three-phase voltage source inverter (VSI) has been presented. A special attention has been paid to the control algorithms of the GSC converter during grid voltages imbalances. Especially, three different control objectives are to achieve; the mitigation of the grid imbalance adverse effects, at the point of common coupling (PCC), on the injected currents, the elimination of double frequency oscillations in active power flow, and the elimination of double frequency oscillations in reactive power flow. Simulation results of two control strategies have been performed via MATLAB software in order to demonstrate the particularities of each control strategy according to power quality standards.

Keywords: Renewable energies, photovoltaic systems, DC link, voltage source inverter, space vector SVPWM, unbalanced voltage dips, symmetrical components.

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Authors: F. Rarbi, D. Dzahini, W. Uhring

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In this paper, a dynamic and power efficient 8-bit and 100-MSPS Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) is presented. The circuit uses a non-differential capacitive Digital-to-Analog (DAC) architecture segmented by 2. The prototype is produced in a commercial 65-nm 1P7M CMOS technology with 1.2-V supply voltage. The size of the core ADC is 208.6 x 103.6 µm². The post-layout noise simulation results feature a SNR of 46.9 dB at Nyquist frequency, which means an effective number of bit (ENOB) of 7.5-b. The total power consumption of this SAR ADC is only 1.55 mW at 100-MSPS. It achieves then a figure of merit of 85.6 fJ/step.

Keywords: CMOS analog to digital converter, dynamic comparator, image sensor application, successive approximation register.

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Authors: M. Suresh Kumar, K. Ramani

Abstract:

This paper proposed the comparison made between Multi-Carrier Pulse Width Modulation, Sinusoidal Pulse Width Modulation and Selective Harmonic Elimination Pulse Width Modulation technique for minimization of Total Harmonic Distortion in Cascaded H-Bridge Multi-Level Inverter. In Multicarrier Pulse Width Modulation method by using Alternate Position of Disposition scheme for switching pulse generation to Multi-Level Inverter. Another carrier based approach; Sinusoidal Pulse Width Modulation method is also implemented to define the switching pulse generation system in the multi-level inverter. In Selective Harmonic Elimination method using Genetic Algorithm and Particle Swarm Optimization algorithm for define the required switching angles to eliminate low order harmonics from the inverter output voltage waveform and reduce the total harmonic distortion value. So, the results validate that the Selective Harmonic Elimination Pulse Width Modulation method does capably eliminate a great number of precise harmonics and minimize the Total Harmonic Distortion value in output voltage waveform in compared with Multi-Carrier Pulse Width Modulation method, Sinusoidal Pulse Width Modulation method. In this paper, comparison of simulation results shows that the Selective Harmonic Elimination method can attain optimal harmonic minimization solution better than Multi-Carrier Pulse Width Modulation method, Sinusoidal Pulse Width Modulation method.

Keywords: Multi-level inverter, Selective Harmonic Elimination Pulse Width Modulation, Multi-Carrier Pulse Width Modulation, Total Harmonic Distortion, Genetic Algorithm.

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Authors: Shiang-Hwua Yu, Han-Sheng Tseng

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This paper presents a novel sinusoidal modulation scheme that features least correlated noise and high linearity. The modulation circuit, which is composed of a quantizer, a resonator, and a comparator, is capable of eliminating correlated modulation noise while doing modulation. The proposed modulation scheme combined with the linear quadratic optimal control is applied to a single-phase voltage source inverter and validated with the experiment results. The experiments show that the inverter supplies stable 60Hz 110V AC power with a total harmonic distortion of less than 1%, under the DC input variation from 190 V to 300 V and the output power variation from 0 to 600 W.

Keywords: Pulse width modulation, feedback dithering, linear quadratic control, inverter.

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Authors: Ehsan Hassankhan, Davood A. Khaburi

Abstract:

Direct Torque Control is a control technique in AC drive systems to obtain high performance torque control. The conventional DTC drive contains a pair of hysteresis comparators. DTC drives utilizing hysteresis comparators suffer from high torque ripple and variable switching frequency. The most common solution to those problems is to use the space vector depends on the reference torque and flux. In this Paper The space vector modulation technique (SVPWM) is applied to 2 level inverter control in the proposed DTC-based induction motor drive system, thereby dramatically reducing the torque ripple. Then the controller based on space vector modulation is designed to be applied in the control of Induction Motor (IM) with a three-level Inverter. This type of Inverter has several advantages over the standard two-level VSI, such as a greater number of levels in the output voltage waveforms, Lower dV/dt, less harmonic distortion in voltage and current waveforms and lower switching frequencies. This paper proposes a general SVPWM algorithm for three-level based on standard two-level SVPWM. The proposed scheme is described clearly and simulation results are reported to demonstrate its effectiveness. The entire control scheme is implemented with Matlab/Simulink.

Keywords: Direct torque control, space vector Pulsewidthmodulation(SVPWM), neutral point clamped(NPC), two-levelinverter.

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Authors: Haridas Kuruveettil, Dongning Zhao, Cheong Jia Hao, Minkyu Je

Abstract:

We present the design of Analog front end (AFE) low noise pre-amplifier implemented in a high voltage 0.18-µm CMOS technology for  a three dimensional ultrasound  bio microscope (3D UBM) application. The fabricated chip has 4X16 pre-amplifiers implemented to interface   a 2-D array of    high frequency capacitive micro-machined ultrasound transducers (CMUT). Core AFE cell consists of a high-voltage pulser in the transmit path, and a low-noise transimpedance amplifier in the receive path. Proposed system offers a high image resolution by the use of high frequency CMUTs with associated high performance imaging electronics integrated together.  Performance requirements and the design methods of the high bandwidth transimpedance amplifier are described in the paper. A single cell of transimpedance (TIA) amplifier and the bias circuit occupies a silicon area of 250X380 µm² and the full chip occupies a total silicon area of 10x6.8 mm².

Keywords: Ultrasound, analog front end, medical imaging, beam forming, biomicroscope, transimpedance gain.

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Authors: Mojtaba Ghodsi, Hamidreza Ziaifar, Morteza Mohammadzaheri, Payam Soltani

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In this paper, the performance of a medium power (25 kW/25 kHz) hybrid inverter with a reactive transformer is investigated. To analyze the sensitivity of the inverster, the RSM technique is employed to manifest the effective factors in the inverter to minimize current passing through the Insulated Bipolar Gate Transistors (IGBTs) (current stress). It is revealed that the ratio of the axillary inductor to the effective inductance of resonant inverter (N), is the most effective parameter to minimize the current stress in this type of inverter. In practice, proper selection of N mitigates the current stress over IGBTs by five times. This reduction is very helpful to keep the IGBTs at normal temperatures.

Keywords: Analytical analysis, hybrid resonant inverter, reactive transformer, response surface method.

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Authors: A.Muthuramalingam, S.Himavathi

Abstract:

Space Vector Modulation (SVM) is an optimum Pulse Width Modulation (PWM) technique for an inverter used in a variable frequency drive applications. It is computationally rigorous and hence limits the inverter switching frequency. Increase in switching frequency can be achieved using Neural Network (NN) based SVM, implemented on application specific chips. This paper proposes a neural network based SVM technique for a Voltage Source Inverter (VSI). The network proposed is independent of switching frequency. Different architectures are investigated keeping the total number of neurons constant. The performance of the inverter is compared for various switching frequencies for different architectures of NN based SVM. From the results obtained, the network with minimum resource and appropriate word length is identified. The bit precision required for this application is identified. The network with 8-bit precision is implemented in the IC XCV 400 and the results are presented. The performance of NN based general purpose SVM with higher bit precision is discussed.

Keywords: NN based SVM, FPGA Implementation, LayerMultiplexing, NN structure and Resource Reduction, PerformanceEvaluation

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Authors: Venkata Reddy Kota

Abstract:

These days, the industrial trend is moving away from heavy and bulky passive components to power converter systems that use more and more semiconductor elements. Also, it is difficult to connect the traditional converters to the high and medium voltage. For these reasons, a new family of multilevel inverters has appeared as a solution for working with higher voltage levels. Different modulation topologies like Sinusoidal Pulse Width Modulation (SPWM), Selective Harmonic Elimination Pulse Width Modulation (SHE-PWM) are available for multilevel inverters. In this work, different hybrid modulation techniques which are combination of fundamental frequency modulation and multilevel sinusoidal-modulation are compared. The main characteristic of these modulations are reduction of switching losses with good harmonic performance and balanced power loss dissipation among the device. The proposed hybrid modulation schemes are developed and simulated in Matlab/Simulink for cascaded H-bridge inverter. The results validate the applicability of the proposed schemes for cascaded multilevel inverter.

Keywords: Hybrid PWM techniques, Cascaded Multilevel Inverters, Switching loss minimization.

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Authors: P. Varalaxmi, A. Kirubakaran

Abstract:

This paper presents a thirteen-level asymmetrical cascaded H-bridge single phase inverter. In this configuration, the desired output voltage level is achieved by connecting the DC sources in different combinations by triggering the switches. The modes of operation are explained well for positive level generations. Moreover, a comparison is made with conventional topologies of diode clamped, flying capacitors and cascaded-H-bridge and some recently proposed topologies to show the significance of the proposed topology in terms of reduced part counts. The simulation work has been carried out in MATLAB/Simulink environment. The experimental work is also carried out for lower rating to verify the performance and feasibility of the proposed topology. Further the results are presented for different loading conditions.

Keywords: Multilevel inverter, pulse width modulation, total harmonic distortion, THD.

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