Current Mode Logic Circuits for 10-bit 5GHz High Speed Digital to Analog Converter

Authors: Zhenguo Vincent Chia, Sheung Yan Simon Ng, Minkyu Je

Abstract:

This paper presents CMOS Current Mode Logic (CML) circuits for a high speed Digital to Analog Converter (DAC) using standard CMOS 65nm process. The CML circuits have the propagation delay advantage over its conventional CMOS counterparts due to smaller output voltage swing and tunable bias current. The CML circuits proposed in this paper can achieve a maximum propagation delay of only 9.3ps, which can satisfy the stringent requirement for the 5 GHz high speed DAC application. Another advantage for CML circuits is its dynamic symmetry characteristic resulting in a reduction of an additional inverter. Simulation results show that the proposed CML circuits can operate from 1.08V to 1.3V with temperature ranging from -40 to +120°C.

Keywords: Conventional, Current Mode Logic, DAC, Decoder

Digital Object Identifier (DOI): doi.org/10.5281/zenodo.1087754

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