Search results for: Floating Gate MOSFET

Authors: Y. Bentoutou

Abstract:

Memory Errors Detection and Correction aim to secure the transaction of data between the central processing unit of a satellite onboard computer and its local memory. In this paper, the application of a double-bit error detection and correction method is described and implemented in Field Programmable Gate Array (FPGA) technology. The performance of the proposed EDAC method is measured and compared with two different EDAC devices, using the same FPGA technology. Statistical analysis of single-event upset (SEU) and multiple-bit upset (MBU) activity in commercial memories onboard the first Algerian microsatellite Alsat-1 is given.

Keywords: Error Detection and Correction, On-board computer, small satellite missions.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2198

Authors: M. Mashayekhi, H. H. Ardakani, A. Omidian

Abstract:

Among various testing methodologies, Built-in Self- Test (BIST) is recognized as a low cost, effective paradigm. Also, full adders are one of the basic building blocks of most arithmetic circuits in all processing units. In this paper, an optimized testable 2- bit full adder as a test building block is proposed. Then, a BIST procedure is introduced to scale up the building block and to generate a self testable n-bit full adders. The target design can achieve 100% fault coverage using insignificant amount of hardware redundancy. Moreover, Overall test time is reduced by utilizing polymorphic gates and also by testing full adder building blocks in parallel.

Keywords: BIST, Full Adder, Polymorphic Gate

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1752

Authors: Min-ju Kwon, Chae-won Kim, Jeong-yun Seo, Hee-guk Chae, Yong-seo Koo

Abstract:

In this paper, we presented the LDO (low-dropout) regulator which enhanced the PSRR by applying the constant current source generation technique through the BGR (Band Gap Reference) to form the noise sensing circuit. The current source through the BGR has a constant current value even if the applied voltage varies. Then, the noise sensing circuit, which is composed of the current source through the BGR, operated between the error amplifier and the pass transistor gate of the LDO regulator. As a result, the LDO regulator has a PSRR of -68.2 dB at 1k Hz, -45.85 dB at 1 MHz and -45 dB at 10 MHz. the other performance of the proposed LDO was maintained at the same level of the conventional LDO regulator.

Keywords: LDO regulator, noise sensing circuit, current reference, pass transistor.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 617

Authors: Nelson K. Lujara

Abstract:

The paper presents a practical three-phase PWM inverter suitable for low voltage, low rating energy efficient systems. The work in the paper is conducted with the view to establishing the significance of the loss contribution from the PWM inverter in the determination of the complete losses of a photovoltaic (PV) arraypowered induction motor drive water pumping system. Losses investigated include; conduction and switching loss of the devices and gate drive losses. It is found that the PWM inverter operates at a reasonable variable efficiency that does not fall below 92% depending on the load. The results between the simulated and experimental results for the system with or without a maximum power tracker (MPT) compares very well, within an acceptable range of 2% margin.

Keywords: Energy, Inverter, Losses, Photovoltaic.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2831

Authors: Abdelghani Dendouga, Nour-Eddine Bouguechal, Souhil Kouda, Samir Barra

Abstract:

A behavioral model of a second order switchedcapacitor Sigma-Delta modulator is presented. The purpose of this work is the presentation of a behavioral model of a second order switched capacitor ΣΔ modulator considering (Error due to Clock Jitter, Thermal noise Amplifier Noise, Amplifier Slew-Rate, Non linearity of amplifiers, Gain error, Charge Injection, Clock Feedthrough, and Nonlinear on-resistance). A comparison between the use of MOS switches and the use transmission gate switches use is analyzed.

Keywords: Charge injection, clock feed through, Sigma Deltamodulators, Sigma Delta non-idealities, switched capacitor.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2987

Authors: Hee-Choul Kwon, Heeyong Kwon

Abstract:

Image rotation is one of main pre-processing steps for image processing or image pattern recognition. It is implemented with a rotation matrix multiplication. It requires a lot of floating point arithmetic operations and trigonometric calculations, so it takes a long time to execute. Therefore, there has been a need for a high speed image rotation algorithm without two major time-consuming operations. However, the rotated image has a drawback, i.e. distortions. We solved the problem using an augmented two-step shear transform. We compare the presented algorithm with the conventional rotation with images of various sizes. Experimental results show that the presented algorithm is superior to the conventional rotation one.

Keywords: High speed rotation operation, image rotation, transform matrix, image processing, pattern recognition.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2627

Authors: M. Jagabar Sathik, K. Ramani

Abstract:

In this paper family of multilevel inverter topology with reduced number of power switches is presented. The proposed inverter can generate both even and odd level. The proposed topology is suitable for symmetric structure. The proposed symmetric inverter results in reduction of power switches, power diode and gate driver circuits and also it may further minimize the installation area and cost. To prove the superiority of proposed topology is compared with conventional topologies. The performance of this symmetric multilevel inverter has been tested by computer based simulation and prototype based experimental setup for nine-level inverter is developed and results are verified.

Keywords: Cascaded H- Bridge (CHB), Multilevel Inverter (MLI), Nearest Level Modulation (NLM), Total Harmonic Distortion (THD).

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3127

Authors: Vasundara Patel K. S., Harsha N. Bhushan, Kiran G. Gadag, Nischal Prasad B. N., Mohmmed Haroon

Abstract:

The most widely used semiconductor memory types are the Dynamic Random Access Memory (DRAM) and Static Random Access memory (SRAM). Competition among memory manufacturers drives the need to decrease power consumption and reduce the probability of read failure. A technology that is relatively new and has not been explored is the FinFET technology. In this paper, a single cell Schmitt Trigger Based Static RAM using FinFET technology is proposed and analyzed. The accuracy of the result is validated by means of HSPICE simulations with 32nm FinFET technology and the results are then compared with 6T SRAM using the same technology.

Keywords: Schmitt trigger based SRAM, FinFET, and Static Noise Margin.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2828

Authors: Mazhar B. Tayel, Amr H. Yassin

Abstract:

A proposed small-signal model parameters for a pseudomorphic high electron mobility transistor (PHEMT) is presented. Both extrinsic and intrinsic circuit elements of a smallsignal model are determined using genetic algorithm (GA) as a stochastic global search and optimization tool. The parameters extraction of the small-signal model is performed on 200-μm gate width AlGaAs/InGaAs PHEMT. The equivalent circuit elements for a proposed 18 elements model are determined directly from the measured S- parameters. The GA is used to extract the parameters of the proposed small-signal model from 0.5 up to 18 GHz.

Keywords: PHEMT, Genetic Algorithms, small signal modeling, optimization.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2246

Authors: Ahmed M. Mansour, Ali M. El-Sawy, Ahmed T Sayed

Abstract:

Logarithms reduce products to sums and powers to products; they play an important role in signal processing, communication and information theory. They are primarily used for hardware calculations, handling multiplications, divisions, powers, and roots effectively. There are three commonly used bases for logarithms; the logarithm with base-10 is called the common logarithm, the natural logarithm with base-e and the binary logarithm with base-2. This paper demonstrates different methods of calculation for log2 showing the complexity of each and finds out the most accurate and efficient besides giving insights to their hardware design. We present a new method called Floor Shift for fast calculation of log2, and then we combine this algorithm with Taylor series to improve the accuracy of the output, we illustrate that by using two examples. We finally compare the algorithms and conclude with our remarks.

Keywords: Logarithms, log2, floor, iterative, CORDIC, Taylor series.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3794

Authors: Hai-Qing Xie, Yun Zeng, Yong-Hong Yan, Guo-Liang Zhang, Tai-Hong Wang

Abstract:

We propose photo-BJMOSFET (Bipolar Junction Metal-Oxide-Semiconductor Field Effect Transistor) fabricated on SOI film. ITO film is adopted in the device as gate electrode to reduce light absorption. I-V characteristics of photo-BJMOSFET obtained in dark (dark current) and under 570nm illumination (photo current) are studied furthermore to achieve high photo-to-dark-current contrast ratio. Two variables in the calculation were the channel length and the thickness of the film which were set equal to six different values, i.e., L=2, 4, 6, 8, 10, and 12μm and three different values, i.e., dsi =100, 200 and 300nm, respectively. The results indicate that the greatest photo-to-dark-current contrast ratio is achieved with L=10μm and dsi=200 nm at VGK=0.6V.

Keywords: Photo-to-dark-current contrast ratio, Photo-current, Dark-current, Process parameter

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1425

Authors: Jyotsna Singh, Parul Garg, Alok Nath De

Abstract:

In this paper, we present a non-blind technique of adding the watermark to the Fourier spectral components of audio signal in a way such that the modified amplitude does not exceed the maximum amplitude spread (MAS). This MAS is due to individual Discrete fourier transform (DFT) coefficients in that particular frame, which is derived from the Energy Spreading function given by Schroeder. Using this technique one can store double the information within a given frame length i.e. overriding the watermark on the host of equal length with least perceptual distortion. The watermark is uniformly floating on the DFT components of original signal. This helps in detecting any intentional manipulations done on the watermarked audio. Also, the scheme is found robust to various signal processing attacks like presence of multiple watermarks, Additive white gaussian noise (AWGN) and mp3 compression.

Keywords: Discrete Fourier Transform, Spreading Function, Watermark, Pseudo Noise Sequence, Spectral Masking Effect

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1680

Authors: Mojtaba Ghodsi, Hamidreza Ziaifar, Morteza Mohammadzaheri, Payam Soltani

Abstract:

In this paper, the performance of a medium power (25 kW/25 kHz) hybrid inverter with a reactive transformer is investigated. To analyze the sensitivity of the inverster, the RSM technique is employed to manifest the effective factors in the inverter to minimize current passing through the Insulated Bipolar Gate Transistors (IGBTs) (current stress). It is revealed that the ratio of the axillary inductor to the effective inductance of resonant inverter (N), is the most effective parameter to minimize the current stress in this type of inverter. In practice, proper selection of N mitigates the current stress over IGBTs by five times. This reduction is very helpful to keep the IGBTs at normal temperatures.

Keywords: Analytical analysis, hybrid resonant inverter, reactive transformer, response surface method.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 709

Authors: Shine U P, EMS Nair

Abstract:

Fatigue is the major threat in service of steel structure subjected to fluctuating loads. With the additional effect of corrosion and presence of weld joints the fatigue failure may become more critical in structural steel. One of the apt examples of such structural is the sailing ship. This is experiencing a constant stress due to floating and a pulsating bending load due to the waves. This paper describes an attempt to verify theory of fatigue in fracture mechanics approach with experimentation to determine the constants of crack growth curve. For this, specimen is prepared from the ship building steel and it is subjected to a pulsating bending load with a known defect. Fatigue crack and its nature is observed in this experiment. Application of fracture mechanics approach in fatigue with a simple practical experiment is conducted and constants of crack growth equation are investigated.

Keywords: fatigue, fracture mechanics, fatigue testing machine

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3340

Authors: A. AlKalbany, H. Al hassan, M. Saeb

Abstract:

The “PYRAMIDS" Block Cipher is a symmetric encryption algorithm of a 64, 128, 256-bit length, that accepts a variable key length of 128, 192, 256 bits. The algorithm is an iterated cipher consisting of repeated applications of a simple round transformation with different operations and different sequence in each round. The algorithm was previously software implemented in Cµ code. In this paper, a hardware implementation of the algorithm, using Field Programmable Gate Arrays (FPGA), is presented. In this work, we discuss the algorithm, the implemented micro-architecture, and the simulation and implementation results. Moreover, we present a detailed comparison with other implemented standard algorithms. In addition, we include the floor plan as well as the circuit diagrams of the various micro-architecture modules.

Keywords: FPGA, VHDL, micro-architecture, encryption, cryptography, algorithm, data communication security.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1678

Authors: Jui P. Hung, Hsia C. Chang, Yuan L. Lai

Abstract:

Introduction applicability of high-speed cutting stock problem (CSP) is presented in this paper. Due to the orders continued coming in from various on-line ways for a professional cutting company, to stay competitive, such a business has to focus on sustained production at high levels. In others words, operators have to keep the machine running to stay ahead of the pack. Therefore, the continuous stock cutting problem with setup is proposed to minimize the cutting time and pattern changing time to meet the on-line given demand. In this paper, a novel method is proposed to solve the problem directly by using cutting patterns directly. A major advantage of the proposed method in series on-line production is that the system can adjust the cutting plan according to the floating orders. Examples with multiple items are demonstrated. The results show considerable efficiency and reliability in high-speed cutting of CSP.

Keywords: Cutting stock, Optimization, Heuristics

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1709

Authors: Ali H. Mahfouz, Gao Ming-Jun, Mohamad Sharif

Abstract:

Slurry dredged soil at coastal area has a high water content, poor permeability, and low surface intensity. Hence, it is infeasible to use vacuum preloading method to treat this type of soil foundation. For the special case of super soft ground, a floating bridge is first constructed on muddy soil and used as a service road and platform for implementing the modified vacuum preloading method. The modified technique of vacuum preloading and its construction process for the super soft soil foundation improvement is then studied. Application of modified vacuum preloading method shows that the technology and its construction process are highly suitable for improving the super soft soil foundation in coastal areas.

Keywords: Super soft foundation, dredger fill, vacuum preloading, foundation treatment, construction technology.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1893

Authors: Mohd Herwan Sulaiman, Omar Aliman, Siti Rafidah Abdul Rahim

Abstract:

This paper proposes a new methodology for the optimal allocation and sizing of Embedded Generation (EG) employing Real Coded Genetic Algorithm (RCGA) to minimize the total power losses and to improve voltage profiles in the radial distribution networks. RCGA is a method that uses continuous floating numbers as representation which is different from conventional binary numbers. The RCGA is used as solution tool, which can determine the optimal location and size of EG in radial system simultaneously. This method is developed in MATLAB. The effect of EG units- installation and their sizing to the distribution networks are demonstrated using 24 bus system.

Keywords: Embedded generation (EG), load flow study, optimal allocation, real coded genetic algorithm (RCGA).

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1885

Authors: Soojin Kim, Kyeongsoon Cho

Abstract:

This paper describes the pipeline architecture of high-speed modified Booth multipliers. The proposed multiplier circuits are based on the modified Booth algorithm and the pipeline technique which are the most widely used to accelerate the multiplication speed. In order to implement the optimally pipelined multipliers, many kinds of experiments have been conducted. The speed of the multipliers is greatly improved by properly deciding the number of pipeline stages and the positions for the pipeline registers to be inserted. We described the proposed modified Booth multiplier circuits in Verilog HDL and synthesized the gate-level circuits using 0.13um standard cell library. The resultant multiplier circuits show better performance than others. Since the proposed multipliers operate at GHz ranges, they can be used in the systems requiring very high performance.

Keywords: multiplier, pipeline, high-speed, modified Boothalgorithm.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2705

Authors: Xie Kefeng, Zhang He

Abstract:

For the stability and control demand of offshore small floating platform, a 2-HUS/U parallel mechanism was presented as offshore platform. Inverse kinematics was obtained by institutional constraint equation, and the dynamic model of offshore 2-HUS/U parallel platform was derived based on rigid body’s Lagrangian method. The equivalent moment of inertia, damping and driving force/torque variation of offshore 2-HUS/U parallel platform were analyzed. A numerical example shows that, for parallel platform of given motion, system’s equivalent inertia changes 1.25 times maximally. During the movement of platform, they change dramatically with the system configuration and have coupling characteristics. The maximum equivalent drive torque is 800 N. At the same time, the curve of platform’s driving force/torque is smooth and has good sine features. The control system needs to be adjusted according to kinetic equation during stability and control and it provides a basis for the optimization of control system.

Keywords: 2-HUS/U platform, Dynamics, Lagrange, Parallel platform.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 953

Authors: Juan P. Silva, T. R. Canchala, H. J. Lubberding, E. J. Peña, H. J. Gijzen

Abstract:

This study measured the fluxes of greenhouse gases (GHGs) i.e. CO₂, CH₄ and N₂O from a tropical eutrophic freshwater wetland (“Sonso Lagoon”) which receives input loading nutrient from several sources i.e. agricultural run-off, domestic sewage, and a polluted river. The flux measurements were carried out at four different points using the static chamber technique. CO₂ fluxes ranged from -8270 to 12210 mg.m^-2.d^-1 (median = 360; SD = 4.11; n = 50), CH₄ ranged between 0.2 and 5270 mg.m^-2.d^-1 (median = 60; SD = 1.27; n = 45), and N₂O ranged from -31.12 to 15.4 mg N₂O m^-2.d^-1 (median = 0.05; SD = 9.36; n = 42). Although some negative fluxes were observed in the zone dominated by floating plants i.e. Eichornia crassipes, Salvinia sp., and Pistia stratiotes L., the mean values indicated that the Sonso Lagoon was a net source of CO₂, CH₄ and N₂O. In addition, an effect of the eutrophication on GHG emissions could be observed in the positive correlation found between CO₂, CH₄ and N₂O generation and COD, PO₄^-3, NH₃-N, TN and NO₃^-N. The eutrophication impact on GHG production highlights the necessity to limit the anthropic activities on freshwater wetlands.

Keywords: Eutrophication, greenhouse gas emissions, freshwater wetlands, climate change.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2078

Authors: Sara Felloni, Giuliano Strini

Abstract:

We explore entanglement in composite quantum systems and how its peculiar properties are exploited in quantum information and communication protocols by means of Diagrams of States, a novel method to graphically represent and analyze how quantum information is elaborated during computations performed by quantum circuits. We present quantum diagrams of states for Bell states generation, measurements and projections, for dense coding and quantum teleportation, for probabilistic quantum machines designed to perform approximate quantum cloning and universal NOT and, finally, for quantum privacy amplification based on entanglement purification. Diagrams of states prove to be a useful approach to analyze quantum computations, by offering an intuitive graphic representation of the processing of quantum information. They also help in conceiving novel quantum computations, from describing the desired information processing to deriving the final implementation by quantum gate arrays.

Keywords: Diagrams of states, entanglement, quantum circuits, quantum information.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1638

Authors: Edward J. Kansa, Pavel Holoborodko

Abstract:

Continuously differentiable radial basis functions (RBFs) are meshfree, converge faster as the dimensionality increases, and is theoretically spectrally convergent. When implemented on current single and double precision computers, such RBFs can suffer from ill-conditioning because the systems of equations needed to be solved to find the expansion coefficients are full. However, the Advanpix extended precision software package allows computer mathematics to resemble asymptotically ideal Platonic mathematics. Additionally, full systems with extended precision execute faster graphical processors units and field-programmable gate arrays because no branching is needed. Sparse equation systems are fast for iterative solvers in a very limited number of cases.

Keywords: Meshless spectrally convergent, partial differential equations, extended arithmetic precision, no branching.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 593

Authors: Zulhelmi Zakaria, Shuja A. Abbasi

Abstract:

A new approach has been used for optimized design of multipliers based upon the concepts of Vedic mathematics. The design has been targeted to state-of-the art field-programmable gate arrays (FPGAs). The multiplier generates partial products using Vedic mathematics method by employing basic 4x4 multipliers designed by exploiting 6-input LUTs and multiplexers in the same slices resulting in drastic reduction in area. The multiplier is realized on Xilinx FPGAs using devices Virtex-5 and Virtex-6.Carry Chain Adder was employed to obtain final products. The performance of the proposed multiplier was examined and compared to well-known multipliers such as Booth, Carry Save, Carry ripple, and array multipliers. It is demonstrated that the proposed multiplier is superior in terms of speed as well as power consumption.

Keywords: Multiplier, Vedic Mathematics, LUTs, FPGAs.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2902

Authors: Hong Li, Linfeng Li, Jianping Hu

Abstract:

With rapid technology scaling, the proportion of the static power consumption catches up with dynamic power consumption gradually. To decrease leakage consumption is becoming more and more important in low-power design. This paper presents a power-gating scheme for P-DTGAL (p-type dual transmission gate adiabatic logic) circuits to reduce leakage power dissipations under deep submicron process. The energy dissipations of P-DTGAL circuits with power-gating scheme are investigated in different processes, frequencies and active ratios. BSIM4 model is adopted to reflect the characteristics of the leakage currents. HSPICE simulations show that the leakage loss is greatly reduced by using the P-DTGAL with power-gating techniques.

Keywords: Leakage reduction, low power, deep submicronCMOS circuits, P-type adiabatic circuits.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1915

Authors: Z.A. Jaffery, Vinay Kumar Chandna, Sunil Kumar Chaudhary

Abstract:

This paper present a MATLAB-SIMULINK model of a single phase 2.5 KVA, 240V RMS controlled PV VSI (Photovoltaic Voltage Source Inverter) inverter using IGBTs (Insulated Gate Bipolar Transistor). The behavior of output voltage, output current, and the total harmonic distortion (THD), with the variation in input dc blocking capacitor (Cdc), for linear and non-linear load has been analyzed. The values of Cdc as suggested by the other authors in their papers are not clearly defined and it poses difficulty in selecting the proper value. As the dc power stored in Cdc, (generally placed parallel with battery) is used as input to the VSI inverter. The simulation results shows the variation in the output voltage and current with different values of Cdc for linear and non-linear load connected at the output side of PV VSI inverter and suggest the selection of suitable value of Cdc.

Keywords: DC Blocking capacitor, IGBTs, PV VSI, THD.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2101

Authors: Ahmed Chalak Shakir, GuXuemai, Jia Min

Abstract:

Recently, wireless sensor networks have been paid more interest, are widely used in a lot of commercial and military applications, and may be deployed in critical scenarios (e.g. when a malfunctioning network results in danger to human life or great financial loss). Such networks must be protected against human intrusion by using the secret keys to encrypt the exchange messages between communicating nodes. Both the symmetric and asymmetric methods have their own drawbacks for use in key management. Thus, we avoid the weakness of these two cryptosystems and make use of their advantages to establish a secure environment by developing the new method for encryption depending on the idea of code conversion. The code conversion-s equations are used as the key for designing the proposed system based on the basics of logic gate-s principals. Using our security architecture, we show how to reduce significant attacks on wireless sensor networks.

Keywords: logic gates, code conversions, Gray-code, and clustering.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1617

Authors: Abdallah A. Alshennawy, Ayman A. Aly

Abstract:

The fuzzy technique is an operator introduced in order to simulate at a mathematical level the compensatory behavior in process of decision making or subjective evaluation. The following paper introduces such operators on hand of computer vision application. In this paper a novel method based on fuzzy logic reasoning strategy is proposed for edge detection in digital images without determining the threshold value. The proposed approach begins by segmenting the images into regions using floating 3x3 binary matrix. The edge pixels are mapped to a range of values distinct from each other. The robustness of the proposed method results for different captured images are compared to those obtained with the linear Sobel operator. It is gave a permanent effect in the lines smoothness and straightness for the straight lines and good roundness for the curved lines. In the same time the corners get sharper and can be defined easily.

Keywords: Fuzzy logic, Edge detection, Image processing, computer vision, Mechanical parts, Measurement.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4738

Authors: Y. A. Adla, R. Soubra, M. Kasab, M. O. Diab, A. Chkeir

Abstract:

Over the past several years, researchers have shown a great interest in assessing the mobility of elderly people to measure their functional status. Usually, such an assessment is done by conducting tests that require the subject to walk a certain distance, turn around, and finally sit back down. Consequently, this study aims to provide an at home monitoring system to assess the patient’s status continuously. Thus, we proposed a technique to automatically detect when a subject sits down while walking at home. In this study, we utilized a Doppler radar system to capture the motion of the subjects. More than 20 features were extracted from the radar signals out of which 11 were chosen based on their Intraclass Correlation Coefficient (ICC > 0.75). Accordingly, the sequential floating forward selection wrapper was applied to further narrow down the final feature vector. Finally, five features were introduced to the Linear Discriminant Analysis classifier and an accuracy of 93.75% was achieved as well as a precision and recall of 95% and 90% respectively.

Keywords: Doppler radar system, stand-to-sit phase, TUG test, machine learning, classification

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 410

Authors: Semih Demir, Anil Celebi

Abstract:

Circuit switched networks widely used until the end of the 20^th century have been transformed into packages switched networks. Time Division Multiplexing over Internet Protocol (TDMoIP) is a system that enables Time Division Multiplexing (TDM) traffic to be carried over packet switched networks (PSN). In TDMoIP systems, devices that send TDM data to the PSN and receive it from the network must operate with the same clock frequency. In this study, it was aimed to implement clock synchronization process in Field Programmable Gate Array (FPGA) chips using time information attached to the packages received from PSN. The designed hardware is verified using the datasets obtained for the different carrier types and comparing the results with the software model. Field tests are also performed by using the real time TDMoIP system.

Keywords: Clock recovery on TDMoIP, FPGA, MATLAB reference model, clock synchronization.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1415