Search results for: VLSI Systems.

Authors: D. Krishnaveni, M. Geetha Priya

Abstract:

Application of reversible logic in integrated circuits results in the improved optimization of power consumption. This technology can be put into use in a variety of low power applications such as quantum computing, optical computing, nano-technology, and Complementary Metal Oxide Semiconductor (CMOS) Very Large Scale Integrated (VLSI) design etc. Logic gates are the basic building blocks in the design of any logic network and thus integrated circuits. In this paper, reversible Dual Key Gate (DKG) and Dual key Gate Pair (DKGP) gates that work singly as full adder/full subtractor are used to realize the basic building blocks of logic circuits. Reversible full adder/subtractor and parallel adder/ subtractor are designed using other reversible gates available in the literature and compared with that of DKG & DKGP gates. Efficient performance of reversible logic circuits relies on the optimization of the key parameters viz number of constant inputs, garbage outputs and number of reversible gates. The full adder/subtractor and parallel adder/subtractor design with reversible DKGP and DKG gates results in least number of constant inputs, garbage outputs, and number of reversible gates compared to the other designs. Thus, this paper provides a threshold to build more complex arithmetic systems using these reversible logic gates, leading to the enhanced performance of computing systems.

Keywords: Low power CMOS, quantum computing, reversible logic gates, full adder, full subtractor, parallel adder/subtractor, basic gates, universal gates.

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Authors: Vijay Kumar Sharma, Manisha Pattanaik, Balwinder Raj

Abstract:

Minimizations of power dissipation, chip area with higher circuit performance are the necessary and key parameters in deep submicron regime. The leakage current increases sharply in deep submicron regime and directly affected the power dissipation of the logic circuits. In deep submicron region the power dissipation as well as high performance is the crucial concern since increasing importance of portable systems. Number of leakage reduction techniques employed to reduce the leakage current in deep submicron region but they have some trade-off to control the leakage current. ONOFIC approach gives an excellent agreement between power dissipation and propagation delay for designing the efficient CMOS logic circuits. In this article ONOFIC approach is compared with LECTOR technique and output results show that ONOFIC approach significantly reduces the power dissipation and enhance the speed of the logic circuits. The lower power delay product is the big outcome of this approach and makes it an influential leakage reduction technique.

Keywords: Deep submicron, Leakage Current, LECTOR, ONOFIC, Power Delay Product

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Authors: Arne Koschel, Irina Astrova, Elena Deutschkämer, Jacob Ester, Johannes Feldmann

Abstract:

In this paper various techniques in relation to large-scale systems are presented. At first, explanation of large-scale systems and differences from traditional systems are given. Next, possible specifications and requirements on hardware and software are listed. Finally, examples of large-scale systems are presented.

Keywords: Distributed file systems, cashing, large scale systems, MapReduce algorithm, NoSQL databases.

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Authors: Mansi Jhamb, R. K. Sharma, A. K. Gupta

Abstract:

The distribution of a single global clock across a chip has become the major design bottleneck for high performance VLSI systems owing to the power dissipation, process variability and multicycle cross-chip signaling. A Network-on-Chip (NoC) architecture partitioned into several synchronous blocks has become a promising approach for attaining fine-grain power management at the system level. In a NoC architecture the communication between the blocks is handled asynchronously. To interface these blocks on a chip operating at different frequencies, an asynchronous FIFO interface is inevitable. However, these asynchronous FIFOs are not required if adjacent blocks belong to the same clock domain. In this paper, we have designed and analyzed a 16-bit asynchronous micropipelined FIFO of depth four, with the awareness of place and route on an FPGA device. We have used a commercially available Spartan 3 device and designed a high speed implementation of the asynchronous 4-phase micropipeline. The asynchronous FIFO implemented on the FPGA device shows 76 Mb/s throughput and a handshake cycle of 109 ns for write and 101.3 ns for read at the simulation under the worst case operating conditions (voltage = 0.95V) on a working chip at the room temperature.

Keywords: Asynchronous, FIFO, FPGA, GALS, Network-on- Chip (NoC), VHDL.

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Authors: Niveditha Domse, Kris Kumar, K. N. Balasubramanya Murthy

Abstract:

The more recent satellite projects/programs makes extensive usage of real – time embedded systems. 16 bit processors which meet the Mil-Std-1750 standard architecture have been used in on-board systems. Most of the Space Applications have been written in ADA. From a futuristic point of view, 32 bit/ 64 bit processors are needed in the area of spacecraft computing and therefore an effort is desirable in the study and survey of 64 bit architectures for space applications. This will also result in significant technology development in terms of VLSI and software tools for ADA (as the legacy code is in ADA). There are several basic requirements for a special processor for this purpose. They include Radiation Hardened (RadHard) devices, very low power dissipation, compatibility with existing operational systems, scalable architectures for higher computational needs, reliability, higher memory and I/O bandwidth, predictability, realtime operating system and manufacturability of such processors. Further on, these may include selection of FPGA devices, selection of EDA tool chains, design flow, partitioning of the design, pin count, performance evaluation, timing analysis etc. This project deals with a brief study of 32 and 64 bit processors readily available in the market and designing/ fabricating a 64 bit RISC processor named RISC MicroProcessor with added functionalities of an extended double precision floating point unit and a 32 bit signal processing unit acting as co-processors. In this paper, we emphasize the ease and importance of using Open Core (OpenSparc T1 Verilog RTL) and Open “Source" EDA tools such as Icarus to develop FPGA based prototypes quickly. Commercial tools such as Xilinx ISE for Synthesis are also used when appropriate.

Keywords: RISC MicroProcessor, RPC – RISC Processor Core, PBX – Processor to Block Interface part of the Interconnection Network, BPX – Block to Processor Interface part of the Interconnection Network, FPU – Floating Point Unit, SPU – Signal Processing Unit, WB – Wishbone Interface, CTU – Clock and Test Unit

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Authors: Thiago Brito Bezerra, Mauro Lopes de Freitas, Waldir Sabino da Silva Júnior

Abstract:

The Sigma-Delta A/D converters have been proposed as a practical application for A/D conversion at high rates because of its simplicity and robustness to imperfections in the circuit, also because the traditional converters are more difficult to implement in VLSI technology. These difficulties with conventional conversion methods need precise analog components in their filters and conversion circuits, and are more vulnerable to noise and interference. This paper aims to analyze the architecture, function and application of Analog-Digital converters (A/D) Sigma-Delta to overcome these difficulties, showing some simulations using the Simulink software and Multisim.

Keywords: Analysis, Oversampling Modulator, A/D converters, Sigma-Delta.

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Authors: Nasir Mehmood, Jens Ogniewski, Vinodh Ravinath

Abstract:

This paper describes the design of a real-time audiorange digital oscilloscope and its implementation in 90nm CMOS FPGA platform. The design consists of sample and hold circuits, A/D conversion, audio and video processing, on-chip RAM, clock generation and control logic. The design of internal blocks and modules in 90nm devices in an FPGA is elaborated. Also the key features and their implementation algorithms are presented. Finally, the timing waveforms and simulation results are put forward.

Keywords: CMOS, VLSI, Oscilloscope, Field Programmable Gate Array (FPGA), VHDL, Video Graphics Array (VGA)

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Authors: Maninder Kaur Gill, Alpana Agarwal

Abstract:

It is practically not feasible to measure the open-loop voltage gain of the operational amplifier in the open loop configuration. It is because the open-loop voltage gain of the operational amplifier is very large. In order to avoid the saturation of the output voltage, a very small input should be given to operational amplifier which is not possible to be measured practically by a digital multimeter. A test circuit for measurement of open loop voltage gain of an operational amplifier has been proposed and verified using simulation tools as well as by experimental methods on breadboard. The main advantage of this test circuit is that it is simple, fast, accurate, cost effective, and easy to handle even on a breadboard. The test circuit requires only the device under test (DUT) along with resistors. This circuit has been tested for measurement of open loop voltage gain for different operational amplifiers. The underlying goal is to design testable circuits for various analog devices that are simple to realize in VLSI systems, giving accurate results and without changing the characteristics of the original system. The DUTs used are LM741CN and UA741CP. For LM741CN, the simulated gain and experimentally measured gain (average) are calculated as 89.71 dB and 87.71 dB, respectively. For UA741CP, the simulated gain and experimentally measured gain (average) are calculated as 101.15 dB and 105.15 dB, respectively. These values are found to be close to the datasheet values.

Keywords: Device under test, open-loop voltage gain, operational amplifier, test circuit.

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Authors: Muhammad Ali, Awais Adnan

Abstract:

Network on a chip (NoC) has been proposed as a viable solution to counter the inefficiency of buses in the current VLSI on-chip interconnects. However, as the silicon chip accommodates more transistors, the probability of transient faults is increasing, making fault tolerance a key concern in scaling chips. In packet based communication on a chip, transient failures can corrupt the data packet and hence, undermine the accuracy of data communication. In this paper, we present a comparative analysis of transient fault tolerant techniques including end-to-end, node-by-node, and stochastic communication based on flooding principle.

Keywords: NoC, fault-tolerance, transient faults.

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Authors: K. P. Csányi, L. T. Kóczy, D. Tikk

Abstract:

This paper indicate the importance of telecommunications supervision systems (TSS), integrating heterogeneous TSS into single system thru umbrella systems, introduces the structure, features, requirements of TSS and TSS related intelligent solutions.

Keywords: Telecommunication, telecommunication supervisionsystems, umbrella systems

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Authors: Ikbal Zammouri, Béchir Ayeb

Abstract:

In this paper, we propose a new method to describe fractal shapes using parametric l-systems. First we introduce scaling factors in the production rules of the parametric l-systems grammars. Then we decorticate these grammars with scaling factors using turtle algebra to show the mathematical relation between l-systems and iterated function systems (IFS). We demonstrate that with specific values of the scaling factors, we find the exact relationship established by Prusinkiewicz and Hammel between l-systems and IFS.

Keywords: Fractal shapes, IFS, parametric l-systems, turtlealgebra.

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Authors: H. Mahboubi, B. Moshiri, A. Khaki Seddigh

Abstract:

In the past decade, because of wide applications of hybrid systems, many researchers have considered modeling and control of these systems. Since switching systems constitute an important class of hybrid systems, in this paper a method for optimal control of linear switching systems is described. The method is also applied on the two-tank system which is a much appropriate system to analyze different modeling and control techniques of hybrid systems. Simulation results show that, in this method, the goals of control and also problem constraints can be satisfied by an appropriate selection of cost function.

Keywords: Hybrid systems, optimal control, switched systems, two-tank system

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Authors: Albertus G. Joubert, Roelien Goede

Abstract:

This paper explores how Critical Systems Thinking and Action Research can be used to improve student performance in Networking. When describing a system from a systems thinking perspective, the following aspects can be identified: the total system performance, the systems environment, the resources, the components and the management of the system. Following the history of system thinking we observe three emerged methodologies namely, hard systems, soft systems, and critical systems. This paper uses Critical Systems Thinking (CST) which describes systems in terms of contradictions and conflict. It demonstrates how CST can be used in an Action Research (AR) project to improve the performance of students. Intervention in terms of student assessment is discussed and the impact of the intervention is discussed.

Keywords: Action research, computer networks, critical systems thinking, higher education.

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Authors: Raman Paranjape

Abstract:

We present a new approach to evaluation of Cyber Security in Power Systems using the method of modeling the power systems Infrastructure using software agents. Interfaces between module and the home smart meter are recognized as the primary points of intrusion.

Keywords: Power Systems, Modeling and Simulation, Agent systems.

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Authors: Roelien Goede

Abstract:

Data warehousing success is not high enough. User dissatisfaction and failure to adhere to time frames and budgets are too common. Most traditional information systems practices are rooted in hard systems thinking. Today, the great systems thinkers are forgotten by information systems developers. A data warehouse is still a system and it is worth investigating whether systems thinkers such as Churchman can enhance our practices today. This paper investigates data warehouse development practices from a systems thinking perspective. An empirical investigation is done in order to understand the everyday practices of data warehousing professionals from a systems perspective. The paper presents a model for the application of Churchman-s systems approach in data warehouse development.

Keywords: Data warehouse development, Information systemsdevelopment, Interpretive case study, Systems thinking

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Authors: C. Kalamani, K. Paramasivam

Abstract:

In VLSI, testing plays an important role. Major problem in testing are test data volume and test power. The important solution to reduce test data volume and test time is test data compression. The Proposed technique combines the bit maskdictionary and 2n pattern run length-coding method and provides a substantial improvement in the compression efficiency without introducing any additional decompression penalty. This method has been implemented using Mat lab and HDL Language to reduce test data volume and memory requirements. This method is applied on various benchmark test sets and compared the results with other existing methods. The proposed technique can achieve a compression ratio up to 86%.

Keywords: Bit Mask dictionary, 2n pattern run length code, system-on-chip, SOC, test data compression.

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Authors: Åsa Smedberg

Abstract:

There are different kinds of online systems on the Internet for people who need support and develop new knowledge. Online communities and Ask the Expert systems are two such systems. In the health care area, the number of users of these systems has increased at a rapid pace. Interactions with medical trained experts take place online, and people with concerns about similar health problems come together to share experiences and advice. The systems are also used as storages and browsed for health information. Over the years, studies have been conducted of the usage of the different systems. However, in what ways the systems can be used together to enhance learning has not been explored. This paper presents results from a study of online health-communities and an Ask the Expert system for people who suffer from overweight. Differences and similarities in regards to posted issues and replies are discussed, and suggestions for a new holistic design of the two systems are presented.

Keywords: Learning, Ask the Expert, online community, healthcare, holistic, overweight.

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Authors: Susmita Sahoo, Madhumanti Datta, Rajib Kar

Abstract:

The resistive-inductive-capacitive behavior of long interconnects which are driven by CMOS gates are presented in this paper. The analysis is based on the ¤Ç-model of a RLC load and is developed for submicron devices. Accurate and analytical expressions for the output load voltage, the propagation delay and the short circuit power dissipation have been proposed after solving a system of differential equations which accurately describe the behavior of the circuit. The effect of coupling capacitance between input and output and the short circuit current on these performance parameters are also incorporated in the proposed model. The estimated proposed delay and short circuit power dissipation are in very good agreement with the SPICE simulation with average relative error less than 6%.

Keywords: Delay, Inverter, Short Circuit Power, ¤Ç-Model, RLCInterconnect, VLSI

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Authors: Mitchell J. McHugh, John J. Case

Abstract:

Systems engineering is a holistic discipline that seeks to organize and optimize complex, interdisciplinary systems. With the growth of artificial intelligence, systems engineers must face the challenge of leveraging artificial intelligence systems to solve complex problems. This paper analyzes the integration of systems engineering and artificial intelligence and discusses how artificial intelligence systems embody the systems decision process (SDP). The SDP is a four-stage problem-solving framework that outlines how systems engineers can design and implement solutions using value-focused thinking. This paper argues that artificial intelligence models can replicate the SDP, thus validating its flexible, value-focused foundation. The authors demonstrate this by developing a machine vision mobile application that can classify weapons to augment the decision-making role of an Army subject matter expert. This practical application was an end-to-end design challenge that highlights how artificial intelligence systems embody systems engineering principles. The impact of this research demonstrates that the SDP is a dynamic tool that systems engineers should leverage when incorporating artificial intelligence within the systems that they develop.

Keywords: Computer vision, machine learning, mobile application, systems engineering, systems decision process.

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Authors: Chao Qi, Fuyang Peng, Bo Deng, Xiaoyan Su

Abstract:

In the upgrade process of enterprise information systems, whether new systems will be success and their development will be efficient, depends on how to deal with and utilize those legacy systems. We propose an evaluation system, which comprehensively describes the capacity of legacy information systems in five aspects. Then a practical legacy systems evaluation method is scripted. Base on the evaluation result, we put forward 4 kinds of migration strategy: eliminated, maintenance, modification, encapsulating. The methods and strategies play important roles in practice.

Keywords: Legacy Systems, Evaluation Method, Migration Strategy.

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Authors: Namal A. Senanayake, A. Beg, Withana C. Prasad

Abstract:

This paper analyzes the patterns of the Monte Carlo data for a large number of variables and minterms, in order to characterize the circuit path length behavior. We propose models that are determined by training process of shortest path length derived from a wide range of binary decision diagram (BDD) simulations. The creation of the model was done use of feed forward neural network (NN) modeling methodology. Experimental results for ISCAS benchmark circuits show an RMS error of 0.102 for the shortest path length complexity estimation predicted by the NN model (NNM). Use of such a model can help reduce the time complexity of very large scale integrated (VLSI) circuitries and related computer-aided design (CAD) tools that use BDDs.

Keywords: Monte Carlo data, Binary decision diagrams, Neural network modeling, Shortest path length estimation.

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Authors: Federico Cabitza, Bernardo Dal Seno

Abstract:

In this paper DJess is presented, a novel distributed production system that provides an infrastructure for factual and procedural knowledge sharing. DJess is a Java package that provides programmers with a lightweight middleware by which inference systems implemented in Jess and running on different nodes of a network can communicate. Communication and coordination among inference systems (agents) is achieved through the ability of each agent to transparently and asynchronously reason on inferred knowledge (facts) that might be collected and asserted by other agents on the basis of inference code (rules) that might be either local or transmitted by any node to any other node.

Keywords: Knowledge-Based Systems, Expert Systems, Distributed Inference Systems, Parallel Production Systems, Ambient Intelligence, Mobile Agents.

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Authors: G.Ramana Murthy, C.Senthilpari, P.Velrajkumar, Lim Tien Sze

Abstract:

The proposed multiplexer-based novel 1-bit full adder cell is schematized by using DSCH2 and its layout is generated by using microwind VLSI CAD tool. The adder cell layout interconnect analysis is performed by using BSIM4 layout analyzer. The adder circuit is compared with other six existing adder circuits for parametric analysis. The proposed adder cell gives better performance than the other existing six adder circuits in terms of power, propagation delay and PDP. The proposed adder circuit is further analyzed for interconnect analysis, which gives better performance than other adder circuits in terms of layout thickness, width and height.

Keywords: Full Adder, Interconnect Analysis, Low-Power, Multiplexer, Propagation Delay, Parametric Analysis.

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Authors: Michael Torggler

Abstract:

Modern information and communication technologies offer a variety of support options for the efficient handling of customer relationships. CRM systems have been developed, which are designed to support the processes in the areas of marketing, sales and service. Along with technological progress, CRM systems are constantly changing, i.e. the systems are continually enhanced by new functions. However, not all functions are suitable for every company because of different frameworks and business processes. In this context the question arises whether or not CRM systems are widely used in Austrian companies and which business processes are most frequently supported by CRM systems. This paper aims to shed light on the popularity of CRM systems in Austrian companies in general and the use of different functions to support their daily business. First of all, the paper provides a theoretical overview of the structure of modern CRM systems and proposes a categorization of currently available software functionality for collaborative, operational and analytical CRM processes, which provides the theoretical background for the empirical study. Apart from these theoretical considerations, the paper presents the empirical results of a field survey on the use of CRM systems in Austrian companies and analyzes its findings.

Keywords: CRM systems, CRM system adoption, CRM system diffusion, CRM functionality, Market study.

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Authors: Rihab Gam, Anis Sakly, Faouzi M'sahli

Abstract:

A new strategy of control is formulated for chaos synchronization of non-identical chaotic systems with different orders using the Borne and Gentina practical criterion associated with the Benrejeb canonical arrow form matrix, to drift the stability property of dynamic complex systems. The designed controller ensures that the state variables of controlled chaotic slave systems globally synchronize with the state variables of the master systems, respectively. Numerical simulations are performed to illustrate the efficiency of the proposed method.

Keywords: Synchronization, Non-identical chaotic systems, Different orders, Arrow form matrix.

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Authors: K. Liagkouras, K. Metaxiotis

Abstract:

Customer relationship management (CRM) systems in business are a reality of the contemporary business world for the last decade or so. Still, there are grey areas regarding the successful implementation and operation of CRM systems in business. This paper, through the systematic study of the CRM implementation paradigm, attempts to identify the most important challenges and opportunities that the CRM systems face in a rapidly changing business world.

Keywords: Customer Relationship Management, CRM, Business, Information Systems.

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Authors: V. T. S. Dao, T. G. Etoh, C. Vo Le, H. D. Nguyen, K. Takehara, T. Akino, K. Nishi

Abstract:

We present an explicit expression to estimate driving voltage attenuation through RC networks representation of an ultrahigh- speed image sensor. Elmore delay metric for a fundamental RC chain is employed as the first-order approximation. By application of dimensional analysis to SPICE simulation data, we found a simple expression that significantly improves the accuracy of the approximation. Estimation error of the resultant expression for uniform RC networks is less than 2%. Similarly, another simple closed-form model to estimate 50 % delay through fundamental RC networks is also derived with sufficient accuracy. The framework of this analysis can be extended to address delay or attenuation issues of other VLSI structures.

Keywords: Dimensional Analysis, Elmore model, RC network, Signal Attenuation, Ultra-High-Speed Image Sensor.

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Authors: S. Carpintero, R. Barcham

Abstract:

Light rail systems have proliferated in Spain in the last decade, following a tendency that is common not only in other European countries but also in other parts of the world. This paper reviews the benefits of light rail systems, both related to environmental issues and mobility issues. It analyses the evolution of light rail projects in Spain and shows that light rail systems in this country have evolved towards an extensive use of public-private partnerships. The analysis of the Spanish projects, however, does not contribute any conclusive evidence about whether public-private partnerships have been more efficient than publicly owned enterprises in building and operating light rail systems.

Keywords: Light rail systems, public-private partnerships, BOT.

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Authors: Debal Saha, NirmalBaranHui

Abstract:

The present paper discusses the basic concepts and the underlying principles of Multi-Agent Systems (MAS) along with an interdisciplinary exploitation of these principles. It has been found that they have been utilized for lots of research and studies on various systems spanning across diverse engineering and scientific realms showing the need of development of a proper generalized framework. Such framework has been developed for the Multi-Agent Systems and it has been generalized keeping in mind the diverse areas where they find application. All the related aspects have been categorized and a general definition has been given where ever possible.

Keywords: Generalized framework, multiagent systems.

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Authors: Shilpi Lavania

Abstract:

As the frequency of operation has attained a range of GHz and signal rise time continues to increase interconnect technology is suffering due to various high frequency effects as well as ground bounce problem. In some recent studies a high frequency effect i.e. skin effect has been modeled and its drawbacks have been discussed. This paper strives to make an impression on the advantage side of modeling skin effect for interconnect line. The proposed method has considered a CMOS with RC interconnect. Delay and noise considering ground bounce problem and with skin effect are discussed. The simulation results reveal an advantage of considering skin effect for minimization of ground bounce problem during the working of the model. Noise and delay variations with temperature are also presented.

Keywords: Interconnect, Skin effect, Ground Bounce, Delay, Noise.

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