Search results for: Low supply voltage

Authors: Sun-Ki Hong, Nam-HeeByeon, Jung-Seop Lee, Tae-Sam Kang

Abstract:

For Common R or R-L load to apply arbitrary voltage, the bridge traditional inverters don’t have any difficulties by PWM method. However for driving some piezoelectric actuator, arbitrary voltage not a pulse but a steady voltage should be applied. Piezoelectric load is considered as R-C load and its voltage does not decrease even though the applied voltage decreases. Therefore it needs some special inverter with circuit that can discharge the capacitive energy. Especially for unidirectional arbitrary voltage driving like as sine wave, it becomes more difficult problem. In this paper, a charge and discharge circuit for unidirectional arbitrary voltage driving for piezoelectric actuator is proposed. The circuit has charging and discharging switches for increasing and decreasing output voltage. With the proposed simple circuit, the load voltage can have any unidirectional level with tens of bandwidth because the load voltage can be adjusted by switching the charging and discharging switch appropriately. The appropriateness is proved from the simulation of the proposed circuit.

Keywords: DC-DC converter, analog output voltage, sinusoidal drive, piezoelectric load, discharging circuit.

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Authors: Hyun-Young Kim, Chung-Kwang Lee, Han-Hee Cho, Sang-Woon Cho, Yong-Seo Koo

Abstract:

In this paper, we proposed a novel SCR (Silicon Controlled Rectifier) - based ESD (Electrostatic Discharge) protection device for I/O and power clamp. The proposed device has a higher holding voltage characteristic than conventional SCR. These characteristics enable to have latch-up immunity under normal operating conditions as well as superior full chip ESD protection. The proposed device was analyzed to figure out electrical characteristics and tolerance robustness in term of individual design parameters (D1, D2, D3). They are investigated by using the Synopsys TCAD simulator. As a result of simulation, holding voltage increased with different design parameters. The holding voltage of the proposed device changes from 3.3V to 7.9V. Also, N-Stack structure ESD device with the high holding voltage is proposed. In the simulation results, 2-stack has holding voltage of 6.8V and 3-stack has holding voltage of 10.5V. The simulation results show that holding voltage of stacking structure can be larger than the operation voltage of high-voltage application.

Keywords: ESD, SCR, holding voltage, stack, power clamp.

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Authors: Yong Seo Koo, Jong Ho Nam, Yong Nam Choi, Dae Yeol Yoo, Jung Woo Han

Abstract:

This paper presents a silicon controller rectifier (SCR) based ESD protection circuit for IC. The proposed ESD protection circuit has low trigger voltage and high holding voltage compared with conventional SCR ESD protection circuit. Electrical characteristics of the proposed ESD protection circuit are simulated and analyzed using TCAD simulator. The proposed ESD protection circuit verified effective low voltage ESD characteristics with low trigger voltage and high holding voltage.

Keywords: ESD (Electro-Static Discharge), SCR (Silicon Controlled Rectifier), holding Voltage.

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Authors: Asfar Ali Khan, Ekram Husain

Abstract:

Modern Society is strongly dependent on a reliable power supply. The availability of cheap and reliable supply of electrical energy is an indicator of societal welfare. Uninterrupted reliable operation of a modern power system depends to a great extent on reliable and satisfactory performance of insulators under different environmental conditions. This paper reports result of natural pollution tests that have been done at sites around city of Aligarh (India). Flashover voltage per insulation distance (FOVUID) of porcelain disc insulator for different pH values, ESDD has been recorded for proper correlation between electrical and chemical parameters. The pH of the contaminants has been suggested to be an effective pollution severity indicator and may be used as a diagnostic parameter for proper maintenance of porcelain insulators.

Keywords: Porcelain insulators, Flashover Voltage, pH value, Conductivity, ESDD.

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Authors: M. Nassereddine, A. Hellany, M. Nagrial, J. Rizk

Abstract:

The demand on High voltage (HV) infrastructures is growing due to the corresponding growth in industries and population. Many areas are being developed and therefore require additional electrical power to comply with the demand. Substation upgrade is one of the rapid solutions to ensure the continuous supply of power to customers. This upgrade requires civil modifications to structures and fences. The civil work requires excavation and steel works that may create unsafe touch conditions. This paper presents a brief theoretical overview of the touch voltage inside and around substations and uses CDEGS software to simulate a case study.

Keywords: Earth safety, High Voltage, AC interference, Earthing Design.

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Authors: Rade M. Ciric, Nikola Lj.Rajakovic

Abstract:

Since the 80s huge efforts have been made to utilize renewable energy sources to generate electric power. This paper reports some aspects of integration of the distributed generators into the low voltage distribution networks. An assessment of impact of the distributed generators on the reliability indices of low voltage network is performed. Results obtained from case study using low voltage network, are presented and discussed.

Keywords: low voltage network, distributed generation, reliability indices

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Authors: S. Venkateshwarlu, B. P. Muni, A. D. Rajkumar, J. Praveen

Abstract:

Custom power is a technology driven product and service solution which embraces a family devices such as Dynamic Voltage Restorer (DVR), Distributed Shunt Compensator (DSTATCOM), Solid State Breaker (SSB) etc which will provide power quality functions at distribution voltages. The rapid response of these devices enables them to operate in real time, providing continuous and dynamic control of the supply including voltage and reactive power regulation, harmonic reduction and elimination of voltage dips. This paper presents the benefits of multilevel inverters when they are used for DPC based custom power devices. Power flow control mechanism, salient features, advantages and disadvantages of direct power control (DPC) using lookup table, SVM, predictive voltage vector and hybrid DPC strategies are discussed in this paper. Simulation results of three level inverter based STATCOM, harmonic analysis of multi level inverters are presented at the end.

Keywords: DPC, DPC-SVM, Dynamic voltage restorer, DSTATCOM, Multilevel inverter, PWM Converter, PDPC, VF-DPC.

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Authors: Dipankar Nag, Choe Andrew Kunil, Kevin Chai Tshun Chuan, Minkyu Je

Abstract:

This paper presents the design and implementation of a fully integrated Capacitance-to-Voltage Converter (CVC) as the analog front-end for magnetometer interface IC. The application demands very low power solution operating in the frequency of around 20 KHz. The design adapts low power architecture to create low noise electronic interface for Capacitive Micro-machined Lorentz force magnetometer sensor. Using a 0.18-μm CMOS process, simulation results of this interface IC show that the proposed CVC can provide 33 dB closed loop gain, 20 nV/√Hz input referred noise at 20 KHz, while consuming 65 μA current from 1.8-V supply. 

Keywords: Analog front end, Capacitance-to-Voltage Converter, Magnetometer, MEMS, Recycling Folded Cascode.

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Authors: Kyoung-il Do, Byung-seok Lee, Hee-guk Chae, Jeong-yun Seo Yong-seo Koo

Abstract:

In this paper, a Silicon Controlled Rectifier (SCR)-based Electrostatic Discharge (ESD) protection circuit with high holding voltage and high robustness characteristics is proposed. Unlike conventional SCR, the proposed circuit has low trigger voltage and high holding voltage and provides effective ESD protection with latch-up immunity. In addition, the TCAD simulation results show that the proposed circuit has better electrical characteristics than the conventional SCR. A stack technology was used for voltage-specific applications. Consequentially, the proposed circuit has a trigger voltage of 17.60 V and a holding voltage of 3.64 V.

Keywords: ESD, SCR, latch-up, power clamp, holding voltage.

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Authors: B. M. Manjunatha, D. V. Ashok Kumar, M. Vijay Kumar

Abstract:

This paper proposes five level diode clamped Z source Inverter. The existing PWM techniques used for ZSI are restricted for two level. The two level Z Source Inverter have high harmonic distortions which effects the performance of the grid connected PV system. To improve the performance of the system the number of voltage levels in the output waveform need to be increased. This paper presents comparative analysis of a five level diode clamped Z source Inverter with different carrier based Modified Pulse Width Modulation techniques. The parameters considered for comparison are output voltage, voltage gain, voltage stress across switch and total harmonic distortion when powered by same DC supply. Analytical results are verified using MATLAB.

Keywords: Diode Clamped, Pulse Width Modulation, total harmonic distortion, Z Source Inverter.

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Authors: H. H. Goh, Q. S. Chua, S. W. Lee, B. C. Kok, K. C. Goh, K. T. K. Teo

Abstract:

At present, the evaluation of voltage stability assessment experiences sizeable anxiety in the safe operation of power systems. This is due to the complications of a strain power system. With the snowballing of power demand by the consumers and also the restricted amount of power sources, therefore, the system has to perform at its maximum proficiency. Consequently, the noteworthy to discover the maximum ability boundary prior to voltage collapse should be undertaken. A preliminary warning can be perceived to evade the interruption of power system’s capacity. The effectiveness of line voltage stability indices (LVSI) is differentiated in this paper. The main purpose of the indices used is to predict the proximity of voltage instability of the electric power system. On the other hand, the indices are also able to decide the weakest load buses which are close to voltage collapse in the power system. The line stability indices are assessed using the IEEE 14 bus test system to validate its practicability. Results demonstrated that the implemented indices are practically relevant in predicting the manifestation of voltage collapse in the system. Therefore, essential actions can be taken to dodge the incident from arising.

Keywords: Critical line, line outage, line voltage stability indices (LVSI), maximum loadability, voltage collapse, voltage instability, voltage stability analysis.

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Authors: Mehrdad Ahmadi Kamarposhti, Mostafa Alinezhad

Abstract:

One of the major causes of voltage instability is the reactive power limit of the system. Improving the system's reactive power handling capacity via Flexible AC transmission System (FACTS) devices is a remedy for prevention of voltage instability and hence voltage collapse. In this paper, the effects of SVC and STATCOM in Static Voltage Stability Margin Enhancement will be studied. AC and DC representations of SVC and STATCOM are used in the continuation power flow process in static voltage stability study. The IEEE-14 bus system is simulated to test the increasing loadability. It is found that these controllers significantly increase the loadability margin of power systems.

Keywords: SVC, STATCOM, Voltage Collapse, Maximum Loading Point.

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Authors: Spyridon Nikolaidis

Abstract:

A modeling approach for CMOS gates is presented based on the use of the equivalent inverter. A new model for the inverter has been developed using a simplified transistor current model which incorporates the nanoscale effects for the planar technology. Parametric expressions for the output voltage are provided as well as the values of the output and supply current to be compatible with the CCS technology. The model is parametric according the input signal slew, output load, transistor widths, supply voltage, temperature and process. The transistor widths of the equivalent inverter are determined by HSPICE simulations and parametric expressions are developed for that using a fitting procedure. Results for the NAND gate shows that the proposed approach offers sufficient accuracy with an average error in propagation delay about 5%.

Keywords: CMOS gate modeling, Inverter modeling, transistor current model, timing model.

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Authors: Rishikesh Pandey, Maneesha Gupta

Abstract:

A new low-voltage floating gate MOSFET (FGMOS) based squarer using square law characteristic of the FGMOS is proposed in this paper. The major advantages of the squarer are simplicity, rail-to-rail input dynamic range, low total harmonic distortion, and low power consumption. The proposed circuit is biased without body effect. The circuit is designed and simulated using SPICE in 0.25μm CMOS technology. The squarer is operated at the supply voltages of ±0.75V . The total harmonic distortion (THD) for the input signal 0.75Vpp at 25 KHz, and maximum power consumption were found to be less than 1% and 319μW respectively.

Keywords: Analog signal processing, floating gate MOSFETs, low-voltage, Spice, squarer.

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Authors: Chaiyut Sumpavakup, Thanatchai Kulworawanichpong

Abstract:

This paper presents the voltage regulation scheme of D-STATCOM under three-phase faults. It consists of the voltage detection and voltage regulation schemes in the 0dq reference. The proposed control strategy uses the proportional controller in which the proportional gain, kp, is appropriately adjusted by using genetic algorithms. To verify its use, a simplified 4-bus test system is situated by assuming a three-phase fault at bus 4. As a result, the DSTATCOM can resume the load voltage to the desired level within 1.8 ms. This confirms that the proposed voltage regulation scheme performs well under three-phase fault events.

Keywords: D-STATCOM, proportional controller, genetic algorithms.

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Authors: Puneet Chawla, Balwinder Singh

Abstract:

Recently, increased attention has been devoted to the voltage instability phenomenon in power systems. Many techniques have been proposed in the literature for evaluating and predicting voltage stability using steady state analysis methods. In this paper P-V and Q-V curves have been generated for a 57 bus Patiala Rajpura circle of India. The power-flow program is developed in MATLAB using Newton Raphson method. Using Q-V curves the weakest bus of the power system and the maximum reactive power change permissible on that bus is calculated. STATCOMs are placed on the weakest bus to improve the voltage and hence voltage stability and also the power transmission capability of the line.

Keywords: Voltage stability, Reactive power, power flow, weakest bus, STATCOM.

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Authors: Ivelina N. Cholakova, Tihomir B. Takov, Radostin Ts. Tsankov, Nicolas Simonne, Slavka S. Tzanova

Abstract:

Adjacent Hall microsensors, comprising a silicon substrate and four contacts, providing simultaneously two supply inputs and two differential outputs, are characterized. The voltage related sensitivity is in the order of 0.11T-1, and a cancellation method for offset compensation is used, achieving residual offset in the micro scale which is also compared to a single Hall plate.

Keywords: Adjacent Hall sensors, offset compensation, voltage related sensitivity, 0.18μm CMOS technology.

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Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn

Abstract:

This paper discusses the undesirable charge transfer by the parasitic capacitances of the input transistors in a voltage sense amplifier. Due to its intrinsic rail-to-rail voltage transition, the input sides are inevitably disturbed. It can possible disturb the stabilities of the reference voltage levels. Moreover, it becomes serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the systems. In order to alleviate the internal node voltage transition, the internal node stabilization technique is proposed by utilizing an additional biasing circuit. It achieves 47% and 43% improvements for node stabilization and input referred disturbance, respectively.

Keywords: Voltage sense amplifier, voltage transition, node stabilization, and biasing circuits.

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Authors: H. Nasiraghdam, A. Jalilian

Abstract:

DSTATCOM is one of the equipments for voltage sag mitigation in power systems. In this paper a new control method for balanced and unbalanced voltage sag mitigation using DSTATCOM is proposed. The control system has two loops in order to regulate compensator current and load voltage. Delayed signal cancellation has been used for sequence separation. The compensator should protect sensitive loads against different types of voltage sag. Performance of the proposed method is investigated under different types of voltage sags for linear and nonlinear loads. Simulation results show appropriate operation of the proposed control system.

Keywords: Custom power, power quality, voltage sagmitigation, current vector control.

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Authors: S. Abdollahi Pour, M. Saneei

Abstract:

This paper propose a new circuit design which monitor total leakage current during standby mode and generates the optimal reverse body bias voltage, by using the adaptive body bias (ABB) technique to compensate die-to-die parameter variations. Design details of power monitor are examined using simulation framework in 65nm and 32nm BTPM model CMOS process. Experimental results show the overhead of proposed circuit in terms of its power consumption is about 10 μW for 32nm technology and about 12 μW for 65nm technology at the same power supply voltage as the core power supply. Moreover the results show that our proposed circuit design is not far sensitive to the temperature variations and also process variations. Besides, uses the simple blocks which offer good sensitivity, high speed, the continuously feedback loop.

Keywords: leakage current, leakage power monitor, body biasing, low power

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Authors: Osea Zebua, Norikazu Ikoma, Hiroshi Maeda

Abstract:

Estimation of voltage stability based on optimal filtering method is presented. PV curve is used as a tool for voltage stability analysis. Dynamic voltage stability estimation is done by using particle filter method. Optimum value (nose point) of PV curve can be estimated by estimating parameter of PV curve equation optimal value represents critical voltage and condition at specified point of measurement. Voltage stability is then estimated by analyzing loading margin condition c stimating equation. This maximum loading ecified dynamically.

Keywords: normalized PV curve, optimal filtering method particle filter, voltage stability.

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Authors: Pyone Lai Swe, Wanna Swe, Kyaw Myo Lin

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Voltage stability has become an important issue to many power systems around the world due to the weak systems and long line on power system networks. In this paper, MATLAB load flow program is applied to obtain the weak points in the system combined with finding the voltage stability limit. The maximum permissible loading of a system, within the voltage stability limit, is usually determined. The methods for varying tap ratio (using tap changing transformer) and applying different values of shunt capacitor injection to improve the voltage stability within the limit are also provided.

Keywords: Load flow, Voltage stability, Tap changingtransformer, Shunt capacitor injection, Voltage stability limit

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Authors: N. Mungkung, S. Wongcharoen, C. Sukkongwari, Somchai Arunrungrasmi

Abstract:

This study examines the design and construction of AC Electronics load surge protection in order to carry electric surge load arisen from faults in low voltage electricity system (single phase/220V) by using the principle of electronics load clamping voltage during induction period so that electric voltage could go through to safe load and continue to work. The qualification of the designed device could prevent both transient over voltage and voltage swell. Both will work in cooperation, resulting in the ability to improve and modify the quality of electrical power in Thailand electricity distribution system more effective than the past and help increase the lifetime of electric appliances, electric devices, and electricity protection equipments.

Keywords: Electronics Load, Transient Over Voltage, Voltage Swell.

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Authors: SreehariRao Patri, K. S. R. KrishnaPrasad

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An on chip low drop out voltage regulator that employs elegant compensation scheme is presented in this paper. The novelty in this design is that the device parasitic capacitances are exploited for compensation at different loads. The proposed LDO is designed to provide a constant voltage of 1.2V and is implemented in UMC 180 nano meter CMOS technology. The voltage regulator presented improves stability even at lighter loads and enhances line and load regulation.

Keywords: Analog, LDO, SOC.

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Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn

Abstract:

This paper discusses the undesirable charge transfer through the parasitic capacitances of the input transistors in a multi-inputs voltage sense amplifier. Its intrinsic rail-to-rail voltage transitions at the output nodes inevitably disturb the input sides through the capacitive coupling between the outputs and inputs. Then, it can possible degrade the stabilities of the reference voltage levels. Moreover, it becomes more serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the overall systems. In order to alleviate the internal node voltage transition, the internal node stabilization techniques are proposed. It achieves 45% and 40% improvements for node stabilization and input referred disturbance, respectively.

Keywords: Voltage sense amplifier, multi-inputs, voltage transition, node stabilization, and biasing circuits.

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Authors: Shao-Ku Kao

Abstract:

This paper presents an active rectifier with time-domain delay compensation to enhance the efficiency. A delay calibration circuit is designed to convert delay time to voltage and adaptive control on/off delay in variable input voltage. This circuit is designed in 0.18 mm CMOS process. The input voltage range is from 2 V to 3.6 V with the output voltage from 1.8 V to 3.4 V. The efficiency can maintain more than 85% when the load from 50 Ω ~ 1500 Ω for 3.6 V input voltage. The maximum efficiency is 92.4 % at output power to be 38.6 mW for 3.6 V input voltage.

Keywords: Wireless power transfer, active diode, delay compensation, time to voltage converter, PCE.

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Authors: Kittaya Somsai, Thanatchai Kulworawanichpong, Nitus Voraphonpiput

Abstract:

This paper presents the DC voltage control design of D-STATCOM when the D-STATCOM is used for load voltage regulation. Although, the DC voltage can be controlled by active current of the D-STATCOM, reactive current still affects the DC voltage. To eliminate this effect, the control strategy with elimination effect of the reactive current is proposed and the results of the control with and without the elimination the effect of the reactive current are compared. For obtaining the proportional and integral gains of the PI controllers, the symmetrical optimum and genetic algorithms methods are applied. The stability margin of these methods are obtained and discussed in detail. In addition, the performance of the DC voltage control based on symmetrical optimum and genetic algorithms methods are compared. Effectiveness of the controllers designed was verified through computer simulation performed by using Power System Tool Block (PSB) in SIMULINK/MATLAB. The simulation results demonstrated that the DC voltage control proposed is effective in regulating DC voltage when the DSTATCOM is used for load voltage regulation.

Keywords: D-STATCOM, DC voltage control, Symmetrical optimum, Genetic algorithms

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Authors: Ahmed Helal, Sherif Zain Elabideen, Ahmed Lotfy

Abstract:

In this paper the modeling and analysis of Space Vector Pulse Width Modulation (SVPWM) based Dynamic Voltage Restorer (DVR) using PSCAD/EMTDC software will be presented in details. The simulation includes full modeling of the SVPWM technique used to control the DVR inverter. A test power system composed of three phase voltage source, sag generator, DVR and three phase resistive load is used to demonstrate restoration capability of the DVR. The simulation results of the presented DVR proved excellent voltage sag mitigation to protect sensitive loads.

Keywords: Dynamic voltage restorer, power quality, simulationand modeling, voltage sag.

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Authors: Yelena Chaiko

Abstract:

This paper presents a developed method for controlling multi-renewable energy generators. The control system depends basically on three sensors (wind anemometer, solar sensor, and voltage sensor). These sensors represent PLC-s analogue inputs. Controlling the output voltage supply can be achieved by an enhanced method of interlocking between the renewable energy generators, depending on those sensors and output contactors.

Keywords: Renewable, energy, control, model, generator.

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Authors: Oleksandr Krykunov

Abstract:

The source voltage of high-power fuel cell shows strong load dependence at comparatively low voltage levels. In order to provide the voltage of 750V on the DC-link for feeding electrical energy into the mains via a three phase inverter a step-up converter with a large step-up ratio is required. The output voltage of this DC/DC-converter must be stabile during variations of the load current and the voltage of the fuel cell. This paper presents the methods and results of the calculation of the efficiency and the expense for the realization for the circuits of the DC/DC-converter that meet these requirements.

Keywords: DC/DC-converter, calculation, efficiency, fuel cell.

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