Search results for: shorted circuit
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 562

Search results for: shorted circuit

232 Void-Free Bonding of Si/Ti/Ni Power Integrated Circuit Chips with Direct Bonding Copper Alumina Substrates through Ag3Sn Intermetallic Interlayer

Authors: Kuan-Yu Chiu, Yin-Hsuan Chen, Tung-Han Chuang

Abstract:

Ti/Ni/Ag/Sn-metallized Si chips were bonded to Ni/Pd/Au-surface finished DBC (Direct Bonding Copper) alumina substrate through the formation of an Ag3Sn intermetallic interlayer by solid–liquid interdiffusion bonding method. The results indicated that the holes and gaps at the bonding interface could be effectively prevented. The intermetallic phases at the bonding interface between the Si/Ti/Ni/Ag/Sn wafer and the DBC substrate were identified as Ag3Sn, Ni3Sn4, and Ni3Sn2. The average bonding strength was about 19.75 MPa, and the maximum bonding strength reached 35.24 MPa.

Keywords: BGBM, Backside Grinding and Backside Metallization, SLID bonding, Solid–liquid Interdiffusion Bonding, Si/Ti/Ni/Sn, Si/Ti/Ni/Ag/Sn, intermetallic compound.

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231 Investigation of Chaotic Behavior in DC-DC Converters

Authors: Sajid Iqbal, Masood Ahmed, Suhail Aftab Qureshi

Abstract:

DC-DC converters are widely used in regulated switched mode power supplies and in DC motor drive applications. There are several sources of unwanted nonlinearity in practical power converters. In addition, their operation is characterized by switching that gives birth to a variety of nonlinear dynamics. DC-DC buck and boost converters controlled by pulse-width modulation (PWM) have been simulated. The voltage waveforms and attractors obtained from the circuit simulation have been studied. With the onset of instability, the phenomenon of subharmonic oscillations, quasi-periodicity, bifurcations, and chaos have been observed. This paper is mainly motivated by potential contributions of chaos theory in the design, analysis and control of power converters, in particular and power electronics circuits, in general.

Keywords: Buck converter, boost converter, period- doubling, chaos, bifurcation, strange attractor.

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230 Modeling and Simulation of PSM DC-DC Buck Converter

Authors: Ramamurthy S, Vanaja Ranjan P

Abstract:

A DC-to-DC converter for applications involving a source with widely varying voltage conditions with loads requiring constant voltage from full load down to no load is presented. The switching regulator considered is a Buck converter with Pulse Skipping Modulation control whereby pulses applied to the switch are blocked or released on output voltage crossing a predetermined value. Results of the study on the performance of regulator circuit are presented. The regulator regulates over a wide input voltage range with slightly higher ripple content and good transient response. Input current spectrum indicates a good EMI performance with crowding of components at low frequency range.

Keywords: DC/DC Converter, Pulse Skipping Modulation, Buckregulator, Modulation Factor, Electromagnetic Interference

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229 Electrical Properties of n-CdO/p-Si Heterojunction Diode Fabricated by Sol Gel

Authors: S.Aksoy, Y.Caglar

Abstract:

n-CdO/p-Si heterojunction diode was fabricated using sol-gel spin coating technique which is a low cost and easily scalable method for preparing of semiconductor films. The structural and morphological properties of CdO film were investigated. The X-ray diffraction (XRD) spectra indicated that the film was of polycrystalline nature. The scanning electron microscopy (SEM) images indicate that the surface morphology CdO film consists of the clusters formed with the coming together of the nanoparticles. The electrical characterization of Au/n-CdO/p–Si/Al heterojunction diode was investigated by current-voltage. The ideality factor of the diode was found to be 3.02 for room temperature. The reverse current of the diode strongly increased with illumination intensity of 100 mWcm-2 and the diode gave a maximum open circuit voltage Voc of 0.04 V and short-circuits current Isc of 9.92×10-9 A.

Keywords: CdO, heterojunction semiconductor devices, ideality factor, current-voltage characteristics

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228 Multi-board Run-time Reconfigurable Implementation of Intrinsic Evolvable Hardware

Authors: Cyrille Lambert, Tatiana Kalganova, Emanuele Stomeo, Manissa Wilson

Abstract:

A multi-board run-time reconfigurable (MRTR) system for evolvable hardware (EHW) is introduced with the aim to implement on hardware the bidirectional incremental evolution (BIE) method. The main features of this digital intrinsic EHW solution rely on the multi-board approach, the variable chromosome length management and the partial configuration of the reconfigurable circuit. These three features provide a high scalability to the solution. The design has been written in VHDL with the concern of not being platform dependant in order to keep a flexibility factor as high as possible. This solution helps tackling the problem of evolving complex task on digital configurable support.

Keywords: Evolvable Hardware, Evolutionary Strategy, multiboardFPGA system.

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227 Simulation of a Boost PFC Converter with Electro Magnetic Interference Filter

Authors: P. Ram Mohan, M. Vijaya Kumar, O. V. Raghava Reddy

Abstract:

This paper deals with the simulation of a Boost Power Factor Correction (PFC) Converter with Electro Magnetic Interference (EMI) Filter. The diode rectifier with output capacitor gives poor power factor. The Boost Converter of PFC Circuit is analyzed and then simulated with diode rectifier. The Boost PFC Converter with EMI Filter is simulated for resistive load. The power factor is improved using the proposed converter.

Keywords: Boost Converter, Power Factor Correction, Electro Magnetic Interference, Diode Rectifier

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226 Internal Node Stabilization for Voltage Sense Amplifiers in Multi-Channel Systems

Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn

Abstract:

This paper discusses the undesirable charge transfer by the parasitic capacitances of the input transistors in a voltage sense amplifier. Due to its intrinsic rail-to-rail voltage transition, the input sides are inevitably disturbed. It can possible disturb the stabilities of the reference voltage levels. Moreover, it becomes serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the systems. In order to alleviate the internal node voltage transition, the internal node stabilization technique is proposed by utilizing an additional biasing circuit. It achieves 47% and 43% improvements for node stabilization and input referred disturbance, respectively.

Keywords: Voltage sense amplifier, voltage transition, node stabilization, and biasing circuits.

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225 A New Method Presentation for Fault Location in Power Transformers

Authors: Hossein Mohammadpour, Rahman Dashti

Abstract:

Power transformers are among the most important and expensive equipments in the electric power systems. Consequently the transformer protection is an essential part of the system protection. This paper presents a new method for locating transformer winding faults such as turn-to-turn, turn-to-core, turn-totransformer body, turn-to-earth, and high voltage winding to low voltage winding. In this study the current and voltage signals of input and output terminals of the transformer are measured, which the Fourier transform of measured signals and harmonic analysis determine the fault's location.

Keywords: turn-to-turn faults, short circuit, Fourier transform, harmonic analysis.

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224 130 nm CMOS Mixer and VCO for 2.4 GHz Low-power Wireless Personal Area Networks

Authors: Gianluca Cornetta, David J. Santos

Abstract:

This paper describes a 2.4 GHz passive switch mixer and a 5/2.5 GHz voltage-controlled negative Gm oscillator (VCO) with an inversion-mode MOS varactor. Both circuits are implemented using a 1P8M 0.13 μm process. The switch mixer has an input referred 1 dB compression point of -3.89 dBm and a conversion gain of -0.96 dB when the local oscillator power is +2.5 dBm. The VCO consumes only 1.75 mW, while drawing 1.45 mA from a 1.2 V supply voltage. In order to reduce the passives size, the VCO natural oscillation frequency is 5 GHz. A clocked CMOS divideby- two circuit is used for frequency division and quadrature phase generation. The VCO has a -109 dBc/Hz phase noise at 1 MHz frequency offset and a 2.35-2.5 GHz tuning range (after the frequency division), thus complying with ZigBee requirements.

Keywords: Switch Mixers, Varactors, IEEE 802.15.4 (ZigBee), Direct Conversion Receiver, Wireless Sensor Networks.

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223 Reliability Analysis in Electrical Distribution System Considering Preventive Maintenance Applications on Circuit Breakers

Authors: Mahmud Fotuhi-Firuzabad, Saeed Afshar

Abstract:

This paper presents the results of a preventive maintenance application-based study and modeling of failure rates in breakers of electrical distribution systems. This is a critical issue in the reliability assessment of a system. In the analysis conducted in this paper, the impacts of failure rate variations caused by a preventive maintenance are examined. This is considered as a part of a Reliability Centered Maintenance (RCM) application program. A number of load point reliability indices is derived using the mathematical model of the failure rate, which is established using the observed data in a distribution system.

Keywords: Reliability-Centered Maintenance (RCM), failure rate, preventive maintenance (PM), Distribution System Reliability.

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222 Research on Axial End Flux Leakage and Detent Force of Transverse Flux PM Linear Machine

Authors: W. R. Li, J. K. Xia, R. Q. Peng, Z. Y. Guo, L. Jiang

Abstract:

According to 3D magnetic circuit of the transverse flux PM linear machine, distribution law is presented, and analytical expression of axial end flux leakage is derived using numerical method. Maxwell stress tensor is used to solve detent force of mover. A 3D finite element model of the transverse flux PM machine is built to analyze the flux distribution and detent force. Experimental results of the prototype verified the validity of axial end flux leakage and detent force theoretical derivation, the research on axial end flux leakage and detent force provides a valuable reference to other types of linear machine.

Keywords: Transverse flux PM linear machine, flux distribution, axial end flux leakage, detent force.

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221 Improved Pattern Matching Applied to Surface Mounting Devices Components Localization on Automated Optical Inspection

Authors: Pedro M. A. Vitoriano, Tito. G. Amaral

Abstract:

Automated Optical Inspection (AOI) Systems are commonly used on Printed Circuit Boards (PCB) manufacturing. The use of this technology has been proven as highly efficient for process improvements and quality achievements. The correct extraction of the component for posterior analysis is a critical step of the AOI process. Nowadays, the Pattern Matching Algorithm is commonly used, although this algorithm requires extensive calculations and is time consuming. This paper will present an improved algorithm for the component localization process, with the capability of implementation in a parallel execution system.

Keywords: AOI, automated optical inspection, SMD, surface mounting devices, pattern matching, parallel execution.

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220 Switched Reluctance Generator for Wind Power Applications

Authors: M. Nassereddine, J. Rizk, M. Nagrial

Abstract:

Green house effect has becomes a serious concern in many countries due to the increase consumption of the fossil fuel. There have been many studies to find an alternative power source. Wind energy found to be one of the most useful solutions to help in overcoming the air pollution and global. There is no agreed solution to conversion of wind energy to electrical energy. In this paper, the advantages of using a Switched Reluctance Generator (SRG) for wind energy applications. The theoretical study of the self excitation of a SRG and the determination of the variable parameters in a SRG design are discussed. The design parameters for the maximum power output of the SRG are computed using Matlab simulation. The designs of the circuit to control the variable parameters in a SRG to provide the maximum power output are also discussed.

Keywords: Switched Reluctance Generator, Wind Power, Electrical Machines.

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219 Batteryless DCM Boost Converter for Kinetic Energy Harvesting Applications

Authors: Andrés Gomez-Casseres, Rubén Contreras

Abstract:

In this paper, a bidirectional boost converter operated in Discontinuous Conduction Mode (DCM) is presented as a suitable power conditioning circuit for tuning of kinetic energy harvesters without the need of a battery. A nonlinear control scheme, composed by two linear controllers, is used to control the average value of the input current, enabling the synthesization of complex loads. The converter, along with the control system, is validated through SPICE simulations using the LTspice tool. The converter model and the controller transfer functions are derived. From the simulation results, it was found that the input current distortion increases with the introduced phase shift and that, such distortion, is almost entirely present at the zero-crossing point of the input voltage.

Keywords: Average current control, boost converter, electrical tuning, energy harvesting.

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218 The Influence of Voltage Flicker for the Wind Generator upon Distribution System

Authors: Jin-Lung Guan, Jyh-Cherng Gu, Ming-Ta Yang, Hsin-Hung Chang, Chun-Wei Huang, Shao-Yu Huang

Abstract:

One of the most important power quality issues is voltage flicker. Nowadays this issue also impacts the power system all over the world. The fact of the matter is that the more and the larger capacity of wind generator has been installed. Under unstable wind power situation, the variation of output current and voltage have caused trouble to voltage flicker. Hence, the major purpose of this study is to analyze the impact of wind generator on voltage flicker of power system. First of all, digital simulation and analysis are carried out based on wind generator operating under various system short circuit capacity, impedance angle, loading, and power factor of load. The simulation results have been confirmed by field measurements.

Keywords: Wind Generator, Voltage Flicker

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217 Design of Permanent Sensor Fault Tolerance Algorithms by Sliding Mode Observer for Smart Hybrid Powerpack

Authors: Sungsik Jo, Hyeonwoo Kim, Iksu Choi, Hunmo Kim

Abstract:

In the SHP, LVDT sensor is for detecting the length changes of the EHA output, and the thrust of the EHA is controlled by the pressure sensor. Sensor is possible to cause hardware fault by internal problem or external disturbance. The EHA of SHP is able to be uncontrollable due to control by feedback from uncertain information, on this paper; the sliding mode observer algorithm estimates the original sensor output information in permanent sensor fault. The proposed algorithm shows performance to recovery fault of disconnection and short circuit basically, also the algorithm detect various of sensor fault mode.

Keywords: Smart Hybrid Powerpack (SHP), Electro Hydraulic Actuator (EHA), Permanent Sensor fault tolerance, Sliding mode observer (SMO), Graphic User Interface (GUI).

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216 EHW from Consumer Point of View: Consumer-Triggered Evolution

Authors: Yerbol Sapargaliyev, Tatiana Kalganova

Abstract:

Evolvable Hardware (EHW) has been regarded as adaptive system acquired by wide application market. Consumer market of any good requires diversity to satisfy consumers- preferences. Adaptation of EHW is a key technology that could provide individual approach to every particular user. This situation raises a question: how to set target for evolutionary algorithm? The existing techniques do not allow consumer to influence evolutionary process. Only designer at the moment is capable to influence the evolution. The proposed consumer-triggered evolution overcomes this problem by introducing new features to EHW that help adaptive system to obtain targets during consumer stage. Classification of EHW is given according to responsiveness, imitation of human behavior and target circuit response. Home intelligent water heating system is considered as an example.

Keywords: Actuators, consumer-triggered evolution, evolvable hardware, sensors.

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215 Design of Folded Cascode OTA in Different Regions of Operation through gm/ID Methodology

Authors: H. Daoud Dammak, S. Bensalem, S. Zouari, M. Loulou

Abstract:

This paper presents an optimized methodology to folded cascode operational transconductance amplifier (OTA) design. The design is done in different regions of operation, weak inversion, strong inversion and moderate inversion using the gm/ID methodology in order to optimize MOS transistor sizing. Using 0.35μm CMOS process, the designed folded cascode OTA achieves a DC gain of 77.5dB and a unity-gain frequency of 430MHz in strong inversion mode. In moderate inversion mode, it has a 92dB DC gain and provides a gain bandwidth product of around 69MHz. The OTA circuit has a DC gain of 75.5dB and unity-gain frequency limited to 19.14MHZ in weak inversion region.

Keywords: CMOS IC design, Folded Cascode OTA, gm/ID methodology, optimization.

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214 FPGA Implementation of the “PYRAMIDS“ Block Cipher

Authors: A. AlKalbany, H. Al hassan, M. Saeb

Abstract:

The “PYRAMIDS" Block Cipher is a symmetric encryption algorithm of a 64, 128, 256-bit length, that accepts a variable key length of 128, 192, 256 bits. The algorithm is an iterated cipher consisting of repeated applications of a simple round transformation with different operations and different sequence in each round. The algorithm was previously software implemented in Cµ code. In this paper, a hardware implementation of the algorithm, using Field Programmable Gate Arrays (FPGA), is presented. In this work, we discuss the algorithm, the implemented micro-architecture, and the simulation and implementation results. Moreover, we present a detailed comparison with other implemented standard algorithms. In addition, we include the floor plan as well as the circuit diagrams of the various micro-architecture modules.

Keywords: FPGA, VHDL, micro-architecture, encryption, cryptography, algorithm, data communication security.

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213 A Novel Zero Voltage Transition Synchronous Buck Converter for Portable Application

Authors: S. Pattnaik, A. K. Panda, Aroul K., K. K. Mahapatra

Abstract:

This paper proposes a zero-voltage transition (ZVT) PWM synchronous buck converter, which is designed to operate at low output voltage and high efficiency typically required for portable systems. To make the DC-DC converter efficient at lower voltage, synchronous converter is an obvious choice because of lower conduction loss in the diode. The high-side MOSFET is dominated by the switching losses and it is eliminated by the soft switching technique. Additionally, the resonant auxiliary circuit designed is also devoid of the switching losses. The suggested procedure ensures an efficient converter. Theoretical analysis, computer simulation, and experimental results are presented to explain the proposed schemes.

Keywords: DC-DC Converter, Switching loss, Synchronous Buck, Soft switching, ZVT.

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212 ZVZCT PWM Boost DC-DC Converter

Authors: İsmail Aksoy, Hacı Bodur, Nihan Altıntas

Abstract:

This paper introduces a boost converter with a new active snubber cell. In this circuit, all of the semiconductor components in the converter softly turns on and turns off with the help of the active snubber cell. Compared to the other converters, the proposed converter has advantages of size, number of components and cost. The main feature of proposed converter is that the extra voltage stresses do not occur on the main switches and main diodes. Also, the current stress on the main switch is acceptable level. Moreover, the proposed converter can operates under light load conditions and wide input line voltage. In this study, the operating principle of the proposed converter is presented and its operation is verified with the Proteus simulation software for a 1 kW and 100 kHz model.

Keywords: Active snubber cell, boost converter, zero current switching, zero voltage switching.

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211 Implementation and Simulation of Half-Bridge Series Resonant Inverter in Zero Voltage Switching

Authors: Buket Turan Azizoğlu

Abstract:

In switch mode power inverters, small sized inverters can be obtained by increasing the switching frequency. Switching frequency increment causes high driver losses. Also, high dt di and dt dv produced by the switching action creates high Electromagnetic Interference (EMI) and Radio Frequency Interference (RFI). In this paper, a series half bridge series resonant inverter circuit is simulated and evaluated practically to demonstrate the turn-on and turn-off conditions during zero or close to zero voltage switching. Also, the reverse recovery current effects of the body diode of the MOSFETs were investigated by operating above and below resonant frequency.

Keywords: Driver losses, Half Bridge series resonant inverter, Zero Voltage Switching

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210 The Design of PFM Mode DC-DC Converter with DT-CMOS Switch

Authors: Jae-Chang Kwak, Yong-Seo Koo

Abstract:

The high efficiency power management IC (PMIC) with switching device is presented in this paper. PMIC is controlled with PFM control method in order to have high power efficiency at high current level. Dynamic Threshold voltage CMOS (DT-CMOS) with low on-resistance is designed to decrease conduction loss. The threshold voltage of DT-CMOS drops as the gate voltage increase, resulting in a much higher current handling capability than standard MOSFET. PFM control circuits consist of a generator, AND gate and comparator. The generator is made to have 1.2MHz oscillation voltage. The DC-DC converter based on PFM control circuit and low on-resistance switching device is presented in this paper.

Keywords: DT-CMOS, PMIC, PFM, DC-DC converter.

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209 Conceptual Design of a Wi-Fi and GPS Based Robotic Library Using an Intelligent System

Authors: M. S. Sreejith, Steffy Joy, Abhishesh Pal, Beom-Sahng Ryuh, V. R. Sanal Kumar

Abstract:

In this paper, an attempt has been made for the design of a robotic library using an intelligent system. The robot works on the ARM microprocessor, motor driver circuit with 5 degrees of freedom with Wi-Fi and GPS based communication protocol. The authenticity of the library books is controlled by RFID. The proposed robotic library system is facilitated with embedded system and ARM. In this library issuance system, the previous potential readers’ authentic review reports have been taken into consideration for recommending suitable books to the deserving new users and the issuance of books or periodicals is based on the users’ decision. We have conjectured that the Wi-Fi based robotic library management system would allow fast transaction of books issuance and it also produces quality readers.

Keywords: GPS based based robotic library, library management system, robotic library, Wi-Fi library.

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208 Analytical Modeling of Channel Noise for Gate Material Engineered Surrounded/Cylindrical Gate (SGT/CGT) MOSFET

Authors: Pujarini Ghosh A, Rishu Chaujar B, Subhasis Haldar C, R.S Gupta D, Mridula Gupta E

Abstract:

In this paper, an analytical modeling is presentated to describe the channel noise in GME SGT/CGT MOSFET, based on explicit functions of MOSFETs geometry and biasing conditions for all channel length down to deep submicron and is verified with the experimental data. Results shows the impact of various parameters such as gate bias, drain bias, channel length ,device diameter and gate material work function difference on drain current noise spectral density of the device reflecting its applicability for circuit design applications.

Keywords: Cylindrical/Surrounded gate (SGT/CGT) MOSFET, Gate Material Engineering (GME), Spectral Noise and short channeleffect (SCE).

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207 Experimental and Numerical Studies of Drag Reduction on a Circular Cylinder

Authors: A.O. Ladjedel, B.T.Yahiaoui, C.L.Adjlout, D.O.Imine

Abstract:

In the present paper; an experimental and numerical investigations of drag reduction on a grooved circular cylinder have been performed. The experiments were carried out in closed circuit subsonic wind tunnel (TE44); the pressure distribution on the cylinder was conducted using a TE44DPS differential pressure scanner and the drag forces were measured using the TE81 balance. The display unit is linked to a computer, loaded with DATASLIM software for data analysis and logging of result. The numerical study was performed using the code ANSYS FLUENT solving the Reynolds Averaged Navier-Stokes (RANS) equations. The k-ε and k- ω SST models were tested. The results obtained from the experimental and numerical investigations have showed a reduction in the drag when using longitudinal grooves namely 2 and 6 on the cylinder.

Keywords: Circular cylinder, Drag, grooves, pressure distribution

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206 Hand Motion and Gesture Control of Laboratory Test Equipment Using the Leap Motion Controller

Authors: Ian A. Grout

Abstract:

In this paper, the design and development of a system to provide hand motion and gesture control of laboratory test equipment is considered and discussed. The Leap Motion controller is used to provide an input to control a laboratory power supply as part of an electronic circuit experiment. By suitable hand motions and gestures, control of the power supply is provided remotely and without the need to physically touch the equipment used. As such, it provides an alternative manner in which to control electronic equipment via a PC and is considered here within the field of human computer interaction (HCI).

Keywords: Control, hand gesture, human computer interaction, test equipment.

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205 Fast and Efficient On-Chip Interconnection Modeling for High Speed VLSI Systems

Authors: A.R. Aswatha, T. Basavaraju, S. Sandeep Kumar

Abstract:

Timing driven physical design, synthesis, and optimization tools need efficient closed-form delay models for estimating the delay associated with each net in an integrated circuit (IC) design. The total number of nets in a modern IC design has increased dramatically and exceeded millions. Therefore efficient modeling of interconnection is needed for high speed IC-s. This paper presents closed–form expressions for RC and RLC interconnection trees in current mode signaling, which can be implemented in VLSI design tool. These analytical model expressions can be used for accurate calculation of delay after the design clock tree has been laid out and the design is fully routed. Evaluation of these analytical models is several orders of magnitude faster than simulation using SPICE.

Keywords: IC design, RC/RLC Interconnection, VLSI Systems.

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204 Compensation Method Eliminating Voltage Distortions in PWM Inverter

Authors: H. Sediki, S. Djennoune

Abstract:

The switching lag-time and the voltage drop across the power devices cause serious waveform distortions and fundamental voltage drop in pulse width-modulated inverter output. These phenomenons are conspicuous when both the output frequency and voltage are low. To estimate the output voltage from the PWM reference signal it is essential to take account of these imperfections and to correct them. In this paper, on-line compensation method is presented. It needs three simple blocs to add at the ideal reference voltages. This method does not require any additional hardware circuit and off- line experimental measurement. The paper includes experimental results to demonstrate the validity of the proposed method. It is applied, finally, in case of indirect vector controlled induction machine and implemented using dSpace card.

Keywords: Dead time, field-oriented control, Induction motor, PWM inverter, voltage drop.

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203 Practical Simulation Model of Floating-Gate MOS Transistor in Sub 100nm Technologies

Authors: Zina Saheb, Ezz El-Masry

Abstract:

As the Silicon oxide scaled down in MOSFET technology to few nanometers, gate Direct Tunneling (DT) in Floating gate (FGMOSFET) devices has become a major concern for analog designers. FGMOSFET has been used in many low-voltage and low-power applications, however, there is no accurate model that account for DT gate leakage in nano-scale. This paper studied and analyzed different simulation models for FGMOSFET using TSMC 90-nm technology. The simulation results for FGMOSFET cascade current mirror shows the impact of DT on circuit performance in terms of current and voltage without the need for fabrication. This works shows the significance of using an accurate model for FGMOSFET in nan-scale technologies.

Keywords: CMOS transistor, direct-tunneling current, floatinggate, gate-leakage current, simulation model.

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