Search results for: tuning circuit

Authors: Wook-Won Kim, Sung-Yul Kim, Jin-O Kim

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The fault current levels through the electric devices have a significant impact on failure probability. New fault current results in exceeding the rated capacity of circuit breaker and switching equipments and changes operation characteristic of overcurrent relay. In order to solve these problems, SFCL (Superconducting Fault Current Limiter) has rising as one of new alternatives so as to improve these problems. A fault current reduction differs depending on installed location. Therefore, a location of SFCL is very important. Also, SFCL decreases the fault current, and it prevents surrounding protective devices to be exposed to fault current, it then will bring a change of reliability. In this paper, we propose method which determines the optimal location when SFCL is installed in power system. In addition, the reliability about the power system which SFCL was installed is evaluated. The efficiency and effectiveness of this method are also shown by numerical examples and the reliability indices are evaluated in this study at each load points. These results show a reliability change of a system when SFCL was installed.

Keywords: Superconducting Fault Current Limiter, OptimalLocation, Reliability

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Authors: Muhammad H. Rais,

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Truncated multiplier is a good candidate for digital signal processing (DSP) applications including finite impulse response (FIR) and discrete cosine transform (DCT). Through truncated multiplier a significant reduction in Field Programmable Gate Array (FPGA) resources can be achieved. This paper presents for the first time a comparison of resource utilization of Spartan-3AN and Virtex-5 implementation of standard and truncated multipliers using Very High Speed Integrated Circuit Hardware Description Language (VHDL). The Virtex-5 FPGA shows significant improvement as compared to Spartan-3AN FPGA device. The Virtex-5 FPGA device shows better performance with a percentage ratio of number of occupied slices for standard to truncated multipliers is increased from 40% to 73.86% as compared to Spartan- 3AN is decreased from 68.75% to 58.78%. Results show that the anomaly in Spartan-3AN FPGA device average connection and maximum pin delay have been efficiently reduced in Virtex-5 FPGA device.

Keywords: Digital Signal Processing (DSP), FieldProgrammable Gate Array (FPGA), Spartan-3AN, TruncatedMultiplier, Virtex-5, VHDL.

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Authors: Guo-Ming Sung, Naga Raju Naik R.

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Paper presents a low power, high speed, sense-amplifier based flip-flop (SAFF). The flip-flop’s power con-sumption and delay are greatly reduced by employing a new conditionally precharge sense-amplifier stage and a single-ended latch stage. Glitch-free and contention-free latch operation is achieved by using a conditional cut-off strategy. The design uses fewer transistors, has a lower clock load, and has a simple structure, all of which contribute to a near-zero setup time. When compared to previous flip-flop structures proposed for similar input/output conditions, this design’s performance and overall PDP have improved. The post layout simulation of the circuit uses 2.91µW of power and has a delay of 65.82 ps. Overall, the power-delay product has seen some enhancements. Cadence Virtuoso Designing tool with CMOS 90nm technology are used for all designs.

Keywords: high-speed, low-power, flip-flop, sense-amplifier

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Authors: Wisuwat Plodpradista

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Tubular linear induction motor (TLIM) can be used as a capsule pump in a large pneumatic capsule pipeline (PCP) system. Parametric performance evaluation of the designed 1-meter diameter PCP-TLIM system yields encouraging results for practical implementation. The capsule thrust and speed inside the TLIM pump can be calculated from the combination of the PCP fluid mechanics and the TLIM equations. The TLIM equivalent circuits derived from those of the conventional three-phase induction motor are used as a model to predict the static test results of a small-scale PCP-TLIM system. In this paper, additional dynamic tests are performed on the same small-scale PCP-TLIM system with two capsules of different diameters. The behaviors of the capsule inside the pump are observed and analyzed. The dynamic performances from the dynamic tests are compared with the theoretical predictions based on the TLIM equivalent circuit model.

Keywords: Pneumatic capsule pipeline, Tubular linear induction motor

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Authors: M. Sedighizadeh, A. Rezazadeh

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In this paper presents a technique for developing the computational efficiency in simulating double output induction generators (DOIG) with two rotor circuits where stator transients are to be included. Iterative decomposition is used to separate the flux– Linkage equations into decoupled fast and slow subsystems, after which the model order of the fast subsystems is reduced by neglecting the heavily damped fast transients caused by the second rotor circuit using integral manifolds theory. The two decoupled subsystems along with the equation for the very slowly changing slip constitute a three time-scale model for the machine which resulted in increasing computational speed. Finally, the proposed method of reduced order in this paper is compared with the other conventional methods in linear and nonlinear modes and it is shown that this method is better than the other methods regarding simulation accuracy and speed.

Keywords: DOIG, Iterative separation, Integral manifolds, Reduced order.

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Authors: Rahim Sotoudeh Bahreini, Alireza Foroughi Nematollahi, Akbar Jafari

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This study investigates the mechanism of a Gyratory crusher-located in Golgohar mining and industrial Co. specifically with a focus on stresses distribution and fatigue failure of its main shaft. At first step, the cross section of the fractured shaft is studied, and the crack growth is analyzed. Then, the rotational motion of the shaft and the oil temperature of oil circuit of equipment are monitored. Condition monitoring is used to help finding a better modification. Based on the results of this study, the main causes of shaft failure are identified, and corrective solution is offered to increase crusher performance, especially its main shaft life. To predict the efficiency of the proposed modification, finite element simulation is performed, and its results are compared with the similar modified cases. The comparison and interpretation of simulation results confirm the efficiency of proposed corrective method.

Keywords: Fatigue failure, finite element method, gyratory crusher, condition monitoring.

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Authors: Ionel Zagan, Vasile Gheorghita Gaitan

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The development of CPUs and of real-time systems based on them made it possible to use time at increasingly low resolutions. Together with the scheduling methods and algorithms, time organizing has been improved so as to respond positively to the need for optimization and to the way in which the CPU is used. This presentation contains both a detailed theoretical description and the results obtained from research on improving the performances of the nMPRA (Multi Pipeline Register Architecture) processor by implementing specific functions in hardware. The proposed CPU architecture has been developed, simulated and validated by using the FPGA Virtex-7 circuit, via a SoC project. Although the nMPRA processor hardware structure with five pipeline stages is very complex, the present paper presents and analyzes the tests dedicated to the implementation of the CPU and of the memory on-chip for instructions and data. In order to practically implement and test the entire SoC project, various tests have been performed. These tests have been performed in order to verify the drivers for peripherals and the boot module named Bootloader.

Keywords: Hardware scheduler, nMPRA processor, real-time systems, scheduling methods.

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Authors: Ankit Sinha, Soham Banerjee, Pratik Chattopadhyay

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Automated product recognition in retail stores is an important real-world application in the domain of Computer Vision and Pattern Recognition. In this paper, we consider the problem of automatically identifying the classes of the products placed on racks in retail stores from an image of the rack and information about the query/product images. We improve upon the existing approaches in terms of effectiveness and memory requirement by developing a two-stage object detection and recognition pipeline comprising of a Faster-RCNN-based object localizer that detects the object regions in the rack image and a ResNet-18-based image encoder that classifies  the detected regions into the appropriate classes. Each of the models is fine-tuned using appropriate data sets for better prediction and data augmentation is performed on each query image to prepare an extensive gallery set for fine-tuning the ResNet-18-based product recognition model. This encoder is trained using a triplet loss function following the strategy of online-hard-negative-mining for improved prediction. The proposed models are lightweight and can be connected in an end-to-end manner during deployment to automatically identify each product object placed in a rack image. Extensive experiments using Grozi-32k and GP-180 data sets verify the effectiveness of the proposed model.

Keywords: Retail stores, Faster-RCNN, object localization, ResNet-18, triplet loss, data augmentation, product recognition.

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Authors: M. Fadlallah, G. Ghibaudo, C. G. Theodorou

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The dynamic variation in memory devices such as the Static Random Access Memory can give errors in read or write operations. In this paper, the effect of low-frequency and random telegraph noise on the dynamic variation of one SRAM cell is detailed. The effect on circuit noise, speed, and length of time of processing is examined, using the Supply Read Retention Voltage and the Read Static Noise Margin. New test run methods are also developed. The obtained results simulation shows the importance of noise caused by dynamic variation, and the impact of Random Telegraph noise on SRAM variability is examined by evaluating the statistical distributions of Random Telegraph noise amplitude in the pull-up, pull-down. The threshold voltage mismatch between neighboring cell transistors due to intrinsic fluctuations typically contributes to larger reductions in static noise margin. Also the contribution of each of the SRAM transistor to total dynamic variation has been identified.

Keywords: Low-frequency noise, Random Telegraph Noise, Dynamic Variation, SRRV.

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Authors: Mohamed Zellagui, Abdelaziz Chaghi

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This paper presents the impact study of apparent reactance injected by series Flexible AC Transmission System (FACTS) i.e. Thyristor Controlled Series Reactor (TCSR) on the measured impedance of a 400 kV single electrical transmission line in the presence of phase to earth fault with fault resistance. The study deals with an electrical transmission line of Eastern Algerian transmission networks at Group Sonelgaz (Algerian Company of Electrical and Gas) compensated by TCSR connected at midpoint of the line. This compensator used to inject active and reactive powers is controlled by three TCSR-s. The simulations results investigate the impacts of the TCSR on the parameters of short circuit calculation and parameters of measured impedance by distance relay in the presence of earth fault for three cases study.

Keywords: TCSR, Transmission line, Apparent reactance, Earth fault, Symmetrical components, Distance protection, Measured impedance.

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Authors: Jun Sung Go, Jong Kang Park, Jong Tae Kim

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As semi-conductor manufacturing technology evolves; the single event transient problem becomes more significant issue. Single event transient has a critical impact on both combinational and sequential logic circuits, so it is important to evaluate the soft error tolerance of the circuits at the design stage. In this paper, we present a soft error detecting simulation using scan chain. The simulation model generates a single event transient randomly in the circuit, and detects the soft error during the execution of the test patterns. We verified this model by inserting a scan chain in an 8051 microprocessor using 65 nm CMOS technology. While the test patterns generated by ATPG program are passing through the scan chain, we insert a single event transient and detect the number of soft errors per sub-module. The experiments show that the soft error rates per cell area of the SFR module is 277% larger than other modules.

Keywords: Scan chain, single event transient, soft error, 8051 processor.

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Authors: Kemal Tutuncu, Recai Ozcan

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Having done in this study, air-conditioning automation for patisserie shopwindow was designed. In the cooling sector it is quite important to cooling up the air temperature in the shopwindow within short time interval. Otherwise the patisseries inside of the shopwindow will be spoilt in a few days. Additionally the humidity is other important parameter for the patisseries kept in shopwindow. It must be raised up to desired level in a quite short time. Traditional patisserie shopwindows only allow controlling temperature manually. There is no humidity control and humidity is supplied by fans that are directed to the water at the bottom of the shopwindows. In this study, humidity and temperature sensors (SHT11), PIC, AC motor controller, DC motor controller, ultrasonic nebulizer and other electronic circuit members were used to simulate air conditioning automation for patisserie shopwindow in proteus software package. The simulation results showed that temperature and humidity values are adjusted in desired time duration by openloop control technique. Outer and inner temperature and humidity values were used for control mechanism.

Keywords: Air conditioning automation, temperature and humidity, SHT11, AC motor controller, open-loop control.

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Authors: P. V. V. Rama Rao, B. Kali Prasanna, Y. T. R. Palleswari

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Renewable energy is derived from natural processes that are replenished constantly. Included in the definition is electricity and heat generated from solar, wind, ocean, hydropower, biomass, geothermal resources, and bio-fuels and hydrogen derived from renewable resources. Each of these sources has unique characteristics which influence how and where they are used. This paper presents the modeling the simulation of solar and hydro hybrid energy sources in MATLAB/SIMULINK environment. It simulates all quantities of Hybrid Electrical Power system (HEPS) such as AC output current of the inverter that injected to the load/grid, load current, grid current. It also simulates power output from PV and Hydraulic Turbine Generator (HTG), power delivered to or from grid and finally power factor of the inverter for PV, HTG and grid. The proposed circuit uses instantaneous p-q (real-imaginary) power theory.

Keywords: Photovoltaic Array, Hydraulic Turbine Generator, Electrical Utility (EU), Hybrid Electrical Power Supply.

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Authors: Malik I. Al-Amayreh, Mohammad I. Kilani, Ahmed S. Al-Salaymeh

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This work presents a Computational Fluid Dynamics (CFD) simulation of a butterfly valve used to control the flow of combustible gas mixture in an industrial process setting.The work uses CFD simulation to analyze the flow characteristics in the vicinity of the valve, including the pressure distributions and Frequency spectrum of the pressure pulsations downstream the valves and the vortex shedding allow predicting the torque fluctuations acting on the valve shaft and the possibility of generating mechanical vibration and resonance.These fluctuations are due to aerodynamic torque resulting from fluid turbulence and vortex shedding in the valve vicinity. The valve analyzed is located in a pipeline between two opposing 90o elbows, which exposes the valve and the surrounding structure to the turbulence generated upstream and downstream the elbows at either end of the pipe.CFD simulations show that the best location for the valve from a vibration point of view is in the middle of the pipe joining the elbows.

Keywords: Butterfly Valve Vibration Analysis, Computational Fluid Dynamics, Fluid Flow Circuit Design, Fluid Mechanics.

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Authors: Ionel Zagan, Vasile Gheorghita Gaitan

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Minimizing the response time to asynchronous events in a real-time system is an important factor in increasing the speed of response and an interesting concept in designing equipment fast enough for the most demanding applications. The present article will present the results regarding the validation of the nMPRA (Multi Pipeline Register Architecture) architecture using the FPGA Virtex-7 circuit. The nMPRA concept is a hardware processor with the scheduler implemented at the processor level; this is done without affecting a possible bus communication, as is the case with the other CPU solutions. The implementation of static or dynamic scheduling operations in hardware and the improvement of handling interrupts and events by the real-time executive described in the present article represent a key solution for eliminating the overhead of the operating system functions. The nMPRA processor is capable of executing a preemptive scheduling, using various algorithms without a software scheduler. Therefore, we have also presented various scheduling methods and algorithms used in scheduling the real-time tasks.

Keywords: nMPRA architecture, pipeline processor, preemptive scheduling, real-time system.

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Authors: P. Ashok, G. M. Kadhar Nawaz

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Rough set theory is used to handle uncertainty and incomplete information by applying two accurate sets, Lower approximation and Upper approximation. In this paper, the rough clustering algorithms are improved by adopting the Similarity, Dissimilarity–Similarity and Entropy based initial centroids selection method on three different clustering algorithms namely Entropy based Rough K-Means (ERKM), Similarity based Rough K-Means (SRKM) and Dissimilarity-Similarity based Rough K-Means (DSRKM) were developed and executed by yeast dataset. The rough clustering algorithms are validated by cluster validity indexes namely Rand and Adjusted Rand indexes. An experimental result shows that the ERKM clustering algorithm perform effectively and delivers better results than other clustering methods. Outlier detection is an important task in data mining and very much different from the rest of the objects in the clusters. Entropy based Rough Outlier Factor (EROF) method is seemly to detect outlier effectively for yeast dataset. In rough K-Means method, by tuning the epsilon (ᶓ) value from 0.8 to 1.08 can detect outliers on boundary region and the RKM algorithm delivers better results, when choosing the value of epsilon (ᶓ) in the specified range. An experimental result shows that the EROF method on clustering algorithm performed very well and suitable for detecting outlier effectively for all datasets. Further, experimental readings show that the ERKM clustering method outperformed the other methods.

Keywords: Clustering, Entropy, Outlier, Rough K-Means, validity index.

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Authors: Ji-Hye Kim, Sung-Gaun Kim

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Electro-hydraulic power steering (EHPS) system for the fuel rate reduction and steering feel improvement is comprised of ECU including the logic which controls the steering system and BL DC motor and produces the best suited cornering force, BLDC motor, high pressure pump integrated module and basic oil-hydraulic circuit of the commercial HPS system. Electro-hydraulic system can be studied in two ways such as experimental and computer simulation. To get accurate results in experimental study of EHPS system, the real boundary management is necessary which is difficult task. And the accuracy of the experimental results depends on the preparation of the experimental setup and accuracy of the data collection. The computer simulation gives accurate and reliable results if the simulation is carried out considering proper boundary conditions. So, in this paper, each component of EHPS was modeled, and the model-based analysis and control logic was designed by using AMESim

Keywords: Power steering system, Electro-Hydraulic power steering (EHPS) system, Modeling of EHPS system, Analysis modeling.

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Authors: Nur Syarafina Binti Othman, Tsubasa Jindo, Makato Yamada, Miho Tsuyama, Hitoshi Nakano

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A novel method to produce a fast high voltage solid states switch using Insulated Gate Bipolar Transistors (IGBTs) is presented for discharge-pumped gas lasers. The IGBTs are connected in series to achieve a high voltage rating. An avalanche transistor is used as the gate driver. The fast pulse generated by the avalanche transistor quickly charges the large input capacitance of the IGBT, resulting in a switch out of a fast high-voltage pulse. The switching characteristic of fast-high voltage solid state switch has been estimated in the multi-stage series-connected IGBT with the applied voltage of several tens of kV. Electrical circuit diagram and the mythology of fast-high voltage solid state switch as well as experimental results obtained are presented.

Keywords: High voltage, IGBT, Solid states switch.

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Authors: Sunil Jadav, Rajeevan Chandel Munish Vashishath

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Today’s VLSI networks demands for high speed. And in this work the compact form mathematical model for current mode signalling in VLSI interconnects is presented.RLC interconnect line is modelled using characteristic impedance of transmission line and inductive effect. The on-chip inductance effect is dominant at lower technology node is emulated into an equivalent resistance. First order transfer function is designed using finite difference equation, Laplace transform and by applying the boundary conditions at the source and load termination. It has been observed that the dominant pole determines system response and delay in the proposed model. The novel proposed current mode model shows superior performance as compared to voltage mode signalling. Analysis shows that current mode signalling in VLSI interconnects provides 2.8 times better delay performance than voltage mode. Secondly the damping factor of a lumped RLC circuit is shown to be a useful figure of merit.

Keywords: Current Mode, Voltage Mode, VLSI Interconnect.

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Authors: Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert

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The evolution of logic circuits, which falls under the heading of evolvable hardware, is carried out by evolutionary algorithms. These algorithms are able to automatically configure reconfigurable devices. One of main difficulties in developing evolvable hardware with the ability to design functional electrical circuits is to choose the most favourable EA features such as fitness function, chromosome representations, population size, genetic operators and individual selection. Until now several researchers from the evolvable hardware community have used and tuned these parameters and various rules on how to select the value of a particular parameter have been proposed. However, to date, no one has presented a study regarding the size of the chromosome representation (circuit layout) to be used as a platform for the evolution in order to increase the evolvability, reduce the number of generations and optimize the digital logic circuits through reducing the number of logic gates. In this paper this topic has been thoroughly investigated and the optimal parameters for these EA features have been proposed. The evolution of logic circuits has been carried out by an extrinsic evolvable hardware system which uses (1+λ) evolution strategy as the core of the evolution.

Keywords: Evolvable hardware, genotype size, computational intelligence, design of logic circuits.

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Authors: Chih-Ming Wang, Chih-Yu Wen, Ying-Chung Chen, Chun-Chieh Wang, Chien-Chung Hsu, Jui-Yang Chang, Jyun-Min Lin

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In this study, we developed a complementary electrochromic device consisting of WO₃ and NiO films fabricated by rf-magnetron sputtered. The electrochromic properties of WO₃ and NiO films were investigated using cyclic voltammograms (CV), performed on WO₃ and NiO films immersed in an electrolyte of 1 M LiClO₄ in propylene carbonate (PC). Optical and electrochemical of the films, as a function of coloration–bleaching cycle, were characterized using an UV-Vis-NIR spectrophotometer and cyclic voltammetry (CV). After investigating the properties of WO₃ film, NiO film, and complementary electrochromic devices, we concluded that this device provides good reversibility, low power consumption of -2.5 V in color state, high variation of transmittance of 58.96%, changes in optical density of 0.81 and good memory effect under open-circuit conditions. In addition, electrochromic component penetration rate can be retained below 20% within 24h, showing preferred memory features; however, component coloring and bleaching response time are about 33s.

Keywords: Complementary electrochromic device, Rf-magnetron sputtered, Transmittance, Memory effect, Optical density change

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Authors: Vishal Awasthi, Krishna Raj

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Unwanted side effects because of spectral aliasing and spectral imaging during signal processing would be the major concern over the sampling rate alteration. Multirate-multistage implementation of digital filter could come about a large computational saving than single rate filter suitable for sample rate conversion. This implementation can further improve through high-level architectural transformation in circuit level. Reallocating registers and  relocating flip-flops across logic gates through retiming certainly a prominent sequential transformation technology, that optimize hardware circuits to achieve faster clocking speed without affecting the functionality. In this paper, we proposed an efficient compensated cascade Integrator comb (CIC) decimation filter structure that analyze the consequence of filter order variation which has a retimed FIR filter being compensator while using the cutset retiming technique and achieved an improvement in the passband droop by 14% to 39%, in computation time by 38.04%, 25.78%, 12.21%, 6.69% and 4.44% and reduction in path delay by 62.27%, 72%, 86.63%, 91.56% and 94.42% of 3, 6, 8, 12 and 24 order filter respectively than the non-retimed CIC compensation filter.

Keywords: Multirate Filtering, CIC decimation filter, Compensation theory, Retiming, Retiming algorithm, Filter order, Synchronous dataflow graph.

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Authors: R.K. Behera, S.Behera

Abstract:

In a wind power generator using doubly fed induction generator (DFIG), the three-phase pulse width modulation (PWM) voltage source converter (VSC) is used as grid side converter (GSC) and rotor side converter (RSC). The standard linear control laws proposed for GSC provides not only instablity against comparatively large-signal disturbances, but also the problem of stability due to uncertainty of load and variations in parameters. In this paper, a nonlinear controller is designed for grid side converter (GSC) of a DFIG for wind power application. The nonlinear controller is designed based on the input-output feedback linearization control method. The resulting closed-loop system ensures a sufficient stability region, make robust to variations in circuit parameters and also exhibits good transient response. Computer simulations and experimental results are presented to confirm the effectiveness of the proposed control strategy.

Keywords: Doubly fed Induction Generator, grid side converter, machine side converter, dc link, feedback linearization.

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Authors: E. T. L. Cöuras Ford, V. A. C. Vale, J. U. L. Mendes, F. A. Ribeiro

Abstract:

The study of the aerodynamics related to the improvement in the acting of airplanes and automobiles with the objective of being reduced the effect of the attrition of the air on structures, providing larger speeds and smaller consumption of fuel. The application of the knowledge of the aerodynamics not more limits to the aeronautical and automobile industries. Therefore, this research aims to design and construction of a wind tunnel to perform aerodynamic analysis in bodies of cars, seeking greater efficiency. Therefore, this research aims to design and construction of a wind tunnel to perform aerodynamic analysis in bodies of cars, seeking greater efficiency. For this, a methodology for wind tunnel type selection is designed to be built, taking into account the various existing configurations in which chose to build an open circuit tunnel, due to the lower complexity of construction and installation; operational simplicity and low cost. The guidelines for the project were teaching: the layer that limits study and analyze specimens with different geometries. For the variation of pressure in the test, section of a switched gauge used a pitot tube. Thus, it was possible to obtain quantitative and qualitative results, which proved to be satisfactory.

Keywords: Wind tunnel, Aerodynamics, Air.

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Authors: Kamran Yousefpour, Mojtaba Rostaghi-Chalaki, Jason Warden, David Wallace, Chanyeop Park

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There has been a rising trend in using impulse current generators to investigate the lightning strike protection of materials including aluminum and composites in structures such as wind turbine blade and aircraft body. The focus of this research is to present an impulse current generator built in the High Voltage Lab at Mississippi State University. The generator is capable of producing component A and D of the natural lightning discharges in accordance with the Society of Automotive Engineers (SAE) standard, which is widely used in the aerospace industry. The generator can supply lightning impulse energy up to 400 kJ with the capability of producing impulse currents with magnitudes greater than 200 kA. The electrical circuit and physical components of an improved impulse current generator are described and several lightning strike waveforms with different amplitudes is presented for comparing with the standard waveform. The results of this study contribute to the fundamental understanding the functionality of the impulse current generators and present an impulse current generator developed at the High Voltage Lab of Mississippi State University.

Keywords: impulse current generator, lightning, society of automotive engineers, capacitor

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Authors: Sajid Abbas, Joon Pyo Hong, Jung-Ryun Lee, Seungryong Cho

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Computed tomography and laminography are heavily investigated in a compressive sensing based image reconstruction framework to reduce the dose to the patients as well as to the radiosensitive devices such as multilayer microelectronic circuit boards. Nowadays researchers are actively working on optimizing the compressive sensing based iterative image reconstruction algorithm to obtain better quality images. However, the effects of the sampled data’s properties on reconstructed the image’s quality, particularly in an insufficient sampled data conditions have not been explored in computed laminography. In this paper, we investigated the effects of two data properties i.e. sampling density and data incoherence on the reconstructed image obtained by conventional computed laminography and a recently proposed method called spherical sinusoidal scanning scheme. We have found that in a compressive sensing based image reconstruction framework, the image quality mainly depends upon the data incoherence when the data is uniformly sampled.

Keywords: Computed tomography, Computed laminography, Compressive sending, Low-dose.

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Authors: A. Gamil, G. Herold

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The concept of differential protection based on current quantities has been discussed in many paper and researches. For certificating and inverting of currents and voltages through converter systems, there is no conventional current differential relay, which can compare current quantities, because they are different in form and frequencies. An overview over a new concept of differential protection for converters based on instantaneous power quantities will be discussed in this paper. To drive the power quantities a mathematical background of the space vectors will be introduced. A simple DCLink is preceded in this paper and a power analysis description and simulation is derived using Matlab®/ SimulinkTM concerning a certain construction scheme of Power Differential Relay System. Finally a complete analysis of three phase fault in DC-Link Rectifier is discussed to ensure the ability of Power Differential Protection System to detect the fault in main and selectivity protection sections.

Keywords: Space Vectors, Power Differential Relay (PDR), Short Circuit Power, Diode Recovery Energy, Detected Power Differential Signal (DPDS), Power Space Vector (PSV), Power Space Vector Protection Area (PSVPA).

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Authors: Kenichiro Hida, Shin-Ichi Kuribayashi

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In a conventional network, most network devices, such as routers, are dedicated devices that do not have much variation in capacity. In recent years, a new concept of network functions virtualisation (NFV) has come into use. The intention is to implement a variety of network functions with software on general-purpose servers and this allows the network operator to select their capacities and locations without any constraints. This paper focuses on the allocation of NFV-based routing functions which are one of critical network functions, and presents the virtual routing function allocation algorithm that minimizes the total power consumption. In addition, this study presents the useful allocation policy of virtual routing functions, based on an evaluation with a ladder-shaped network model. This policy takes the ratio of the power consumption of a routing function to that of a circuit and traffic distribution between areas into consideration. Furthermore, the present paper shows that there are cases where the use of NFV-based routing functions makes it possible to reduce the total power consumption dramatically, in comparison to a conventional network, in which it is not economically viable to distribute small-capacity routing functions.

Keywords: Virtual routing function, NFV, resource allocation, minimum power consumption.

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Authors: K. Ramash Kumar, S. Jeevananthan

Abstract:

The Object of this paper is to design and analyze a Hysteresis modulation based sliding mode control (HMSMC) for positive output elementary super lift Luo converter (POESLLC), which is the start-of-the-art DC-DC converter. The positive output elementary super lift Luo converter performs the voltage conversion from positive source voltage to positive load voltage. This paper proposes a HMSMC capable of providing the good steady state and dynamic performance compared to conventional controllers. Dynamic equations describing the positive output elementary super lift luo converter are derived by using state space average method. The simulation model of the positive output elementary super lift Luo converter with its control circuit is implemented in Matlab/Simulink. The HMSMC for positive output elementary super lift Luo converter is tested for line changes, load changes and also for components variations.

Keywords: DC-DC converter, Positive output elementarysuper lift Luo converter (POESLLC), Hysteresis modulation basedsliding mode control (HMSMC).

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Authors: Yin Yin Phyo, Tun Lin Naing

Abstract:

This paper investigated the simulation of two-phase interleaved boost converter (IBC) with free and open-source software Scilab/Xcos. By using interleaved method, it can reduce current stress on components, components size, input current ripple and output voltage ripple. The required mathematical model is obtained from the equivalent circuit of its different four modes of operation for simulation. The equivalent circuits are considered in continuous conduction mode (CCM). The average values of the system variables are derived from the state-space equation to find the equilibrium point. Scilab is now becoming more and more popular among students, engineers and scientists because it is open-source software and free of charge. It gives a great convenience because it has powerful computation and simulation function. The waveforms of output voltage, input current and inductors current are obtained by using Scilab/Xcos.

Keywords: Two-phase boost converter, continuous conduction mode, free and open-source, interleaved method, dynamic simulation.

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